Searched refs:g6 (Results 1 - 25 of 48) sorted by relevance

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/illumos-gate/usr/src/uts/sun4u/ml/
H A Dmach_xc.s77 TRACE_PTR(%g4, %g6)
78 GET_TRACE_TICK(%g6, %g3)
79 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi
80 rdpr %tl, %g6
81 stha %g6, [%g4 + TRAP_ENT_TL]%asi
82 rdpr %tt, %g6
83 stha %g6, [%g4 + TRAP_ENT_TT]%asi
85 rdpr %tpc, %g6
86 stna %g6, [%g4 + TRAP_ENT_TPC]%asi
87 rdpr %tstate, %g6
[all...]
H A Dmach_interrupt.s130 TRACE_PTR(%g4, %g6)
131 GET_TRACE_TICK(%g6, %g3)
132 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi
133 rdpr %tl, %g6
134 stha %g6, [%g4 + TRAP_ENT_TL]%asi
135 rdpr %tt, %g6
136 stha %g6, [%g4 + TRAP_ENT_TT]%asi
137 rdpr %tpc, %g6
138 stna %g6, [%g4 + TRAP_ENT_TPC]%asi
139 rdpr %tstate, %g6
[all...]
H A Dwbuf.s62 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
77 mov %g6, %g2 ! arg2 = tagaccess
106 FAULT_WINTRACE(%g5, %g6, %g7, TT_F32_SN1)
107 CPU_ADDR(%g5, %g6)
108 ldn [%g5 + CPU_MPCB], %g6
109 stn %sp, [%g6 + MPCB_SPBUF]
110 ldn [%g6 + MPCB_WBUF], %g5
113 st %g5, [%g6 + MPCB_WBCNT]
122 FAULT_WINTRACE(%g5, %g6, %g1, TT_F32_SO0)
131 CPU_ADDR(%g5, %g6)
[all...]
H A Dtrap_table.s1036 ldxa [%g5]ASI_DMMU, %g6 /* g6 = primary ctx */ ;\
1037 and %g6, %g4, %g6 /* &= CTXREG_CTX_MASK */ ;\
1038 cmp %g3, %g6 ;\
1042 ldxa [%g5]ASI_DMMU, %g6 /* g6 = secondary ctx */ ;\
1043 and %g6, %g4, %g6 /* &= CTXREG_CTX_MASK */ ;\
1044 cmp %g3, %g6 ;\
[all...]
/illumos-gate/usr/src/uts/sfmmu/ml/
H A Dsfmmu_asm.s677 * %g6 = sfmmu cnum returned
683 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4)
685 cmp %g6, INVALID_CONTEXT ! hat cnum == INVALID ??
692 mov %g6, %o1
709 mov %g6, %o1
730 * %g6 = sfmmu cnum returned
734 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4)
736 cmp %g6, INVALID_CONTEXT ! hat cnum == INVALID ??
743 mov %g6, %o1
753 mov %g6,
[all...]
H A Dsfmmu_kdi.s65 * Scratch: %g4, %g5, %g6 available
111 * Scratch: %g5, %g6 available
123 srlx %g1, %g5, %g6; \
125 sllx %g6, %g5, %g5; \
129 sllx %g3, HTAG_REHASH_SHIFT, %g6; \
130 or %g6, SFMMU_INVALID_SHMERID, %g6; \
131 or %g5, %g6, %g5
157 * Scratch: %g4, %g5, %g6 available
170 ldxa [%g4]ASI_MEM, %g6; \
[all...]
/illumos-gate/usr/src/cmd/mdb/sparc/v9/kmdb/
H A Dkaif_startup.s55 set kaif_cpusave_getaddr, %g6; \
57 jmp %g6; \
96 * %g6 - address of save area
107 set kaif_cpusave, %g6
108 ldx [%g6], %g6
111 add %g6, %g2, %g6
125 * %g6 - cpusave area
132 add %g6, KRS_GREG
[all...]
H A Dkaif_resume.s75 mov %l6, %g6
82 add %g6, KRS_FPREGS, %g4 ! %g4 = &cpusave[this_cpuid].krs_fpregs
105 ldx [%g6 + KRS_RWINS], %g3 ! %g3 = &cpusave[this_cpuid].krs_wins
142 ldx [%g6 + KRS_MMU_PCONTEXT], %g4
147 ldx [%g6 + KRS_TSTATE], %g4
172 ldx [%g5 + KREG_OFF(KREG_G6)], %g6
H A Dkaif_invoke.s62 kreg_t g6, kreg_t g7)
139 mov %g6, %l0
140 mov %i3, %g6 ! Restore PROC_REG for kernel call
148 mov %l0, %g6
H A Dkmdb_setcontext.s68 ldx [%g7 + UC_GREG(REG_G6)], %g6
/illumos-gate/usr/src/uts/sun4u/cpu/
H A Dus3_cheetahplus_asm.s192 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
221 GET_CPU_IMPL(%g6)
222 cmp %g6, PANTHER_IMPL
227 mov %g6, %g3
249 CH_DCACHE_FLUSHALL(%g4, %g5, %g6)
272 GET_CPU_IMPL(%g6)
276 cmp %g6, PANTHER_IMPL
279 CH_ICACHE_FLUSHALL(%g4, %g5, %g6, %g3)
294 CPU_INDEX(%g6, %g5)
295 sll %g6, TRAPTR_SIZE_SHIF
[all...]
H A Dus3_jalapeno_asm.s422 * %g6 = scr2
427 set CHPR_FECCTL0_LOGOUT, %g6
428 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
442 CHK_JP_ERRATA85_ENABLED(%g6, fast_ecc_err_1);
443 set jp_estar_tl0_data, %g6
444 stx %g2, [%g6 + 0]
445 stx %g3, [%g6 + 8]
446 JP_FORCE_FULL_SPEED(%g2, %g3, %g6, %g7) /* %g2: saved speed */
449 ECACHE_FLUSHALL(%g4, %g5, %g6,
[all...]
H A Dus3_cheetah_asm.s121 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
152 ASM_LDX(%g6, ecache_tl1_flushaddr)
153 cmp %g6, -1 ! check if address is valid
156 CH_ECACHE_FLUSHALL(%g4, %g5, %g6)
177 CH_DCACHE_FLUSHALL(%g4, %g5, %g6)
200 CH_ICACHE_FLUSHALL(%g4, %g5, %g6, %g3)
215 CPU_INDEX(%g6, %g5)
216 sll %g6, TRAPTR_SIZE_SHIFT, %g6
218 add %g6,
[all...]
H A Dus3_common_asm.s317 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
321 or %g6, %g4, %g6 ! %g6 = pgsz | cnum
327 or %g6, %g2, %g6 /* %g6 = nucleus pgsz | primary pgsz | cnum */
328 stxa %g6, [%g4]ASI_DMMU /* wr new ctxum */
395 SFMMU_CPU_CNUM(%g2, %g5, %g6) !
[all...]
/illumos-gate/usr/src/uts/sun4v/ml/
H A Dmach_xc.s79 TRACE_PTR(%g4, %g6)
80 GET_TRACE_TICK(%g6, %g3)
81 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi
82 rdpr %tl, %g6
83 stha %g6, [%g4 + TRAP_ENT_TL]%asi
84 rdpr %tt, %g6
85 stha %g6, [%g4 + TRAP_ENT_TT]%asi
87 rdpr %tpc, %g6
88 stna %g6, [%g4 + TRAP_ENT_TPC]%asi
89 rdpr %tstate, %g6
[all...]
H A Dtrap_table.s1025 /* clobbers g1 and g6 XXXQ? */ ;\
1045 * g6 = scratch (clobbered)
1052 sethi %hi(FLUSH_ADDR), %g6 ;\
1053 flush %g6 ;\
1054 TRACE_PTR(%g3, %g6) ;\
1055 GET_TRACE_TICK(%g6, %g4) ;\
1056 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi ;\
1059 rdpr %tnpc, %g6 ;\
1060 stna %g6, [%g3 + TRAP_ENT_F2]%asi ;\
1063 rdpr %tpc, %g6 ;\
[all...]
H A Dwbuf.s63 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
78 mov %g6, %g2 ! arg2 = tagaccess
107 FAULT_WINTRACE(%g5, %g6, %g7, TT_F32_SN1)
108 CPU_PADDR(%g5, %g6)
110 ldxa [%g5 + CPU_MPCB_PA]%asi, %g6
111 ldxa [%g6 + MPCB_WBUF_PA]%asi, %g5
112 stna %sp, [%g6 + MPCB_SPBUF]%asi
115 sta %g5, [%g6 + MPCB_WBCNT]%asi
124 FAULT_WINTRACE(%g5, %g6, %g1, TT_F32_SO0)
133 CPU_ADDR(%g5, %g6)
[all...]
H A Dmach_interrupt.s71 ! %g6 head ptr
74 ldxa [%g3]ASI_QUEUE, %g6 ! %g6 = head ptr
77 cmp %g6, %g7
98 ldxa [%g3 + %g6]ASI_MEM, %g5 ! get PC from q base + head
99 add %g6, 0x8, %g6 ! inc head
100 ldxa [%g3 + %g6]ASI_MEM, %g1 ! read data word 1
101 add %g6, 0x8, %g6 ! in
[all...]
/illumos-gate/usr/src/stand/lib/sa/sparc/
H A D_setjmp.s115 sub %g7, 2, %g6
117 deccc %g6 ! all windows done?
120 sub %g7, 2, %g6
122 deccc %g6 ! all windows done?
/illumos-gate/usr/src/uts/sun4/ml/
H A Dinterrupt.s65 ! %g3, %g5, %g6, %g7 - temps
76 add %g1, INTR_HEAD, %g6 ! %g6 = &cpu->m_cpu.intr_head
77 add %g6, %g5, %g6 ! %g6 = &cpu->m_cpu.intr_head[pil]
78 ldn [%g6], %g2 ! %g2 = cpu->m_cpu.intr_head[pil]
94 stn %g3, [%g6] ! update cpu->m_cpu.intr_head[pil]
95 add %g1, INTR_TAIL, %g6 ! %g6
[all...]
/illumos-gate/usr/src/uts/sun4u/starfire/ml/
H A Didn_asm.s300 CPU_INDEX(%g6, %g5) ! g6 = cpuid
305 sll %g6, IDN_DMV_CPU_SHIFT, %g6 ! g6 = cpuid * 8
307 ld [%g6 + %g3], %g5
323 ld [%g6 + %g3], %g2
329 st %g2, [%g3 + %g6]
343 st %g4, [%g3 + %g6]
369 ldstub [%g6
[all...]
/illumos-gate/usr/src/uts/sun4u/starcat/ml/
H A Ddrmach_asm.s253 ! to next 16 byte boundary. Leave result in %g6.
254 set drmach_shutdown_asm_end, %g6
258 sub %g6, %g1, %g6
259 add %g6, %g2, %g6
260 add %g6, 15, %g6
261 andn %g6, 15, %g6
[all...]
/illumos-gate/usr/src/cmd/sgs/rtld/sparc/
H A Dcaller.s127 mov %o0, %g6
/illumos-gate/usr/src/cmd/sgs/rtld/sparcv9/
H A Dcaller.s127 mov %o0, %g6
/illumos-gate/usr/src/ucbcmd/sbcp/
H A Dsbcp.s119 ! %g6 return address (after trap instruction)
123 ! changed to using %g6 instead.
171 jmp %g6

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