Lines Matching refs:g6
677 * %g6 = sfmmu cnum returned
683 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4)
685 cmp %g6, INVALID_CONTEXT ! hat cnum == INVALID ??
692 mov %g6, %o1
709 mov %g6, %o1
730 * %g6 = sfmmu cnum returned
734 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4)
736 cmp %g6, INVALID_CONTEXT ! hat cnum == INVALID ??
743 mov %g6, %o1
753 mov %g6, %o1
1728 GET_MMU_BOTH_TAGACC(%g5 /*dtag*/, %g2 /*itag*/, %g6, %g4)
1729 rdpr %tt, %g6
1730 cmp %g6, FAST_IMMU_MISS_TT
1733 cmp %g6, T_INSTR_MMU_MISS
1738 cmp %g6, FAST_DMMU_MISS_TT
1740 cmp %g6, T_DATA_MMU_MISS
1753 HAT_GLOBAL_STAT(HATSTAT_PAGEFAULT, %g6, %g4)
1769 GET_MMU_BOTH_TAGACC(%g5 /*dtag*/, %g2 /*itag*/, %g4, %g6)
1770 rdpr %tt, %g6
1771 cmp %g6, FAST_IMMU_MISS_TT
1774 cmp %g6, T_INSTR_MMU_MISS
1779 cmp %g6, FAST_DMMU_MISS_TT
1781 cmp %g6, T_DATA_MMU_MISS
1799 rdpr %tt, %g6
1800 cmp %g6, FAST_IMMU_MISS_TT
1804 cmp %g6, FAST_DMMU_MISS_TT
1848 rdpr %tstate, %g6
1858 wrpr %g6, %tstate
1888 * g5 = trap type, g6 = tag access reg
1892 * only use g5, g6, g7 registers after we have switched to alternate
1897 GET_MMU_D_TAGACC(%g6 /*dtag*/, %g5 /*scratch*/)
2432 RUNTIME_PATCH_SETX(%g1, %g6)
2442 RUNTIME_PATCH_SETX(%g3, %g6)
2445 or %g0, RUNTIME_PATCH, %g6 ! ktsb4m_szcode (hot patched)
2447 GET_TSBE_POINTER(MMU_PAGESHIFT4M, %g3, %g7, %g6, %g5)
2450 CPU_TSBMISS_AREA(%g6, %g7)
2451 HAT_PERCPU_STAT16(%g6, TSBMISS_KPROTS, %g7)
2496 CPU_TSBMISS_AREA(%g6, %g7)
2497 HAT_PERCPU_STAT16(%g6, TSBMISS_UPROTS, %g7)
2540 RUNTIME_PATCH_SETX(%g4, %g6)
2579 KPM_TLBMISS_STAT_INCR(%g2, %g4, %g5, %g6, kpmtlbm_stat_out)
2589 RUNTIME_PATCH_SETX(%g7, %g6)
2601 srlx %g2, TAG_VALO_SHIFT, %g6 ! make tag to compare
2602 cmp %g6, %g4 ! compare tag
2637 RUNTIME_PATCH_SETX(%g7, %g6)
2649 srlx %g2, TAG_VALO_SHIFT, %g6 ! make tag to compare
2650 cmp %g6, %g4 ! compare tag
2696 * g3 - g6 = scratch registers
2715 * g3 - g6 = scratch registers
2739 * g3 - g6 = scratch registers
2778 * g4 - g6 = scratch registers
2786 GET_UTSBREG(SCRATCHPAD_UTSBREG4, %g6)
2787 brlz,pt %g6, 1f
2789 GET_4TH_TSBE_PTR(%g2, %g6, %g4, %g5)
2790 PROBE_4TH_ITSB(%g6, %g7, uitlb_4m_scd_probefail)
2798 GET_UTSBREG(SCRATCHPAD_UTSBREG3, %g6)
2799 brlz,pt %g6, sfmmu_tsb_miss_tt
2801 GET_3RD_TSBE_PTR(%g2, %g6, %g4, %g5)
2802 PROBE_3RD_ITSB(%g6, %g7, uitlb_8K_scd_probefail)
2810 mov %g2, %g6 /* GET_2ND_TSBE_PTR clobbers tagacc */
2812 GET_2ND_TSBE_PTR(%g6, %g7, %g3, %g4, %g5, sfmmu_uitlb)
2835 * g4 - %g6 = scratch registers
2862 GET_UTSBREG(SCRATCHPAD_UTSBREG4, %g6)
2863 brlz,pt %g6, 2f
2865 GET_4TH_TSBE_PTR(%g2, %g6, %g4, %g5)
2866 PROBE_4TH_DTSB(%g6, %g7, udtlb_4m_shctx_probefail)
2872 GET_UTSBREG(SCRATCHPAD_UTSBREG3, %g6)
2873 brlz,pt %g6, sfmmu_tsb_miss_tt
2875 GET_3RD_TSBE_PTR(%g2, %g6, %g4, %g5)
2876 PROBE_3RD_DTSB(%g6, %g7, udtlb_8k_shctx_probefail)
2886 * g4 - g6 = scratch registers
2900 GET_UTSBREG(SCRATCHPAD_UTSBREG4, %g6)
2901 brlz,pt %g6, 4f
2903 GET_4TH_TSBE_PTR(%g2, %g6, %g4, %g5)
2904 PROBE_4TH_DTSB(%g6, %g7, udtlb_4m_shctx_probefail2)
2922 GET_UTSBREG(SCRATCHPAD_UTSBREG3, %g6)
2923 brlz,pt %g6, 6f
2925 GET_3RD_TSBE_PTR(%g2, %g6, %g4, %g5)
2926 PROBE_3RD_DTSB(%g6, %g7, udtlb_8k_shctx_probefail2)
2936 srax %g2, PREDISM_BASESHIFT, %g6 /* g6 > 0 : ISM predicted */
2937 brgz,pn %g6, udtlb_miss_probesecond /* check for ISM */
2945 * g6 = ism pred.
2958 brgz,pn %g6, sfmmu_tsb_miss_tt
2971 brgz,pn %g6, sfmmu_tsb_miss_tt
2983 * g6 = ism pred.
3001 brgz,pn %g6, udtlb_miss_probefirst
3029 sethi %hi(KERNELBASE), %g6
3031 or %g6, %lo(KERNELBASE), %g6
3032 cmp %g7, %g6
3042 CPU_TSBMISS_AREA(%g6, %g7)
3043 stn %g1, [%g6 + TSBMISS_TSBPTR] /* save 1ST tsb pointer */
3044 stn %g3, [%g6 + TSBMISS_TSBPTR4M] /* save 2ND tsb pointer */
3048 ldn [%g6 + TSBMISS_KHATID], %g7
3050 ldn [%g6 + TSBMISS_UHATID], %g7 /* g7 = hatid */
3052 HAT_PERCPU_STAT32(%g6, TSBMISS_UTSBMISS, %g5)
3056 stn %g7, [%g6 + (TSBMISS_SCRATCH + TSBMISS_HATID)]
3059 ldub [%g6 + TSBMISS_URTTEFLAGS], %g7 /* clear ctx1 flag set from */
3061 stub %g7, [%g6 + TSBMISS_URTTEFLAGS]
3064 ISM_CHECK(%g2, %g6, %g3, %g4, %g5, %g7, %g1, tsb_l1, tsb_ism)
3073 ldn [%g6 + (TSBMISS_SCRATCH + TSBMISS_HATID)], %g7
3076 HAT_PERCPU_STAT32(%g6, TSBMISS_KTSBMISS, %g5)
3082 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3090 ldub [%g6 + TSBMISS_UTTEFLAGS], %g4
3111 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3119 ldub [%g6 + TSBMISS_UTTEFLAGS], %g4
3128 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3140 ldub [%g6 + TSBMISS_UTTEFLAGS], %g4
3149 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3158 ldub [%g6 + TSBMISS_UTTEFLAGS], %g4
3167 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3178 * g6 = tsbmiss area
3193 * g6 = tsbmiss area
3198 ldx [%g6 + TSBMISS_SHARED_UHATID], %g7 /* g7 = srdp */
3202 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3208 ldub [%g6 + TSBMISS_URTTEFLAGS], %g4
3217 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3223 ldub [%g6 + TSBMISS_URTTEFLAGS], %g4
3231 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3237 ldub [%g6 + TSBMISS_URTTEFLAGS], %g4
3246 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3252 ldub [%g6 + TSBMISS_URTTEFLAGS], %g4
3261 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3274 * g6 = tsbmiss area
3280 ldub [%g6 + TSBMISS_URTTEFLAGS], %g1
3282 stub %g1, [%g6 + TSBMISS_URTTEFLAGS]
3291 * g6 = tsbmiss area
3302 TTE_SET_REFMOD_ML(%g3, %g4, %g6, %g7, %g5, tsb_lset_refmod,
3334 TTE_SET_REF_ML(%g3, %g4, %g6, %g7, %g5, tsb_lset_ref)
3340 * g6 = tsbmiss area
3401 ldub [%g6 + TSBMISS_URTTEFLAGS], %g7
3404 ldn [%g6 + TSBMISS_TSBPTR], %g1 ! g1 = 1ST TSB ptr
3405 GET_UTSBREG_SHCTX(%g6, TSBMISS_TSBSCDPTR, %g1)
3408 GET_3RD_TSBE_PTR(%g5, %g1, %g6, %g7)
3411 ldn [%g6 + TSBMISS_TSBPTR], %g1 ! g1 = 1ST TSB ptr
3419 TSB_UPDATE_TL(%g1, %g3, %g2, %g4, %g7, %g6, locked_tsb_l3)
3441 ldub [%g6 + TSBMISS_URTTEFLAGS], %g7
3444 ldn [%g6 + TSBMISS_TSBPTR4M], %g1 ! g1 = 2ND TSB ptr
3445 GET_UTSBREG_SHCTX(%g6, TSBMISS_TSBSCDPTR4M, %g1)! g1 = 4TH TSB ptr
3448 GET_4TH_TSBE_PTR(%g5, %g1, %g6, %g7)
3451 ldn [%g6 + TSBMISS_TSBPTR4M], %g1 ! g1 = 2ND TSB ptr
3462 TSB_UPDATE_TL(%g1, %g3, %g2, %g4, %g7, %g6, locked_tsb_l4)
3499 * g6 = tsbmiss area
3507 ldn [%g6 + TSBMISS_TSBPTR4M], %g1 /* g1 = tsbp */
3512 ldxa [%g7]ASI_DMMU, %g6 /* get tag access va */
3513 GET_4M_PFN_OFF(%g3, %g6, %g5, %g7, 1) /* make 4M pfn offset */
3523 ldn [%g6 + TSBMISS_TSBPTR4M], %g1 /* g1 = 2ND TSB */
3526 ldxa [%g7]ASI_IMMU, %g6 /* get tag access va */
3527 GET_4M_PFN_OFF(%g3, %g6, %g5, %g7, 2) /* make 4M pfn offset */
3550 ldn [%g6 + TSBMISS_TSBPTR], %g1 ! g1 = 8K TSB ptr
3554 ldn [%g6 + TSBMISS_TSBPTR4M], %g1 ! g1 = 4M TSB ptr
3560 or %g0, RUNTIME_PATCH, %g6
3561 mov %g6, %asi ! XXX avoid writing to %asi !!
3563 TSB_UPDATE_TL(%g1, %g3, %g2, %g4, %g7, %g6, locked_tsb_l7)
3590 * g6 = tsbmiss area
3611 ldub [%g6 + TSBMISS_URTTEFLAGS], %g5
3613 stub %g5, [%g6 + TSBMISS_URTTEFLAGS]
3625 * g6 = tsb miss area
3643 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT32M,
3662 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT256M,
3674 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT4M,
3688 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT64K,
3819 CPU_INDEX(%g5, %g6)
3820 set cpu_core, %g6
3822 add %g5, %g6, %g5
3823 lduh [%g5 + CPUC_DTRACE_FLAGS], %g6
3824 andcc %g6, CPU_DTRACE_NOFAULT, %g0
3826 or %g6, CPU_DTRACE_BADADDR, %g6
3827 stuh %g6, [%g5 + CPUC_DTRACE_FLAGS]
3928 mov HBLK_RANGE_SHIFT, %g6
3939 * g6 = hmeshift
3947 GET_TTE(%o0, %o4, %g1, %g2, %o5, %g4, %g6, %g5, %g3,
3991 move %icc, MMU_PAGESHIFT4M, %g6
3993 movne %icc, MMU_PAGESHIFT256M, %g6
3997 move %icc, MMU_PAGESHIFT512K, %g6
3999 movne %icc, MMU_PAGESHIFT4M, %g6
4069 sll %o1, 1, %g6
4070 add %g6, %o1, %g6
4071 add %g6, MMU_PAGESHIFT, %g6
4078 * %g6 = hmeshift
4088 GET_TTE(%o0, %o4, %g3, %g4, %g1, %o5, %g6, %o1, %g5,
4202 CPU_INDEX(%g7, %g6)
4203 sethi %hi(kpmtsbm_area), %g6
4205 or %g6, %lo(kpmtsbm_area), %g6
4206 add %g6, %g7, %g6 /* g6 = kpmtsbm ptr */
4209 ldub [%g6 + KPMTSBM_FLAGS], %g4
4215 ldx [%g6 + KPMTSBM_VBASE], %g7
4218 ldx [%g6 + KPMTSBM_VEND], %g5
4221 stx %g3, [%g6 + KPMTSBM_TSBPTR]
4227 lduw [%g6 + KPMTSBM_TSBMISS], %g5
4232 st %g5, [%g6 + KPMTSBM_TSBMISS]
4235 st %g5, [%g6 + KPMTSBM_TSBMISS]
4242 * g6 = per-CPU kpm tsbmiss area
4247 ldub [%g6 + KPMTSBM_SZSHIFT], %g3
4260 PAGE_NUM2MEMSEG_NOLOCK_PA(%g2, %g3, %g6, %g4, %g5, %g7, kpmtsbmp2m)
4269 ldub [%g6 + KPMTSBM_KPMP2PSHFT], %g5
4284 ld [%g6 + KPMTSBM_KPMPTABLESZ], %g7
4286 ld [%g6 + KPMTSBM_KPMPTABLESZ], %g7
4299 ldub [%g6 + KPMTSBM_KPMPSHIFT], %g1 /* kpmp_shift */
4316 ldx [%g6 + KPMTSBM_KPMPTABLEPA], %g4 /* kpmp_tablepa */
4342 ldx [%g6 + KPMTSBM_TSBPTR], %g4
4347 * g1=kp_pa g2=ttarget g3=hlck_pa g4=kpmtsbp4m g5=tte g6=kpmtsbm_area
4367 ldub [%g6 + KPMTSBM_FLAGS], %g7
4384 DTLB_STUFF(%g5, %g1, %g2, %g4, %g6)
4398 sethi %hi(KERNELBASE), %g6
4400 or %g6, %lo(KERNELBASE), %g6
4401 cmp %g7, %g6
4425 CPU_INDEX(%g7, %g6)
4426 sethi %hi(kpmtsbm_area), %g6
4428 or %g6, %lo(kpmtsbm_area), %g6
4429 add %g6, %g7, %g6 /* g6 = kpmtsbm ptr */
4432 ldub [%g6 + KPMTSBM_FLAGS], %g4
4441 ldx [%g6 + KPMTSBM_VBASE], %g7
4444 ldx [%g6 + KPMTSBM_VEND], %g5
4447 stx %g1, [%g6 + KPMTSBM_TSBPTR] /* save 8K kpm TSB pointer */
4453 lduw [%g6 + KPMTSBM_TSBMISS], %g5
4458 st %g5, [%g6 + KPMTSBM_TSBMISS]
4461 st %g5, [%g6 + KPMTSBM_TSBMISS]
4468 * g6 = per-CPU kpm tsbmiss area
4477 ldub [%g6 + KPMTSBM_SZSHIFT], %g3 /* g3 = kpm_size_shift */
4506 * g6 = per-CPU kpm tsbmiss area
4516 * g2=pfn g6=per-CPU kpm tsbmiss area
4520 PAGE_NUM2MEMSEG_NOLOCK_PA(%g2, %g3, %g6, %g4, %g5, %g7, kpmtsbmsp2m)
4527 * g2=pfn g3=mseg_pa g6=per-CPU kpm tsbmiss area
4535 * g2=pfn g3=mseg_pa g4=inx g6=per-CPU tsbmiss area
4540 ld [%g6 + KPMTSBM_KPMPTABLESZ], %g7
4542 ld [%g6 + KPMTSBM_KPMPTABLESZ], %g7
4551 * g6=per-CPU kpm tsbmiss area g7=kpmp_stable_sz
4553 ldub [%g6 + KPMTSBM_KPMPSHIFT], %g1 /* kpmp_shift */
4562 * g6=per-CPU kpm tsbmiss area
4571 * g6=per-CPU kpm tsbmiss area
4573 ldx [%g6 + KPMTSBM_KPMPTABLEPA], %g4 /* kpmp_stablepa */
4580 * g6=per-CPU kpm tsbmiss area
4588 ldx [%g6 + KPMTSBM_TSBPTR], %g4
4594 * g6=per-CPU kpm tsbmiss area g7=scratch register
4611 ldub [%g6 + KPMTSBM_FLAGS], %g7
4628 DTLB_STUFF(%g5, %g2, %g4, %g5, %g6)
4642 sethi %hi(KERNELBASE), %g6
4644 or %g6, %lo(KERNELBASE), %g6
4645 cmp %g7, %g6
4801 RUNTIME_PATCH_SETX(%g1, %g6) ! %g1 = contents of ktsb_pbase
4810 RUNTIME_PATCH_SETX(%g3, %g6) ! %g3 = contents of ktsb4m_pbase
4812 or %g0, RUNTIME_PATCH, %g6 ! ktsb4m_szcode (hot patched)
4814 GET_TSBE_POINTER(MMU_PAGESHIFT4M, %g3, %g7, %g6, %g5)