Lines Matching refs:g6
1025 /* clobbers g1 and g6 XXXQ? */ ;\
1045 * g6 = scratch (clobbered)
1052 sethi %hi(FLUSH_ADDR), %g6 ;\
1053 flush %g6 ;\
1054 TRACE_PTR(%g3, %g6) ;\
1055 GET_TRACE_TICK(%g6, %g4) ;\
1056 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi ;\
1059 rdpr %tnpc, %g6 ;\
1060 stna %g6, [%g3 + TRAP_ENT_F2]%asi ;\
1063 rdpr %tpc, %g6 ;\
1064 stna %g6, [%g3 + TRAP_ENT_TPC]%asi ;\
1065 TRACE_SAVE_TL_GL_REGS(%g3, %g6) ;\
1066 rdpr %tt, %g6 ;\
1067 or %g6, (ttextra), %g1 ;\
1071 cmp %g6, FAST_IMMU_MISS_TT ;\
1073 cmp %g6, T_INSTR_MMU_MISS ;\
1078 cmp %g6, FAST_IMMU_MISS_TT ;\
1080 cmp %g6, T_INSTR_MMU_MISS ;\
1084 TRACE_NEXT(%g3, %g4, %g6)
1391 * g6 = scratch (clobbered)
1691 * %g6 user instruction
1718 lda [%g5]ASI_USER, %g6 ! get user's instruction
1722 and %g6, %g7, %g7
1746 srl %g6, FITOS_RS2_SHIFT, %g7
1792 srl %g6, FITOS_RD_SHIFT, %g7
1844 add %g5, 1, %g6
1846 casxa [%g7] ASI_N, %g5, %g6
1847 cmp %g5, %g6
1849 or %g0, %g6, %g5
1857 add %g5, 1, %g6
1859 casxa [%g7] ASI_N, %g5, %g6
1860 cmp %g5, %g6
1862 or %g0, %g6, %g5
1901 rdpr %cwp, %g6 ! %g6 = %cwp
1902 deccc %g6 ! %g6--
1903 movneg %xcc, %g5, %g6 ! if (%g6<0) %g6 = nwin-1
1904 wrpr %g6, %cwp
2082 lda [%g2]ASI_AIUP, %g6 ! get the user's lddf instruction
2083 srl %g6, 23, %g1 ! using ldda or not?
2087 srl %g6, 13, %g1 ! check immflag
2092 srl %g6, 5, %g1 ! get asi from instruction
2117 srl %g6, 25, %g3 ! %g6 has the instruction
2150 lda [%g2]ASI_AIUP, %g6 ! get the user's stdf instruction
2152 srl %g6, 23, %g1 ! using stda or not?
2156 srl %g6, 13, %g1 ! check immflag
2161 srl %g6, 5, %g1 ! get asi from instruction
2171 srl %g6, 25, %g6
2172 and %g6, 0x1F, %g6 ! %g6 has rd
2174 STDF_REG(%g6, %g7, %g4) ! STDF_REG(REG, ADDR, TMP)
2176 ldx [%g7 + CPU_TMP1], %g6
2177 srlx %g6, 32, %g7
2180 stuwa %g6, [%g5]ASI_USER ! second half
2342 mov %l1, %g6 ! pass tnpc to user code in %g6
2394 TRACE_PTR(%g5, %g6)
2395 GET_TRACE_TICK(%g6, %g7)
2396 stxa %g6, [%g5 + TRAP_ENT_TICK]%asi
2397 TRACE_SAVE_TL_GL_REGS(%g5, %g6)
2398 rdpr %tt, %g6
2399 stha %g6, [%g5 + TRAP_ENT_TT]%asi
2400 rdpr %tstate, %g6
2401 stxa %g6, [%g5 + TRAP_ENT_TSTATE]%asi
2404 rdpr %tpc, %g6
2405 stna %g6, [%g5 + TRAP_ENT_TPC]%asi
2406 MMU_FAULT_STATUS_AREA(%g6)
2407 ldx [%g6 + MMFSA_D_ADDR], %g6
2408 stna %g6, [%g5 + TRAP_ENT_F1]%asi ! MMU fault address
2409 CPU_PADDR(%g7, %g6);
2411 lda [%g7]ASI_MEM, %g6
2412 stna %g6, [%g5 + TRAP_ENT_F2]%asi
2413 MMU_FAULT_STATUS_AREA(%g6)
2414 ldx [%g6 + MMFSA_D_TYPE], %g7 ! XXXQ should be a MMFSA_F_ constant?
2415 ldx [%g6 + MMFSA_D_CTX], %g6
2416 sllx %g6, SFSR_CTX_SHIFT, %g6
2417 or %g6, %g7, %g6
2418 stna %g6, [%g5 + TRAP_ENT_F3]%asi ! MMU context/type
2419 set 0xdeadbeef, %g6
2420 stna %g6, [%g5 + TRAP_ENT_F4]%asi
2421 TRACE_NEXT(%g5, %g6, %g7)
2423 CPU_PADDR(%g7, %g6);
2425 lda [%g7]ASI_MEM, %g6
2426 brz,a,pt %g6, 1f
2434 set rtt_fill_start, %g6
2435 cmp %g7, %g6
2438 set rtt_fill_end, %g6
2439 cmp %g7, %g6
2448 set trap_table, %g6
2449 cmp %g7, %g6
2452 set etrap_table, %g6
2453 cmp %g7, %g6
2457 srl %g7, 5, %g6 ! XXXQ need #define
2458 and %g6, 0x1ff, %g6 ! XXXQ need #define
2460 and %g6, WTRAP_TTMASK, %g6
2461 cmp %g6, WTRAP_TYPE
2477 ldx [%g7 + MMFSA_D_ADDR], %g6
2479 srlx %g6, MMU_PAGESHIFT, %g6 /* align address */
2481 sllx %g6, MMU_PAGESHIFT, %g6
2483 or %g6, %g7, %g6 /* TAG_ACCESS */
2526 TRACE_PTR(%g3, %g6)
2527 GET_TRACE_TICK(%g6, %g5)
2528 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
2529 TRACE_SAVE_TL_GL_REGS(%g3, %g6)
2530 rdpr %tt, %g6
2531 stha %g6, [%g3 + TRAP_ENT_TT]%asi
2532 rdpr %tstate, %g6
2533 stxa %g6, [%g3 + TRAP_ENT_TSTATE]%asi
2535 rdpr %tpc, %g6
2536 stna %g6, [%g3 + TRAP_ENT_TPC]%asi
2537 MMU_FAULT_STATUS_AREA(%g6)
2538 ldx [%g6 + MMFSA_D_ADDR], %g4
2540 ldx [%g6 + MMFSA_D_CTX], %g4
2542 ldx [%g6 + MMFSA_D_TYPE], %g4
2544 stxa %g6, [%g3 + TRAP_ENT_F3]%asi
2551 TRACE_PTR(%g3, %g6)
2552 GET_TRACE_TICK(%g6, %g5)
2553 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
2554 TRACE_SAVE_TL_GL_REGS(%g3, %g6)
2555 rdpr %tt, %g6
2556 stha %g6, [%g3 + TRAP_ENT_TT]%asi
2557 rdpr %tstate, %g6
2558 stxa %g6, [%g3 + TRAP_ENT_TSTATE]%asi
2560 rdpr %tpc, %g6
2561 stna %g6, [%g3 + TRAP_ENT_TPC]%asi
2562 MMU_FAULT_STATUS_AREA(%g6)
2563 ldx [%g6 + MMFSA_I_ADDR], %g4
2565 ldx [%g6 + MMFSA_I_CTX], %g4
2567 ldx [%g6 + MMFSA_I_TYPE], %g4
2569 stxa %g6, [%g3 + TRAP_ENT_F3]%asi
2576 TRACE_PTR(%g3, %g6)
2577 GET_TRACE_TICK(%g6, %g5)
2578 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
2579 TRACE_SAVE_TL_GL_REGS(%g3, %g6)
2580 rdpr %tt, %g6
2581 stha %g6, [%g3 + TRAP_ENT_TT]%asi
2582 rdpr %tstate, %g6
2583 stxa %g6, [%g3 + TRAP_ENT_TSTATE]%asi
2585 rdpr %tpc, %g6
2586 stna %g6, [%g3 + TRAP_ENT_TPC]%asi
2610 * g6 = scratch (clobbered)
2627 * g5 - g6 = scratch (clobbered)
2633 sethi %hi(FLUSH_ADDR), %g6
2634 flush %g6
2635 TRACE_PTR(%g5, %g6)
2638 GET_TRACE_TICK(%g6, %g4)
2639 stxa %g6, [%g5 + TRAP_ENT_TICK]%asi
2640 rdpr %tnpc, %g6
2641 stna %g6, [%g5 + TRAP_ENT_F2]%asi
2643 rdpr %tpc, %g6
2644 stna %g6, [%g5 + TRAP_ENT_TPC]%asi
2645 TRACE_SAVE_TL_GL_REGS(%g5, %g6)
2646 rdpr %tt, %g6
2647 or %g6, TT_MMU_MISS, %g4
2650 cmp %g6, FAST_IMMU_MISS_TT
2652 cmp %g6, T_INSTR_MMU_MISS
2654 MMU_FAULT_STATUS_AREA(%g6)
2655 ldx [%g6 + %g4], %g6
2656 stxa %g6, [%g5 + TRAP_ENT_TSTATE]%asi ! tag target
2660 MMU_FAULT_STATUS_AREA(%g6)
2661 ldx [%g6 + %g4], %g6
2662 stxa %g6, [%g5 + TRAP_ENT_F4]%asi ! context ID
2664 TRACE_NEXT(%g5, %g4, %g6)
2674 sethi %hi(FLUSH_ADDR), %g6
2675 flush %g6
2676 TRACE_PTR(%g1, %g6)
2677 GET_TRACE_TICK(%g6, %g4)
2678 stxa %g6, [%g1 + TRAP_ENT_TICK]%asi
2679 rdpr %tpc, %g6
2680 stna %g6, [%g1 + TRAP_ENT_TPC]%asi
2681 rdpr %tstate, %g6
2682 stxa %g6, [%g1 + TRAP_ENT_TSTATE]%asi
2688 TRACE_SAVE_TL_GL_REGS(%g1, %g6)
2689 rdpr %tt, %g6
2690 stha %g6, [%g1 + TRAP_ENT_TT]%asi
2692 cmp %g6, FAST_IMMU_MISS_TT
2694 cmp %g6, T_INSTR_MMU_MISS
2696 MMU_FAULT_STATUS_AREA(%g6)
2697 ldx [%g6 + %g4], %g6
2698 stxa %g6, [%g1 + TRAP_ENT_TR]%asi ! context ID
2820 sethi %hi(0xffffc000), %g6 ! 1's complement of 0x3fff
2821 andncc %g5, %g6, %g0 ! check lower 14 bits of %tpc
2827 1: rd SOFTINT, %g6
2828 brnz,pn %g6, 2f ! branch if any pending intr