| /illumos-gate/usr/src/uts/common/io/xge/hal/include/ |
| H A D | xgehal-channel.h | 122 * @channelh: Channel "containing" 1 or more completed descriptors.
164 (xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
169 * @channelh: Channel "containing" the @dtrh descriptor.
188 (xge_hal_channel_h channelh,
196 * @channelh: Channel "containing" the @dtrh descriptor.
215 typedef void (*xge_hal_channel_dtr_term_f) (xge_hal_channel_h channelh,
419 __hal_channel_initialize(xge_hal_channel_h channelh,
423 void __hal_channel_terminate(xge_hal_channel_h channelh);
436 __hal_channel_dtr_alloc(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh);
439 __hal_channel_dtr_post(xge_hal_channel_h channelh, xge_hal_dtr_
[all...] |
| H A D | xgehal-fifo.h | 248 * @channelh: Channel handle.
251 xge_hal_fifo_get_max_frags_cnt(xge_hal_channel_h channelh) argument
253 return ((xge_hal_fifo_t *)channelh)->config->max_frags;
257 xge_hal_status_e __hal_fifo_open(xge_hal_channel_h channelh,
260 void __hal_fifo_close(xge_hal_channel_h channelh);
265 __hal_fifo_dtr_align_alloc_map(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
268 __hal_fifo_dtr_align_free_unmap(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
278 __hal_fifo_dtr_post_single(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
281 __hal_fifo_txdl_restore_many(xge_hal_channel_h channelh,
287 xge_hal_fifo_dtr_reserve(xge_hal_channel_h channelh, xge_hal_dtr_
[all...] |
| H A D | xgehal-ring.h | 359 xge_hal_status_e __hal_ring_open(xge_hal_channel_h channelh,
362 void __hal_ring_close(xge_hal_channel_h channelh);
368 void __hal_ring_prc_enable(xge_hal_channel_h channelh);
370 void __hal_ring_prc_disable(xge_hal_channel_h channelh);
398 xge_hal_ring_dtr_reserve(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh);
401 xge_hal_ring_dtr_private(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
407 xge_hal_ring_dtr_info_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
411 xge_hal_ring_dtr_1b_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
419 xge_hal_ring_dtr_3b_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
427 xge_hal_ring_dtr_5b_get(xge_hal_channel_h channelh, xge_hal_dtr_
[all...] |
| H A D | xgehal-device.h | 780 xge_hal_status_e xge_hal_device_handle_tcode(xge_hal_channel_h channelh,
828 xge_hal_channel_msi_set (xge_hal_channel_h channelh, int msi,
834 xge_hal_unmask_msi(xge_hal_channel_h channelh);
837 xge_hal_channel_msix_set(xge_hal_channel_h channelh, int msix_idx);
891 xge_hal_device_bar1_set(xge_hal_device_t *hldev, xge_hal_channel_h channelh,
|
| H A D | xgehal-mgmt.h | 114 xge_hal_mgmt_channel_stats(xge_hal_channel_h channelh,
|
| H A D | xgehal-stats.h | 1551 xge_hal_status_e xge_hal_stats_channel(xge_hal_channel_h channelh,
|
| /illumos-gate/usr/src/uts/common/io/xge/hal/xgehal/ |
| H A D | xgehal-channel-fp.c | 29 __hal_channel_dtr_alloc(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
32 xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
111 __hal_channel_dtr_restore(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, argument
114 xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
138 __hal_channel_dtr_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
140 xge_hal_channel_t *channel = (xge_hal_channel_t*)channelh;
152 __hal_channel_dtr_try_complete(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
154 xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
163 __hal_channel_dtr_complete(xge_hal_channel_h channelh) argument
165 xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
177 __hal_channel_dtr_free(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
198 xge_hal_channel_dtr_count(xge_hal_channel_h channelh) argument
218 xge_hal_channel_userdata(xge_hal_channel_h channelh) argument
234 xge_hal_channel_id(xge_hal_channel_h channelh) argument
[all...] |
| H A D | xgehal-ring-fp.c | 101 * @channelh: Channel handle.
111 xge_hal_ring_dtr_private(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
113 return (char *)__hal_ring_rxd_priv((xge_hal_ring_t *) channelh, dtrh) +
119 * @channelh: Channel handle.
124 * driver (ULD)) and posting on the corresponding channel (@channelh)
135 xge_hal_ring_dtr_reserve(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
143 xge_os_spin_lock(&((xge_hal_channel_t*)channelh)->reserve_lock);
145 xge_os_spin_lock_irq(&((xge_hal_channel_t*)channelh)->reserve_lock,
149 status = __hal_channel_dtr_alloc(channelh, dtrh);
152 xge_os_spin_unlock(&((xge_hal_channel_t*)channelh)
185 xge_hal_ring_dtr_info_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, xge_hal_dtr_info_t *ext_info) argument
224 xge_hal_ring_dtr_info_nb_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, xge_hal_dtr_info_t *ext_info) argument
297 xge_hal_ring_dtr_1b_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, dma_addr_t *dma_pointer, int *pkt_length) argument
362 xge_hal_ring_dtr_3b_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, dma_addr_t dma_pointers[], int sizes[]) argument
439 xge_hal_ring_dtr_5b_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, dma_addr_t dma_pointers[], int sizes[]) argument
472 xge_hal_ring_dtr_pre_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
542 xge_hal_ring_dtr_post_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
576 xge_hal_ring_dtr_post_post_wmb(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
619 xge_hal_ring_dtr_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
661 xge_hal_ring_dtr_next_completed(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh, u8 *t_code) argument
769 xge_hal_ring_dtr_free(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
806 xge_hal_ring_is_next_dtr_completed(xge_hal_channel_h channelh) argument
[all...] |
| H A D | xgehal-channel.c | 36 __hal_channel_dtr_next_reservelist(xge_hal_channel_h channelh, argument
39 xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
56 __hal_channel_dtr_next_freelist(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
58 xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
76 __hal_channel_dtr_next_not_completed(xge_hal_channel_h channelh, argument
82 __hal_channel_dtr_try_complete(channelh, dtrh);
90 __hal_channel_dtr_complete(channelh);
167 __hal_channel_initialize (xge_hal_channel_h channelh, argument
171 xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
224 void __hal_channel_terminate(xge_hal_channel_h channelh) argument
295 xge_hal_channel_open(xge_hal_device_h devh, xge_hal_channel_attr_t *attr, xge_hal_channel_h *channelh, xge_hal_channel_reopen_e reopen) argument
426 xge_hal_channel_abort(xge_hal_channel_h channelh, xge_hal_channel_reopen_e reopen) argument
519 xge_hal_channel_close(xge_hal_channel_h channelh, xge_hal_channel_reopen_e reopen) argument
[all...] |
| H A D | xgehal-fifo-fp.c | 48 __hal_fifo_dtr_post_single(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, argument
51 xge_hal_fifo_t *fifo = (xge_hal_fifo_t *)channelh;
105 __hal_channel_dtr_post(channelh, dtrh);
129 __hal_fifo_txdl_free_many(xge_hal_channel_h channelh, argument
149 __hal_channel_dtr_free(channelh, txdp);
168 __hal_fifo_txdl_restore_many(xge_hal_channel_h channelh, argument
175 xge_assert(((xge_hal_channel_t *)channelh)->reserve_length +
176 txdl_count <= ((xge_hal_channel_t *)channelh)->reserve_initial);
187 __hal_channel_dtr_restore(channelh, (xge_hal_dtr_h )txdp, --i);
192 __hal_channel_dtr_restore(channelh, NUL
256 xge_hal_fifo_dtr_reserve_many(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh, const int frags) argument
402 xge_hal_fifo_dtr_reserve(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
477 xge_hal_fifo_dtr_reserve_sp(xge_hal_channel_h channelh, int dtr_sp_size, xge_hal_dtr_h dtr_sp) argument
500 xge_hal_fifo_dtr_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
552 xge_hal_fifo_dtr_post_many(xge_hal_channel_h channelh, int num, xge_hal_dtr_h dtrs[]) argument
647 xge_hal_fifo_dtr_next_completed(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh, u8 *t_code) argument
726 xge_hal_fifo_dtr_free(xge_hal_channel_h channelh, xge_hal_dtr_h dtr) argument
833 xge_hal_fifo_dtr_buffer_set_aligned(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, int frag_idx, void *vaddr, dma_addr_t dma_pointer, int size, int misaligned_size) argument
925 xge_hal_fifo_dtr_buffer_append(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, void *vaddr, int size) argument
966 xge_hal_fifo_dtr_buffer_finalize(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, int frag_idx) argument
1037 xge_hal_fifo_dtr_buffer_set(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, int frag_idx, dma_addr_t dma_pointer, int size) argument
1143 xge_hal_fifo_is_next_dtr_completed(xge_hal_channel_h channelh) argument
[all...] |
| H A D | xgehal-ring.c | 240 __hal_ring_open(xge_hal_channel_h channelh, xge_hal_channel_attr_t *attr) argument
244 xge_hal_ring_t *ring = (xge_hal_ring_t *)channelh;
285 __hal_ring_close(channelh);
299 __hal_ring_close(channelh);
303 status = __hal_channel_initialize(channelh,
310 __hal_ring_close(channelh);
328 (xge_hal_channel_t *) channelh,
331 __hal_ring_close(channelh);
344 __hal_ring_close(xge_hal_channel_h channelh) argument
346 xge_hal_ring_t *ring = (xge_hal_ring_t *)channelh;
382 __hal_ring_prc_enable(xge_hal_channel_h channelh) argument
460 __hal_ring_prc_disable(xge_hal_channel_h channelh) argument
[all...] |
| H A D | xgehal-fifo.c | 150 __hal_fifo_open(xge_hal_channel_h channelh, xge_hal_channel_attr_t *attr) argument
154 xge_hal_fifo_t *fifo = (xge_hal_fifo_t *)channelh;
265 status = __hal_channel_initialize(channelh, attr,
270 __hal_fifo_close(channelh);
313 __hal_fifo_close(xge_hal_channel_h channelh) argument
315 xge_hal_fifo_t *fifo = (xge_hal_fifo_t *)channelh;
322 __hal_channel_terminate(channelh);
490 __hal_fifo_dtr_align_free_unmap(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
494 xge_hal_fifo_t *fifo = (xge_hal_fifo_t *)channelh;
521 __hal_fifo_dtr_align_alloc_map(xge_hal_channel_h channelh, xge_hal_dtr_ argument
[all...] |
| H A D | xgehal-mgmt.c | 513 * @channelh: HAL channel handle.
531 xge_hal_mgmt_channel_stats(xge_hal_channel_h channelh, argument
536 xge_hal_channel_t *channel = (xge_hal_channel_t* ) channelh;
542 if ((status = xge_hal_stats_channel (channelh, &channel_info)) !=
|
| H A D | xgehal-device-fp.c | 101 * @channelh: Channel handle.
107 xge_hal_device_bar1_set(xge_hal_device_t *hldev, xge_hal_channel_h channelh, argument
110 xge_hal_fifo_t *fifo = (xge_hal_fifo_t *)channelh;
|
| H A D | xgehal-stats.c | 848 * @channelh: Channel handle.
862 xge_hal_stats_channel(xge_hal_channel_h channelh, argument
869 channel = (xge_hal_channel_t *)channelh;
|
| H A D | xgehal-device.c | 5624 * @channelh: Channel handle.
5639 xge_hal_device_handle_tcode (xge_hal_channel_h channelh, argument
5642 xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
6498 * @channelh: HAL channel handle.
6507 xge_hal_channel_msi_set(xge_hal_channel_h channelh, int msi, u32 msi_msg) argument
6509 xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
6645 * @channelh: HAL channel handle.
6654 xge_hal_channel_msix_set(xge_hal_channel_h channelh, int msix_idx) argument
6656 xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
|
| /illumos-gate/usr/src/uts/common/io/xge/drv/ |
| H A D | xgell.c | 207 (xge_hal_ring_dtr_reserve(ring->channelh, &dtr) == XGE_HAL_OK)) {
218 xge_hal_ring_dtr_private(ring->channelh, dtr);
223 xge_hal_ring_dtr_post(ring->channelh, dtr);
531 xgell_rx_dtr_replenish(xge_hal_channel_h channelh, xge_hal_dtr_h dtr, int index, argument
552 rxd_priv = (xgell_rxd_priv_t *)xge_hal_ring_dtr_private(channelh, dtr);
703 xgell_rx_1b_callback(xge_hal_channel_h channelh, xge_hal_dtr_h dtr, u8 t_code, argument
723 xge_hal_ring_dtr_private(channelh, dtr));
728 xge_hal_ring_dtr_1b_get(channelh, dtr, &dma_data, &pkt_length);
729 xge_hal_ring_dtr_info_get(channelh, dtr, &ext_info);
738 (void) xge_hal_device_handle_tcode(channelh, dt
894 xgell_xmit_compl(xge_hal_channel_h channelh, xge_hal_dtr_h dtr, u8 t_code, void *userdata) argument
1565 xgell_rx_dtr_term(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, xge_hal_dtr_state_e state, void *userdata, xge_hal_channel_reopen_e reopen) argument
1719 xgell_tx_term(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, xge_hal_dtr_state_e state, void *userdata, xge_hal_channel_reopen_e reopen) argument
[all...] |
| H A D | xgell.h | 324 xge_hal_channel_h channelh; /* hardware channel */ member in struct:xgell_rx_ring
344 xge_hal_channel_h channelh; /* hardware channel */ member in struct:xgell_tx_ring
|