Searched refs:RADEON_READ (Results 1 - 4 of 4) sorted by relevance

/solaris-x11-s11/open-src/kernel/efb/src/
H A Dradeon_irq.c45 uint32_t irqs = RADEON_READ(RADEON_GEN_INT_STATUS) & mask;
142 if (RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr)
148 RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr);
344 flag = RADEON_READ(RADEON_GEN_INT_CNTL);
H A Dradeon_cp.c827 return (RADEON_READ(RADEON_CLOCK_CNTL_DATA));
833 return (RADEON_READ(RADEON_PCIE_DATA));
840 (unsigned int)RADEON_READ(RADEON_RBBM_STATUS));
842 (unsigned int)RADEON_READ(RADEON_CP_RB_RPTR));
844 (unsigned int)RADEON_READ(RADEON_CP_RB_WPTR));
846 (unsigned int)RADEON_READ(RADEON_AIC_CNTL));
848 (unsigned int)RADEON_READ(RADEON_AIC_STAT));
850 (unsigned int)RADEON_READ(RADEON_AIC_PT_BASE));
852 (unsigned int)RADEON_READ(RADEON_AIC_TLB_ADDR));
854 (unsigned int)RADEON_READ(RADEON_AIC_TLB_DAT
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H A Dradeon_drv.h165 RADEON_READ(RADEON_CP_RB_RPTR))
514 RADEON_READ(RADEON_SCRATCH_REG0 + 4*(x)))
1021 #define RADEON_READ(reg) \ macro
1181 RADEON_READ(RADEON_CP_RB_RPTR); \
H A Dradeon_state.c2265 OUT_RING(RADEON_READ(RADEON_CRTC_OFFSET_CNTL) |
2268 OUT_RING(RADEON_READ(RADEON_CRTC2_OFFSET_CNTL) |

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