Searched refs:INSTPM (Results 1 - 7 of 7) sorted by relevance
| /solaris-x11-s11/open-src/kernel/mdb/modules/ |
| H A D | i915.c | 726 " INSTPM:\tCommand Parser Mode Register\n"
768 ret = i915_read(dev_priv, (uintptr_t)INSTPM, &val);
770 mdb_printf("INSTPM: 0x%lx\n", val);
1764 ret = i915_read(dev_priv, (uintptr_t)INSTPM, &val);
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| /solaris-x11-s11/open-src/kernel/i915/src/ |
| H A D | i915_gem_debug.c | 917 DRM_ERROR("INSTPM: 0x%lx", I915_READ(INSTPM));
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| H A D | i915_gem_execbuffer.c | 995 intel_ring_emit(ring, INSTPM);
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| H A D | intel_pm.c | 1607 I915_WRITE(INSTPM, I915_READ(INSTPM) & ~INSTPM_SELF_EN);
1657 I915_WRITE(INSTPM, I915_READ(INSTPM) | INSTPM_SELF_EN);
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| H A D | i915_irq.c | 2018 DRM_DEBUG(" INSTPM: 0x%08x\n",
2019 I915_READ(INSTPM));
2167 I915_WRITE(INSTPM, _MASKED_BIT_DISABLE(INSTPM_AGPBUSY_DIS));
2238 I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_AGPBUSY_DIS));
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| H A D | intel_ringbuffer.c | 599 I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
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| H A D | i915_reg.h | 836 #define INSTPM 0x020c0 macro
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