Searched refs:VMMR0_INT_DECL (Results 1 - 19 of 19) sorted by relevance
/vbox/include/VBox/vmm/ |
H A D | hm.h | 172 VMMR0_INT_DECL(int) HMR0Init(void); 173 VMMR0_INT_DECL(int) HMR0Term(void); 174 VMMR0_INT_DECL(int) HMR0InitVM(PVM pVM); 175 VMMR0_INT_DECL(int) HMR0TermVM(PVM pVM); 176 VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVM pVM); 177 VMMR0_INT_DECL(int) HMR0EnterSwitcher(PVM pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled); 178 VMMR0_INT_DECL(void) HMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled); 180 VMMR0_INT_DECL(void) HMR0SavePendingIOPortWrite(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, 182 VMMR0_INT_DECL(void) HMR0SavePendingIOPortRead(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, 197 VMMR0_INT_DECL(in [all...] |
H A D | vmm.h | 511 VMMR0_INT_DECL(int) VMMR0TermVM(PVM pVM, PGVM pGVM); 512 VMMR0_INT_DECL(bool) VMMR0IsLongJumpArmed(PVMCPU pVCpu); 513 VMMR0_INT_DECL(bool) VMMR0IsInRing3LongJump(PVMCPU pVCpu); 514 VMMR0_INT_DECL(int) VMMR0ThreadCtxHooksCreate(PVMCPU pVCpu); 515 VMMR0_INT_DECL(void) VMMR0ThreadCtxHooksRelease(PVMCPU pVCpu); 516 VMMR0_INT_DECL(bool) VMMR0ThreadCtxHooksAreCreated(PVMCPU pVCpu); 517 VMMR0_INT_DECL(int) VMMR0ThreadCtxHooksRegister(PVMCPU pVCpu, PFNRTTHREADCTXHOOK pfnHook); 518 VMMR0_INT_DECL(void) VMMR0ThreadCtxHooksDeregister(PVMCPU pVCpu); 519 VMMR0_INT_DECL(bool) VMMR0ThreadCtxHooksAreRegistered(PVMCPU pVCpu); 522 VMMR0_INT_DECL(voi [all...] |
H A D | gim.h | 151 VMMR0_INT_DECL(int) GIMR0InitVM(PVM pVM); 152 VMMR0_INT_DECL(int) GIMR0TermVM(PVM pVM); 153 VMMR0_INT_DECL(int) GIMR0UpdateParavirtTsc(PVM pVM, uint64_t u64Offset);
|
H A D | cpum.h | 1100 VMMR0_INT_DECL(void) CPUMR0SetGuestTscAux(PVMCPU pVCpu, uint64_t uValue); 1101 VMMR0_INT_DECL(uint64_t) CPUMR0GetGuestTscAux(PVMCPU pVCpu); 1462 VMMR0_INT_DECL(int) CPUMR0ModuleInit(void); 1463 VMMR0_INT_DECL(int) CPUMR0ModuleTerm(void); 1464 VMMR0_INT_DECL(int) CPUMR0InitVM(PVM pVM); 1465 VMMR0_INT_DECL(int) CPUMR0Trap07Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx); 1466 VMMR0_INT_DECL(int) CPUMR0LoadGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx); 1467 VMMR0_INT_DECL(int) CPUMR0SaveGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx); 1468 VMMR0_INT_DECL(int) CPUMR0SaveHostDebugState(PVM pVM, PVMCPU pVCpu); 1469 VMMR0_INT_DECL(boo [all...] |
H A D | pdmapi.h | 197 VMMR0_INT_DECL(int) PDMR0DriverCallReqHandler(PVM pVM, PPDMDRIVERCALLREQHANDLERREQ pReq); 222 VMMR0_INT_DECL(int) PDMR0DeviceCallReqHandler(PVM pVM, PPDMDEVICECALLREQHANDLERREQ pReq);
|
H A D | pgm.h | 424 VMMR0_INT_DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM, PVMCPU pVCpu); 425 VMMR0_INT_DECL(int) PGMR0PhysFlushHandyPages(PVM pVM, PVMCPU pVCpu); 426 VMMR0_INT_DECL(int) PGMR0PhysAllocateLargeHandyPage(PVM pVM, PVMCPU pVCpu); 427 VMMR0_INT_DECL(int) PGMR0PhysSetupIommu(PVM pVM);
|
/vbox/src/VBox/VMM/VMMR0/ |
H A D | GIMR0.cpp | 35 VMMR0_INT_DECL(int) GIMR0InitVM(PVM pVM) 58 VMMR0_INT_DECL(int) GIMR0TermVM(PVM pVM) 91 VMMR0_INT_DECL(int) GIMR0UpdateParavirtTsc(PVM pVM, uint64_t u64Offset)
|
H A D | PDMR0Driver.cpp | 39 VMMR0_INT_DECL(int) PDMR0DriverCallReqHandler(PVM pVM, PPDMDRIVERCALLREQHANDLERREQ pReq)
|
H A D | GIMR0Hv.cpp | 140 VMMR0_INT_DECL(int) gimR0HvInitVM(PVM pVM) 159 VMMR0_INT_DECL(int) gimR0HvTermVM(PVM pVM)
|
H A D | PGMR0.cpp | 68 VMMR0_INT_DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM, PVMCPU pVCpu) 183 VMMR0_INT_DECL(int) PGMR0PhysFlushHandyPages(PVM pVM, PVMCPU pVCpu) 215 VMMR0_INT_DECL(int) PGMR0PhysAllocateLargeHandyPage(PVM pVM, PVMCPU pVCpu) 254 VMMR0_INT_DECL(int) GPciRawR0GuestPageBeginAssignments(PGVM pGVM) 272 VMMR0_INT_DECL(int) GPciRawR0GuestPageAssign(PGVM pGVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys) 297 VMMR0_INT_DECL(int) GPciRawR0GuestPageUnassign(PGVM pGVM, RTGCPHYS GCPhys) 320 VMMR0_INT_DECL(int) GPciRawR0GuestPageEndAssignments(PGVM pGVM) 337 VMMR0_INT_DECL(int) GPciRawR0GuestPageUpdate(PGVM pGVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys) 357 VMMR0_INT_DECL(int) PGMR0PhysSetupIommu(PVM pVM)
|
H A D | CPUMR0.cpp | 110 VMMR0_INT_DECL(int) CPUMR0ModuleInit(void) 123 VMMR0_INT_DECL(int) CPUMR0ModuleTerm(void) 187 VMMR0_INT_DECL(int) CPUMR0InitVM(PVM pVM) 339 VMMR0_INT_DECL(int) CPUMR0Trap07Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 399 VMMR0_INT_DECL(int) CPUMR0LoadGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 459 VMMR0_INT_DECL(int) CPUMR0SaveGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 574 VMMR0_INT_DECL(bool) CPUMR0DebugStateMaybeSaveGuestAndRestoreHost(PVMCPU pVCpu, bool fDr6) 654 VMMR0_INT_DECL(bool) CPUMR0DebugStateMaybeSaveGuest(PVMCPU pVCpu, bool fDr6) 697 VMMR0_INT_DECL(void) CPUMR0LoadGuestDebugState(PVMCPU pVCpu, bool fDr6) 739 VMMR0_INT_DECL(voi [all...] |
H A D | HMR0.cpp | 607 VMMR0_INT_DECL(int) HMR0Init(void) 714 VMMR0_INT_DECL(int) HMR0Term(void) 983 VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVM pVM) 1185 VMMR0_INT_DECL(int) HMR0InitVM(PVM pVM) 1252 VMMR0_INT_DECL(int) HMR0TermVM(PVM pVM) 1275 VMMR0_INT_DECL(int) HMR0SetupVM(PVM pVM) 1327 VMMR0_INT_DECL(int) HMR0EnterCpu(PVMCPU pVCpu) 1358 VMMR0_INT_DECL(int) HMR0Enter(PVM pVM, PVMCPU pVCpu) 1407 VMMR0_INT_DECL(int) HMR0LeaveCpu(PVMCPU pVCpu) 1440 VMMR0_INT_DECL(voi [all...] |
H A D | VMMR0.cpp | 419 VMMR0_INT_DECL(int) VMMR0TermVM(PVM pVM, PGVM pGVM) 456 VMMR0_INT_DECL(int) VMMR0ThreadCtxHooksCreate(PVMCPU pVCpu) 480 VMMR0_INT_DECL(void) VMMR0ThreadCtxHooksRelease(PVMCPU pVCpu) 495 VMMR0_INT_DECL(int) VMMR0ThreadCtxHooksRegister(PVMCPU pVCpu, PFNRTTHREADCTXHOOK pfnThreadHook) 509 VMMR0_INT_DECL(void) VMMR0ThreadCtxHooksDeregister(PVMCPU pVCpu) 530 VMMR0_INT_DECL(bool) VMMR0ThreadCtxHooksAreCreated(PVMCPU pVCpu) 542 VMMR0_INT_DECL(bool) VMMR0ThreadCtxHooksAreRegistered(PVMCPU pVCpu) 1779 VMMR0_INT_DECL(bool) VMMR0IsLongJumpArmed(PVMCPU pVCpu) 1798 VMMR0_INT_DECL(bool) VMMR0IsInRing3LongJump(PVMCPU pVCpu) 1907 VMMR0_INT_DECL(voi [all...] |
H A D | PDMR0Device.cpp | 1021 VMMR0_INT_DECL(int) PDMR0DeviceCallReqHandler(PVM pVM, PPDMDEVICECALLREQHANDLERREQ pReq)
|
H A D | HMVMXR0.cpp | 6826 VMMR0_INT_DECL(int) HMR0EnsureCompleteBasicContext(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
|
/vbox/src/VBox/VMM/include/ |
H A D | GIMKvmInternal.h | 238 VMMR0_INT_DECL(int) gimR0KvmInitVM(PVM pVM); 239 VMMR0_INT_DECL(int) gimR0KvmTermVM(PVM pVM); 240 VMMR0_INT_DECL(int) gimR0KvmUpdateParavirtTsc(PVM pVM, uint64_t u64Offset);
|
H A D | GIMHvInternal.h | 504 VMMR0_INT_DECL(int) gimR0HvInitVM(PVM pVM); 505 VMMR0_INT_DECL(int) gimR0HvTermVM(PVM pVM); 506 VMMR0_INT_DECL(int) gimR0HvUpdateParavirtTsc(PVM pVM, uint64_t u64Offset);
|
/vbox/include/VBox/ |
H A D | cdefs.h | 396 /** @def VMMR0_INT_DECL 401 # define VMMR0_INT_DECL(type) DECLHIDDEN(type) VBOXCALL macro 403 # define VMMR0_INT_DECL(type) DECL_INVALID(type) macro
|
/vbox/src/VBox/VMM/VMMAll/ |
H A D | CPUMAllMsrs.cpp | 5632 VMMR0_INT_DECL(uint64_t) CPUMR0GetGuestTscAux(PVMCPU pVCpu) 5646 VMMR0_INT_DECL(void) CPUMR0SetGuestTscAux(PVMCPU pVCpu, uint64_t uValue)
|
Completed in 168 milliseconds