VMM,REM: CPUID revamp - almost there now.

PATM,CPUM: CPUID patch update.

CPUM: Working on refactoring the guest CPUID handling.

VMM: Removed VBOX_WITH_NEW_MSR_CODE and the code marked ifndef VBOX_WITH_NEW_MSR_CODE.

VMM/MSRs: Added status codes for returning to ring-3 to service the MSR access.

VMM/CPUM: Fix EFER WRMSR to ignore EFER.LMA bit, trunk regression caused by r96058.

VMM/CPUM: Raise #GP(0) while writing to disallowed EFER bits.

VMM/CPUM: Assertion.

VMM/GIM: Hyper-V provider, work-in-progress.

VMM: Retire aGuestCpuIdHyper legacy array.

Fixes for canonical address in MSRs.

Instrumented cpumMsrWr_Ia32SysEnterEip with a LogRel for tracking the #GP(0) issue on the P4 Xeon.

CPUMAllMsrs.cpp: Quickfix for IA32_APIC_BASE read #GP.

Implemented MSR 0x00000035 on i7, it reports threads and core counts on intel.

CPUM,VMM: More work related to bus, cpu and tsc frequency info. Should cover older core and p6 as well as p4 now.

CPUM,DevEFI: Bus vs cpu clock ratio fixes for more recent CPUs. Older CPUs (<=Core2) still need some more work.

cpumMsrWr_Ia32BiosSignId should ignore writes, not GP. Only used on P4.

CPUMAllMsrs.cpp: Fixed cpumLookupMsrRange to resolved aliases. Also reimplemented it as a binary search.

CPUM: More msr hacking.

CPUM: Added AMD Athlon64 3200+ (130nm) and Pentium4 (mod 4, w/ 64-bit).

VMM: Mapped the MSRs for a core 2 penryn cpu.

Added data for i5-3570.

MSR rewrite: initial hacking - half disabled.