Searched refs:reset_counter (Results 1 - 5 of 5) sorted by relevance

/solaris-x11-s11/open-src/kernel/i915/src/
H A Di915_gem.c698 * @reset_counter: reset sequence associated with the given seqno
702 * Note: It is of utmost importance that the passed in seqno and reset_counter
704 * locks are involved, it is sufficient to read the reset_counter before
706 * reset_counter _must_ be read before, and an appropriate smp_rmb must be
713 unsigned reset_counter,
734 reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter))
751 reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter),
755 reset_counter !
712 __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, unsigned reset_counter, bool interruptible, clock_t timeout) argument
873 unsigned reset_counter; local
1972 unsigned reset_counter; local
3049 unsigned reset_counter; local
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H A Di915_drv.h951 atomic_t reset_counter; member in struct:i915_gpu_error
954 * Special values/flags for reset_counter
1742 return (atomic_read(&error->reset_counter)
1748 return atomic_read(&error->reset_counter) == I915_WEDGED;
H A Dintel_drv.h310 unsigned int reset_counter; member in struct:intel_crtc
H A Di915_irq.c1384 * error->reset_counter twice. We only need to take care of another
1407 atomic_inc(&dev_priv->gpu_error.reset_counter);
1415 atomic_set(&error->reset_counter, I915_WEDGED);
2088 &dev_priv->gpu_error.reset_counter);
H A Dintel_display.c2774 intel_crtc->reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter))
7600 intel_crtc->reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);

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