/illumos-gate/usr/src/cmd/mdb/sparc/v9/kmdb/ |
H A D | kaif_resume.s | 82 add %g6, KRS_FPREGS, %g4 ! %g4 = &cpusave[this_cpuid].krs_fpregs 84 ldx [%g4 + FPU_FPRS], %g2 89 LOAD_FPREGS(%g4) 90 ldx [%g4 + FPU_FSR], %fsr 94 GET_NWIN(%g1, %g4); ! %g1 is scratch, %g4 set to nwin-1 95 wrpr %g4, %cleanwin 97 sub %g4, 1, %g1 111 cmp %g2, %g4 [all...] |
H A D | kaif_startup.s | 98 * %g4 will be preserved. 126 * %g4 - the %pstate value to get us back to our current globals set 127 * %g4 not applicable on sun4v as it uses %gl 157 stx %g4, [%o5 + KREG_OFF(KREG_G4)] 186 ldx [%g5 + KREG_OFF(KREG_PC)], %g4 187 ADD_CRUMB(%g6, KRM_PC, %g4, %g1) 188 ldx [%g5 + KREG_OFF(KREG_TT)], %g4 189 ADD_CRUMB(%g6, KRM_TT, %g4, %g1) 219 rdpr %pil, %g4 220 stx %g4, [ [all...] |
/illumos-gate/usr/src/uts/sfmmu/ml/ |
H A D | sfmmu_kdi.s | 64 * Parameters: %g1: VA, %g2: sfmmup, %g4: hmeshift 65 * Scratch: %g4, %g5, %g6 available 66 * Return: Hash value in %g4 70 srlx %g1, %g4, %g4; /* va >> hmeshift */ \ 71 xor %g4, %g2, %g4; /* hash in g4 */ \ 81 and %g4, %g5, %g4; \ [all...] |
H A D | sfmmu_asm.s | 679 * %g4 = scratch 683 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4) 690 mov %g0, %g4 ! %g4 = ret = 0 702 mov %g0, %g4 ! %g4 = ret = 0 707 mov 1, %g4 !%g4 = ret = 1 732 * %g4 = scratch 734 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4) [all...] |
/illumos-gate/usr/src/uts/sun4u/sunfire/ml/ |
H A D | sysctrl_asm.s | 64 * %g4 - arg3 68 * %g4 - temporary 72 CPU_INDEX(%g4, %g5) 73 sll %g4, 2, %g4 74 add %g4, %g1, %g4 ! compute address of gate id 76 st %g4, [%g4] ! indicate we are ready 83 ld [%g2], %g4 [all...] |
/illumos-gate/usr/src/uts/sun4v/ml/ |
H A D | mach_interrupt.s | 70 ! %g4 queue size mask 75 mov CPU_MONDO_Q_TL, %g4 76 ldxa [%g4]ASI_QUEUE, %g7 ! %g7 = tail ptr 84 ldx [%g2 + MCPU_CPU_Q_SIZE], %g4 ! queue size 85 sub %g4, 1, %g4 ! %g4 = queue size mask 104 and %g6, %g4, %g6 ! and size mask for wrap around 110 TRACE_PTR(%g4, %g6) 112 stxa %g6, [%g4 [all...] |
H A D | mach_xc.s | 79 TRACE_PTR(%g4, %g6) 81 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi 83 stha %g6, [%g4 + TRAP_ENT_TL]%asi 85 stha %g6, [%g4 + TRAP_ENT_TT]%asi 86 stna %o3, [%g4 + TRAP_ENT_TR]%asi ! pc of the TL>0 handler 88 stna %g6, [%g4 + TRAP_ENT_TPC]%asi 90 stxa %g6, [%g4 + TRAP_ENT_TSTATE]%asi 91 stna %sp, [%g4 + TRAP_ENT_SP]%asi 92 stna %o1, [%g4 + TRAP_ENT_F1]%asi ! arg 1 93 stna %o2, [%g4 [all...] |
H A D | trap_table.s | 84 * %g4 desire %pil 129 sub %g0, 1, %g4 ;\ 165 sub %g0, 1, %g4 ;\ 184 sub %g0, 1, %g4 ;\ 234 sub %g0, 1, %g4 ;\ 245 sub %g0, 1, %g4 ;\ 252 sub %g0, 1, %g4 ;\ 338 add %sp, 16, %g4 ;\ 339 sta %l4, [%g4 + %g0]asi_num ;\ 340 sta %l5, [%g4 [all...] |
/illumos-gate/usr/src/uts/sun4u/cpu/ |
H A D | us3_cheetah_asm.s | 113 * Get the diagnostic logout data. %g4 must be initialized to 118 ldxa [%g0]ASI_ESTATE_ERR, %g4 119 and %g4, EN_REG_CEEN, %g4 121 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4) 145 set CH_ECACHE_8M_SIZE, %g4 156 CH_ECACHE_FLUSHALL(%g4, %g5, %g6) 175 ASM_LD(%g4, dcache_size) 177 CH_DCACHE_FLUSHALL(%g4, [all...] |
H A D | us3_cheetahplus_asm.s | 184 * Get the diagnostic logout data. %g4 must be initialized to 189 ldxa [%g0]ASI_ESTATE_ERR, %g4 190 and %g4, EN_REG_CEEN, %g4 192 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4) 216 PN_L2_FLUSHALL(%g3, %g4, %g5) 218 set CH_ECACHE_MAX_SIZE, %g4 225 set PN_L3_SIZE, %g4 228 CHP_ECACHE_FLUSHALL(%g4, [all...] |
H A D | us3_jalapeno_asm.s | 409 andn %g3, EN_REG_NCEEN + EN_REG_CEEN, %g4 410 stxa %g4, [%g0]ASI_ESTATE_ERR 417 * into this macro via %g4. Output only valid if cpu_private 420 * %g4 = Trap information stored in the cpu logout flags field 424 * %g4 = scr4 426 and %g3, EN_REG_CEEN, %g4 ! store the CEEN value, TL=0 428 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4) 435 CPU_INDEX(%g4, %g5) 436 mulx %g4, CPU_NODE_SIZ [all...] |
H A D | us3_common_asm.s | 319 ldub [%g2 + SFMMU_CEXT], %g4 ! %g4 = sfmmup->cext 320 sll %g4, CTXREG_EXT_SHIFT, %g4 321 or %g6, %g4, %g6 ! %g6 = pgsz | cnum 323 set MMU_PCONTEXT, %g4 324 ldxa [%g4]ASI_DMMU, %g5 /* rd old ctxnum */ 328 stxa %g6, [%g4]ASI_DMMU /* wr new ctxum */ 331 stxa %g5, [%g4]ASI_DMMU /* restore old ctxnum */ 362 set SFMMU_PGCNT_MASK, %g4 [all...] |
/illumos-gate/usr/src/uts/sun4u/ml/ |
H A D | mach_xc.s | 77 TRACE_PTR(%g4, %g6) 79 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi 81 stha %g6, [%g4 + TRAP_ENT_TL]%asi 83 stha %g6, [%g4 + TRAP_ENT_TT]%asi 84 stna %o3, [%g4 + TRAP_ENT_TR]%asi ! pc of the TL>0 handler 86 stna %g6, [%g4 + TRAP_ENT_TPC]%asi 88 stxa %g6, [%g4 + TRAP_ENT_TSTATE]%asi 89 stna %sp, [%g4 + TRAP_ENT_SP]%asi 90 stna %o1, [%g4 + TRAP_ENT_F1]%asi ! arg 1 91 stna %o2, [%g4 [all...] |
H A D | mach_interrupt.s | 77 set KERNELBASE, %g4 78 cmp %g5, %g4 84 set _end, %g4 ! _end is highest kernel address 85 cmp %g5, %g4 95 set CTXREG_CTX_MASK, %g4 ! check Pcontext 96 btst %g4, %g1 123 ! g4: arg4 130 TRACE_PTR(%g4, %g6) 132 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi 134 stha %g6, [%g4 [all...] |
H A D | trap_table.s | 83 * %g4 desire %pil 128 sub %g0, 1, %g4 ;\ 160 sub %g0, 1, %g4 ;\ 179 sub %g0, 1, %g4 ;\ 201 sub %g0, 1, %g4 ;\ 241 sub %g0, 1, %g4 ;\ 252 sub %g0, 1, %g4 ;\ 259 sub %g0, 1, %g4 ;\ 345 add %sp, 16, %g4 ;\ 346 sta %l4, [%g4 [all...] |
/illumos-gate/usr/src/uts/sparc/dtrace/ |
H A D | dtrace_asm.s | 203 sethi %hi(nwin_minus_one), %g4 204 ld [%g4 + %lo(nwin_minus_one)], %g4 217 add %g4, %g3, %g3 221 mov %i7, %g4 224 mov %g4, %o0 254 mov %l0, %g4 255 mov %l1, %g4 256 mov %l2, %g4 257 mov %l3, %g4 [all...] |
/illumos-gate/usr/src/lib/libc/sparc/gen/ |
H A D | strlcpy.s | 59 subcc %g0, %i2, %g4 ! n = -n or n == 0 ? 68 ldub [%i3 + %g4], %l1 ! l1 = src[] 70 stub %l1, [%i2 + %g4] ! dst[] = src[] 72 add %i2, %g4, %i2 ! get single dest ptr for strlen 73 addcc %g4, 1, %g4 ! src++ dest++ n-- 81 add %i2, %g4, %l0 ! l0 = dest 89 ld [%i3 + %g4], %l1 ! l1 = src[] 90 addcc %g4, 4, %g4 ! [all...] |
/illumos-gate/usr/src/uts/sparc/v9/ml/ |
H A D | syscall_trap.s | 136 sethi %hi(syscalltrace), %g4 137 ld [%g4 + %lo(syscalltrace)], %g4 138 orcc %g3, %g4, %g0 ! pre_syscall OR syscalltrace? 169 sll %g1, SYSENT_SHIFT, %g4 ! delay - get index 170 add %g3, %g4, %l4 192 andn %g5, PSTATE_IE | PSTATE_AM, %g4 193 wrpr %g0, %g4, %pstate ! disable interrupt 194 TRACE_PTR(%g4, %g2) ! get trace pointer 196 stxa %g2, [%g4 [all...] |
/illumos-gate/usr/src/uts/sun4u/starfire/ml/ |
H A D | idn_asm.s | 223 rd %tick, %g4 224 add %g2, %g4, %g2 226 cmp %g2, %g4 228 rd %tick, %g4 297 ldx [%g1 + IDN_DMV_QBASE], %g4 ! g4 = idn_dmv_qbase 313 add %g5, %g4, %g5 ! g5 = idn_dmv_current 317 sub %g3, IDN_DMV_CURRENT, %g4 322 add %g4, IDN_DMV_LOSTINTR, %g3 328 set dmv_finish_intr, %g4 [all...] |
/illumos-gate/usr/src/lib/libc/sparcv9/gen/ |
H A D | strncpy.s | 69 subcc %g0, %o2, %g4 ! n = -n, n == 0 ? 78 ldub [%o3 + %g4], %o1 ! src[] 79 stb %o1, [%o2 + %g4] ! dst[] = src[] 80 addcc %g4, 1, %g4 ! src++, dst++, n-- 84 add %o2, %g4, %o3 ! need single dest pointer for fill 92 add %o2, %g4, %g5 ! dst 110 ldx [%o3 + %g4], %o1 ! src dword 111 addcc %g4, 8, %g4 ! [all...] |
/illumos-gate/usr/src/cmd/mdb/sun4u/v9/kmdb/ |
H A D | mach_asmutil.h | 48 mov %g4, %o4 /* set %o4 = return %pstate value */;\ 59 mov PTSTATE_KERN_COMMON|PSTATE_AG, %g4 63 mov PTSTATE_KERN_COMMON|PSTATE_IG, %g4
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/illumos-gate/usr/src/cmd/mdb/sun4v/v9/kmdb/ |
H A D | mach_asmutil.h | 52 /* now save %g5, %g4 and %g7 cause we are going to gl 0 */; \ 54 mov %g4, %o4 /* %o4 is %pstate value now */; \ 60 mov %o4, %g4 /* restore %g4 as %pstate */; \ 70 mov PTSTATE_KERN_COMMON, %g4
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/illumos-gate/usr/src/uts/sun4/ml/ |
H A D | xc.s | 88 * %g4 - pil 96 rdpr %pil, %g4 97 cmp %g4, XCALL_PIL 99 movl %xcc, XCALL_PIL, %g4
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/illumos-gate/usr/src/common/bignum/sun4u/ |
H A D | mont_mulf_v9.s | 249 /* 0x0034 */ sub %g5,1,%g4 274 /* 0x0068 86 */ cmp %g4,7 280 /* 0x0080 90 */ or %g0,40,%g4 290 /* 0x00a8 */ ldd [%i1+%g4],%f2 291 /* 0x00ac */ or %g0,56,%g4 309 /* 0x00f4 */ ldd [%l2+%g4],%f2 311 /* 0x00fc 91 */ and %g5,%l3,%g4 328 /* 0x013c 91 */ sllx %g4,16,%o4 329 /* 0x0140 96 */ add %i2,2,%g4 341 /* 0x0170 87 */ sra %g4, [all...] |
/illumos-gate/usr/src/common/crypto/des/sun4u/ |
H A D | des_crypt_asm.s | 2306 srlx %g2, 7, %g4 2312 or %g2, %g4, %g2 2359 ldx [%i5 + 104], %g4 ! mid_4 2380 and %o0, %g4, %o0 2384 and %o1, %g4, %o1 2411 srl %i2, 0, %g4 2424 or %g4, %g5, %g4 2427 and %g4, %g3, %g1 2431 and %g4, [all...] |