Lines Matching refs:g4
679 * %g4 = scratch
683 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4)
690 mov %g0, %g4 ! %g4 = ret = 0
702 mov %g0, %g4 ! %g4 = ret = 0
707 mov 1, %g4 !%g4 = ret = 1
732 * %g4 = scratch
734 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4)
741 mov %g0, %g4 ! %g4 = ret = 0
751 mov 1, %g4 ! %g4 = ret = 1
770 ld [%o3 + MMU_CTX_NCTXS], %g4
775 * %g4 = mmu nctxs
785 cmp %o1, %g4
793 mov %g0, %g4 ! %g4 = ret = 0
825 mov 1, %g4 ! %g4 = ret = 1
859 mov %g4, %o0 ! %o0 = ret
1578 TTETOPFN(%g1, %o1, sfmmu_ttetopfn_l1, %g2, %g3, %g4)
1728 GET_MMU_BOTH_TAGACC(%g5 /*dtag*/, %g2 /*itag*/, %g6, %g4)
1745 sethi %hi(test_ptl1_panic), %g4
1746 ld [%g4 + %lo(test_ptl1_panic)], %g1
1747 st %g0, [%g4 + %lo(test_ptl1_panic)]
1753 HAT_GLOBAL_STAT(HATSTAT_PAGEFAULT, %g6, %g4)
1763 mov -1, %g4
1769 GET_MMU_BOTH_TAGACC(%g5 /*dtag*/, %g2 /*itag*/, %g4, %g6)
1791 mov -1, %g4
1798 GET_MMU_BOTH_TAGACC(%g5 /*dtag*/, %g2 /*itag*/, %g4, %g3)
1812 mov PIL_15, %g4
1824 rdpr %tstate, %g4
1825 srlx %g4, TSTATE_GL_SHIFT, %g4
1826 and %g4, TSTATE_GL_MASK, %g4
1827 cmp %g4, 1
1833 set rtt_fill_start, %g4
1834 cmp %g1, %g4
1837 set rtt_fill_end, %g4
1838 cmp %g1, %g4
1868 and %g2, WTRAP_TTMASK, %g4
1869 cmp %g4, WTRAP_TYPE
1873 set trap_table, %g4
1874 cmp %g1, %g4
1877 set etrap_table, %g4
1878 cmp %g1, %g4
1913 CPU_PADDR(%g1, %g4)
1915 lda [%g1]ASI_MEM, %g4
1916 brnz,a,pt %g4, sfmmu_mmu_trap
1943 GET_MMU_D_ADDR(%g3, /*scratch*/ %g4)
1951 GET_MMU_D_TAGACC(%g2 /* tagacc */, %g4 /*scratch*/)
1959 mov -1, %g4
2461 * g4 - g7 = scratch registers
2465 GET_1ST_TSBE_PTR(%g2, %g1, %g4, %g5)
2472 GET_2ND_TSBE_PTR(%g2, %g3, %g4, %g5)
2482 GET_2ND_TSBE_PTR(%g2, %g3, %g4, %g5)
2489 GET_2ND_TSBE_PTR(%g7, %g1, %g3, %g4, %g5, sfmmu_uprot)
2521 RUNTIME_PATCH_SETX(%g4, %g5)
2522 /* %g4 = contents of ktsb_base or ktsb_pbase */
2526 or %g4, %g1, %g1 ! form tsb ptr
2527 ldda [%g1]RUNTIME_PATCH, %g4 ! %g4 = tag, %g5 = data
2528 cmp %g4, %g7
2536 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
2540 RUNTIME_PATCH_SETX(%g4, %g6)
2541 /* %g4 = contents of ktsb4m_base or ktsb4m_pbase */
2545 add %g4, %g3, %g3 ! %g3 = 4m tsbe ptr
2546 ldda [%g3]RUNTIME_PATCH, %g4 ! %g4 = tag, %g5 = data
2547 cmp %g4, %g7
2553 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
2579 KPM_TLBMISS_STAT_INCR(%g2, %g4, %g5, %g6, kpmtlbm_stat_out)
2600 ldda [%g7 + %g1]RUNTIME_PATCH, %g4 ! %g4 = tag, %g5 = data
2602 cmp %g6, %g4 ! compare tag
2606 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
2648 ldda [%g7 + %g3]RUNTIME_PATCH, %g4 ! %g4 = tag, %g5 = data
2650 cmp %g6, %g4 ! compare tag
2657 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
2703 /* g4 - g5 = clobbered by PROBE_1ST_ITSB */
2722 /* g4 - g5 = clobbered by PROBE_1ST_DTSB */
2745 GET_1ST_TSBE_PTR(%g2, %g1, %g4, %g5)
2747 /* g4 - g5 = clobbered here */
2749 GET_2ND_TSBE_PTR(%g2, %g3, %g4, %g5)
2778 * g4 - g6 = scratch registers
2789 GET_4TH_TSBE_PTR(%g2, %g6, %g4, %g5)
2795 GET_2ND_TSBE_PTR(%g2, %g3, %g4, %g5)
2801 GET_3RD_TSBE_PTR(%g2, %g6, %g4, %g5)
2812 GET_2ND_TSBE_PTR(%g6, %g7, %g3, %g4, %g5, sfmmu_uitlb)
2835 * g4 - %g6 = scratch registers
2855 GET_2ND_TSBE_PTR(%g2, %g3, %g4, %g5)
2865 GET_4TH_TSBE_PTR(%g2, %g6, %g4, %g5)
2875 GET_3RD_TSBE_PTR(%g2, %g6, %g4, %g5)
2886 * g4 - g6 = scratch registers
2903 GET_4TH_TSBE_PTR(%g2, %g6, %g4, %g5)
2913 GET_2ND_TSBE_PTR(%g2, %g3, %g4, %g5)
2925 GET_3RD_TSBE_PTR(%g2, %g6, %g4, %g5)
2949 GET_1ST_TSBE_PTR(%g2, %g1, %g4, %g5)
2961 mov %g1, %g4
2962 GET_1ST_TSBE_PTR(%g4, %g1, %g5, sfmmu_udtlb)
2988 GET_2ND_TSBE_PTR(%g2, %g3, %g4, %g5)
2992 GET_2ND_TSBE_PTR(%g2, %g7, %g3, %g4, %g5, sfmmu_udtlb)
3000 /* g4 - g5 = clobbered here; %g7 still vpg_4m at this point */
3016 * g4 - g7 = scratch registers
3064 ISM_CHECK(%g2, %g6, %g3, %g4, %g5, %g7, %g1, tsb_l1, tsb_ism)
3068 * %g1 %g3, %g4, %g5, %g7 all clobbered
3082 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3090 ldub [%g6 + TSBMISS_UTTEFLAGS], %g4
3091 and %g4, HAT_512K_FLAG, %g5
3111 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3119 ldub [%g6 + TSBMISS_UTTEFLAGS], %g4
3120 and %g4, HAT_4M_FLAG, %g5
3128 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3140 ldub [%g6 + TSBMISS_UTTEFLAGS], %g4
3141 and %g4, HAT_32M_FLAG, %g5
3149 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3158 ldub [%g6 + TSBMISS_UTTEFLAGS], %g4
3159 and %g4, HAT_256M_FLAG, %g5
3167 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3177 * g4 = tte pa
3202 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3208 ldub [%g6 + TSBMISS_URTTEFLAGS], %g4
3209 and %g4, HAT_512K_FLAG, %g5
3217 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3223 ldub [%g6 + TSBMISS_URTTEFLAGS], %g4
3224 and %g4, HAT_4M_FLAG, %g5
3231 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3237 ldub [%g6 + TSBMISS_URTTEFLAGS], %g4
3238 and %g4, HAT_32M_FLAG, %g5
3246 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3252 ldub [%g6 + TSBMISS_URTTEFLAGS], %g4
3253 and %g4, HAT_256M_FLAG, %g5
3261 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3273 * g4 = tte pa
3290 * g4 = tte pa
3302 TTE_SET_REFMOD_ML(%g3, %g4, %g6, %g7, %g5, tsb_lset_refmod,
3334 TTE_SET_REF_ML(%g3, %g4, %g6, %g7, %g5, tsb_lset_ref)
3339 * g4 = patte
3419 TSB_UPDATE_TL(%g1, %g3, %g2, %g4, %g7, %g6, locked_tsb_l3)
3431 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3435 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3462 TSB_UPDATE_TL(%g1, %g3, %g2, %g4, %g7, %g6, locked_tsb_l4)
3475 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3479 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3497 * g4 = patte
3517 TSB_UPDATE_TL_PN(%g1, %g5, %g2, %g4, %g7, %g3, locked_tsb_l5) /* update TSB */
3519 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3533 TSB_UPDATE_TL_PN(%g1, %g5, %g2, %g4, %g7, %g3, locked_tsb_l6) /* update TSB */
3536 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3563 TSB_UPDATE_TL(%g1, %g3, %g2, %g4, %g7, %g6, locked_tsb_l7)
3573 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3577 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3589 * g4 = physical address of ismmap->ism_sfmmu
3592 ldna [%g4]ASI_MEM, %g7 /* g7 = ism hatid */
3596 sub %g4, (IMAP_ISMHAT - IMAP_VB_SHIFT), %g5
3597 lduba [%g5]ASI_MEM, %g4 /* g4 = imap_vb_shift */
3598 srlx %g3, %g4, %g3 /* clr size field */
3600 sllx %g3, %g4, %g3 /* g3 = ism vbase */
3601 and %g2, %g1, %g4 /* g4 = ctx number */
3604 or %g2, %g4, %g2 /* g2 = (pseudo-)tagacc */
3606 lduha [%g5]ASI_MEM, %g4 /* g5 = pa of imap_hatflags */
3608 and %g4, HAT_CTX1_FLAG, %g5 /* g5 = imap_hatflags */
3624 * g4 = imap_hatflags
3630 and %g4, HAT_4M_FLAG, %g5 /* g4 = imap_hatflags */
3635 and %g4, HAT_32M_FLAG, %g5 /* check default 32M next */
3643 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT32M,
3655 and %g4, HAT_256M_FLAG, %g5 /* 256M is last resort */
3662 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT256M,
3674 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT4M,
3688 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT64K,
3719 MMU_FAULT_STATUS_AREA(%g4)
3720 ldx [%g4 + MMFSA_I_CTX], %g5
3721 ldx [%g4 + MMFSA_D_CTX], %g4
3722 move %icc, %g5, %g4
3724 move %icc, %g5, %g4
3726 mov MMU_TAG_ACCESS, %g4
3727 ldxa [%g4]ASI_DMMU, %g2
3728 ldxa [%g4]ASI_IMMU, %g5
3732 sllx %g2, TAGACC_CTX_LSHIFT, %g4
3734 brnz,pn %g4, 3f /* skip if not kernel */
3739 srlx %g2, MMU_PAGESHIFT, %g4
3740 cmp %g3, %g4
3773 GET_MMU_D_ADDR(%g3, %g4)
3800 GET_MMU_D_ADDR(%g3, %g4)
3828 GET_MMU_D_ADDR(%g3, %g4)
3947 GET_TTE(%o0, %o4, %g1, %g2, %o5, %g4, %g6, %g5, %g3,
3964 TTETOPFN(%g1, %o0, vatopfn_l2, %g2, %g3, %g4)
4088 GET_TTE(%o0, %o4, %g3, %g4, %g1, %o5, %g6, %o1, %g5,
4099 TTETOPFN(%g3, %o0, kvaszc2pfn_l2, %g2, %g4, %g5)
4209 ldub [%g6 + KPMTSBM_FLAGS], %g4
4210 and %g4, KPMTSBM_ENABLE_FLAG, %g5
4229 and %g4, KPMTSBM_TLTSBM_FLAG, %g3
4248 sub %g2, %g7, %g4 /* paddr = vaddr-kpm_vbase */
4249 srax %g4, %g3, %g2 /* which alias range (r) */
4251 srlx %g4, MMU_PAGESHIFT, %g2 /* %g2 = pfn */
4260 PAGE_NUM2MEMSEG_NOLOCK_PA(%g2, %g3, %g6, %g4, %g5, %g7, kpmtsbmp2m)
4271 srlx %g2, %g5, %g4
4272 sllx %g4, %g5, %g4
4273 sub %g4, %g7, %g4
4274 srlx %g4, %g5, %g4
4278 * g2=pfn g3=mseg_pa g4=inx
4282 cmp %g4, %g5 /* inx - nkpmpgs */
4291 sllx %g4, KPMPAGE_SHIFT, %g4 /* kpm_pages offset */
4293 add %g5, %g4, %g5 /* kp */
4297 * g2=pfn g3=mseg_pa g4=offset g5=kp g7=kpmp_table_sz
4307 * g2=pfn g3=mseg_pa g4=offset g5=hashinx
4310 add %g1, %g4, %g1 /* kp_pa */
4316 ldx [%g6 + KPMTSBM_KPMPTABLEPA], %g4 /* kpmp_tablepa */
4318 add %g4, %g5, %g3
4328 mov (TTE_CP_INT|TTE_CV_INT|TTE_PRIV_INT|TTE_HWWR_INT), %g4
4329 or %g4, TTE4M, %g4
4330 or %g5, %g4, %g5
4332 sethi %hi(TTE_VALID_INT), %g4
4335 or %g5, %g4, %g5 /* upper part */
4337 mov (TTE_CP_INT|TTE_CV_INT|TTE_PRIV_INT|TTE_HWWR_INT), %g4
4338 or %g5, %g4, %g5
4340 sllx %g2, MMU_PAGESHIFT, %g4
4341 or %g5, %g4, %g5 /* tte */
4342 ldx [%g6 + KPMTSBM_TSBPTR], %g4
4347 * g1=kp_pa g2=ttarget g3=hlck_pa g4=kpmtsbp4m g5=tte g6=kpmtsbm_area
4379 TSB_LOCK_ENTRY(%g4, %g1, %g7, locked_tsb_l1)
4382 TSB_INSERT_UNLOCK_ENTRY(%g4, %g5, %g2, %g7)
4384 DTLB_STUFF(%g5, %g1, %g2, %g4, %g6)
4432 ldub [%g6 + KPMTSBM_FLAGS], %g4
4433 and %g4, KPMTSBM_ENABLE_FLAG, %g5
4455 and %g4, KPMTSBM_TLTSBM_FLAG, %g1
4478 sub %g2, %g7, %g4 /* paddr = vaddr-kpm_vbase */
4479 srax %g4, %g3, %g7 /* which alias range (r) */
4489 sub %g4, %g5, %g4 /* paddr -= r << kpm_size_shift */
4492 add %g4, %g7, %g4 /* paddr += (r-v)<<MMU_PAGESHIFT */
4497 sub %g4, %g5, %g4 /* paddr -= r << MMU_PAGESHIFT */
4504 * g4 = paddr
4510 srlx %g4, MMU_PAGESHIFT, %g2 /* g2 = pfn */
4517 * g4 g5 g7 for scratch use.
4520 PAGE_NUM2MEMSEG_NOLOCK_PA(%g2, %g3, %g6, %g4, %g5, %g7, kpmtsbmsp2m)
4530 sub %g2, %g7, %g4
4535 * g2=pfn g3=mseg_pa g4=inx g6=per-CPU tsbmiss area
4538 cmp %g4, %g5 /* inx - nkpmpgs */
4546 add %g5, %g4, %g5 /* ksp */
4550 * g2=pfn g3=mseg_pa g4=inx g5=ksp
4561 * g2=pfn g3=mseg_pa g4=offset g5=hashinx
4565 add %g1, %g4, %g1 /* ksp_pa */
4573 ldx [%g6 + KPMTSBM_KPMPTABLEPA], %g4 /* kpmp_stablepa */
4575 add %g4, %g5, %g3 /* hlck_pa */
4584 mov (TTE_CP_INT|TTE_PRIV_INT|TTE_HWWR_INT), %g4
4585 or %g5, %g4, %g5
4586 sllx %g2, MMU_PAGESHIFT, %g4
4587 or %g5, %g4, %g5 /* tte */
4588 ldx [%g6 + KPMTSBM_TSBPTR], %g4
4593 * g1=ksp_pa g2=ttarget g3=hlck_pa g4=ktsbp g5=tte (non-cacheable)
4623 TSB_LOCK_ENTRY(%g4, %g1, %g7, locked_tsb_l2)
4626 TSB_INSERT_UNLOCK_ENTRY(%g4, %g5, %g2, %g7)
4628 DTLB_STUFF(%g5, %g2, %g4, %g5, %g6)
4826 GET_1ST_TSBE_PTR(%g2, %g1, %g4, %g5)
4833 GET_2ND_TSBE_PTR(%g2, %g3, %g4, %g5)