Searched refs:g2 (Results 26 - 50 of 98) sorted by relevance

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/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_hcall.s282 mov %o3, %g2
287 stx %o2, [%g2]
307 mov %o3, %g2
312 stx %o2, [%g2]
343 mov %o2, %g2
348 stx %o2, [%g2]
434 mov %o4, %g2
439 stx %o2, [%g2]
459 mov %o4, %g2
464 stx %o2, [%g2]
[all...]
/illumos-gate/usr/src/uts/sun4u/ml/
H A Dmach_interrupt.s67 mov IRDR_0, %g2
68 ldxa [%g2]ASI_INTR_RECEIVE, %g5 ! %g5 = PC or Interrupt Number
121 ! g2: arg2
125 mov IRDR_1, %g2
126 ldxa [%g2]ASI_INTR_RECEIVE, %g1
127 mov IRDR_2, %g2
128 ldxa [%g2]ASI_INTR_RECEIVE, %g2
144 stxa %g2, [%g4 + TRAP_ENT_F3]%asi
195 ! g2
[all...]
H A Dtrap_table.s82 * %g2, %g3 args for above
341 mov 8, %g2 ;\
342 sta %l2, [%sp + %g2]asi_num ;\
348 sta %l6, [%g4 + %g2]asi_num ;\
353 sta %i2, [%g4 + %g2]asi_num ;\
358 sta %i6, [%g4 + %g2]asi_num ;\
445 mov 8, %g2 ;\
448 lda [%sp + %g2]asi_num, %l2 ;\
453 lda [%g4 + %g2]asi_num, %l6 ;\
458 lda [%g4 + %g2]asi_nu
[all...]
H A Dwbuf.s51 FAULT_WINTRACE(%g1, %g2, %g3, TT_F32_SN0)
68 ldn [%g1 + MPCB_WBUF], %g2
69 SAVE_V8WINDOW(%g2)
70 mov 1, %g2
71 st %g2, [%g1 + MPCB_WBCNT]
77 mov %g6, %g2 ! arg2 = tagaccess
133 ld [%g1 + MPCB_WBCNT], %g2
134 add %g2, 1, %g3
139 sll %g2, CPTRSHIFT, %g4 ! spbuf size is sizeof (caddr_t)
142 sll %g2, RWIN32SHIF
[all...]
H A Dcpr_resume_setup.s133 set MMU_PCONTEXT, %g2
134 stxa %g1, [%g2]ASI_DMMU
143 set MMU_SCONTEXT, %g2
144 stxa %g1, [%g2]ASI_DMMU
175 rdpr %tba, %g2
176 stx %g2, [%g1]
/illumos-gate/usr/src/uts/sparc/v9/ml/
H A Dfloat.s130 rdpr %pstate, %g2 ! read pstate, save value in %g2
131 or %g2, PSTATE_PEF, %g1 ! new pstate with fpu enabled
134 sethi %hi(fsrholder), %g2
135 stx %fsr, [%g2 + %lo(fsrholder)]
136 ldx [%g2 + %lo(fsrholder)], %g2 ! snarf the FSR
138 and %g2, %g1, %g2 ! get version
139 srl %g2, FSR_VER_SHIF
[all...]
H A Dsyscall_trap.s85 ldx [%g1 + CPU_STATS_SYS_SYSCALL], %g2
86 inc %g2 ! cpu_stats.sys.syscall++
87 stx %g2, [%g1 + CPU_STATS_SYS_SYSCALL]
97 ldx [%l2 + LWP_RU_SYSC], %g2 ! pesky statistics
99 addx %g2, 1, %g2
100 stx %g2, [%l2 + LWP_RU_SYSC]
111 TRACE_PTR(%g3, %g2) ! get trace pointer
112 GET_TRACE_TICK(%g1, %g2)
117 set TT_SC_ENTR, %g2
[all...]
/illumos-gate/usr/src/lib/libc/sparc/gen/
H A Dmemcmp.s57 st %g2, [%sp + 68] ! g2 must be restored before retl
110 .cmpeq: ld [%sp + 68], %g2
136 ld [%sp + 68], %g2
141 ld [%sp + 68], %g2
164 srl %g1, 8, %g2 ! merge with the other half
165 or %g2, %o5, %o5
180 sll %g1, 8, %g2
181 or %o5, %g2, %o5
187 srl %g1, 24, %g2 ! merg
[all...]
/illumos-gate/usr/src/cmd/mdb/sun4u/v9/kmdb/
H A Dmach_asmutil.h46 mov %o4, %g2 /* save %o4 in %g2 */;\
55 mov %g2, %o4 /* restore saved %o4 from %g2 */
/illumos-gate/usr/src/uts/sun4v/ml/
H A Dmach_proc_init.s92 setx LPAD_MAGIC_VAL, %g2, %g1
93 ldx [%l1 + LPAD_MAGIC], %g2
94 cmp %g1, %g2
110 add %l1, LPAD_DATA_SIZE, %g2 ! %g2 = end of data section
111 sub %g2, %g1, %g2
112 brlz %g2, startup_error
H A Dwbuf.s52 FAULT_WINTRACE(%g1, %g2, %g3, TT_F32_SN0)
69 ldn [%g1 + MPCB_WBUF], %g2
70 SAVE_V8WINDOW(%g2)
71 mov 1, %g2
72 st %g2, [%g1 + MPCB_WBCNT]
78 mov %g6, %g2 ! arg2 = tagaccess
135 ld [%g1 + MPCB_WBCNT], %g2
136 add %g2, 1, %g3
141 sll %g2, CPTRSHIFT, %g4 ! spbuf size is sizeof (caddr_t)
144 sll %g2, RWIN32SHIF
[all...]
H A Dmach_subr_asm.s118 CPU_ADDR(%g2, %g3)
119 add %g2, CPU_MCPU, %g2
128 ldx [%g2 + MCPU_CPU_Q_BASE], %o1
133 ldx [%g2 + MCPU_DEV_Q_BASE], %o1
138 ldx [%g2 + MCPU_RQ_BASE], %o1
143 ldx [%g2 + MCPU_NRQ_BASE], %o1
321 * r[2] %g2
/illumos-gate/usr/src/uts/sun4v/vm/
H A Dmach_sfmmu_asm.s119 set INVALID_CONTEXT, %g2
130 stxa %g2, [%g3]ASI_MMU_CTX /* set invalid ctx */
139 stxa %g2, [%g7]ASI_MMU_CTX /* set pri-ctx to invalid */
168 * %g2 = INVALID_CONTEXT
183 stxa %g2, [%g3]ASI_MMU_CTX /* set sec-ctx to invalid */
191 stxa %g2, [%g7]ASI_MMU_CTX /* set pri-ctx to invalid */
319 ldx [%o1 + TSBINFO_NEXTPTR], %g2 ! %g2 = second tsbinfo
325 brz,pt %g2, 2f
329 MAKE_UTSBREG(%g2,
[all...]
/illumos-gate/usr/src/uts/sun4u/opl/ml/
H A Ddrmach.il.cpp73 .register %g2, #scratch
82 ldxa [%o0]ASI_MEM, %g2
90 stxa %g2, [%o1]ASI_MEM variable
/illumos-gate/usr/src/uts/sun4u/cpu/
H A Dus3_common_asm.s230 SFMMU_CPU_CNUM(%o1, %g1, %g2) ! %g1 = sfmmu cnum on this CPU
296 * %g2 = sfmmup
304 cmp %g3, %g2
317 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
319 ldub [%g2 + SFMMU_CEXT], %g4 ! %g4 = sfmmup->cext
325 srlx %g5, CTXREG_NEXT_SHIFT, %g2 /* %g2 = nucleus pgsz */
326 sllx %g2, CTXREG_NEXT_SHIFT, %g2 /* preserve nucleus pgsz */
327 or %g6, %g2,
[all...]
H A Dus3_jalapeno_asm.s371 JP_FORCE_FULL_SPEED(%o3, %g1, %g2, %g3); /* %o3: saved speed */
382 JP_RESTORE_SPEED(%o3, %g1, %g2, %g3); /* %o3: saved speed */
416 * %g2 = Input = AFAR. Output the clo_flags info which is passed
428 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
444 stx %g2, [%g6 + 0]
446 JP_FORCE_FULL_SPEED(%g2, %g3, %g6, %g7) /* %g2: saved speed */
452 JP_RESTORE_SPEED(%g2, %g3, %g6, %g7) /* %g2: saved speed */
454 ldx [%g6 + 0], %g2
[all...]
H A Dspitfire_asm.s488 SFMMU_CPU_CNUM(%o1, %g1, %g2) /* %g1 = sfmmu cnum on this CPU */
524 CPU_INDEX(%g1, %g2)
526 set cpunodes, %g2
527 add %g1, %g2, %g1
528 lduh [%g1 + ITLB_SIZE], %g2 ! %g2 = # entries in ITLB
530 sub %g2, 1, %g2 ! %g2 = # entries in ITLB - 1
536 ITLB_FLUSH_UNLOCKED_UCTXS(I, %g2,
[all...]
/illumos-gate/usr/src/uts/sun4v/io/
H A Dvnet_dds_hcall.s81 mov %o2, %g2
86 stx %o2, [%g2]
/illumos-gate/usr/src/common/bignum/sun4u/
H A Dmont_mulf_kernel_v9.s149 /* 000000 */ .register %g2,#scratch
220 /* 0x0024 */ sub %g5,1,%g2
242 /* 0x0048 */ cmp %g3,%g2
319 /* 0x0034 */ and %o2,%o3,%g2
320 /* 0x0038 */ or %g2,%g4,%o5
408 /* 0x0090 */ add %g1,52,%g2
410 /* 0x0098 118 */ srlx %g3,%g2,%i2
429 /* 0x00d0 */ or %g0,2,%g2
435 /* 0x00d8 120 */ sra %g2,0,%g3
436 /* 0x00dc 123 */ add %g2,
[all...]
/illumos-gate/usr/src/uts/sun4v/cpu/
H A Dcommon_asm.s330 GET_HRTIME(%g1,%o0,%o1,%o2,%o3,%o4,%o5,%g2,__LINE__)
379 GET_HRTIME(%g1,%g2,%g3,%g4,%g5,%o0,%o1,%o2,__LINE__)
414 GET_HRESTIME(%o1,%o2,%o3,%o4,%o5,%g1,%g2,%g3,%g4,__LINE__)
426 GET_HRESTIME(%o0,%o2,%o3,%o4,%o5,%g1,%g2,%g3,%g4,__LINE__)
448 ldn [%o4 + CLONGSIZE], %g2 ! Nanoseconds.
455 stn %g2, [%o0 + CLONGSIZE] ! Delay: store nanoseconds
465 GET_HRESTIME(%o0,%o1,%g1,%g2,%g3,%g4,%g5,%o2,%o3,__LINE__)
466 CONV_HRESTIME(%o0, %o1, %g1, %g2, %g3)
485 GET_NATIVE_TIME(%g5,%g1,%g2,__LINE__) ! %g5 = native time in ticks
486 CPU_ADDR(%g2,
[all...]
/illumos-gate/usr/src/uts/sun4/ml/
H A Dip_ocsum.s72 * %g2 and %g3 used in main loop
137 sub %o5, %o0, %g2 ! byte count: 2/4/6/8
140 sll %g2, 2, %g2 ! 8/16/24/32 for mask
142 sllx %g5, %g2, %o5
144 sllx %o5, %g2, %o5 ! mask: 16/32/48/64 0's at low end
146 srl %g2, 3, %g2 ! hw count
151 sub %o1, %g2, %o1 ! delay: decr count, 1-4 halfwords
245 ! %l0-7,%o0-5,%g2
[all...]
/illumos-gate/usr/src/uts/sun4u/sys/
H A Dcheetahasm.h789 mov t_flags, afar; /* depends on afar = %g2 */ \
1043 * temporarily save the values of %g1 and %g2.
1061 * We save the values of %g1 and %g2 in %tpc, %tnpc and %tstate (since
1063 * we need to put the low-order two bits of %g1 and %g2 in %tstate).
1066 * %g2 in bits 10-11 (insuring bits 8-9 are zero for use by the D$/I$
1075 wrpr %g2, %tnpc; \
1076 sllx %g2, CH_ERR_G2_TO_TSTATE_SHFT, %g2; \
1077 or %g1, %g2, %g2; \
[all...]
/illumos-gate/usr/src/uts/sun4u/vm/
H A Dmach_sfmmu_asm.s129 set INVALID_CONTEXT, %g2
157 stxa %g2, [%g3]ASI_MMU_CTX /* set invalid ctx */
167 or %g3, %g2, %g2 /* %g2 = nucleus pgsz | INVALID_CONTEXT */
169 stxa %g2, [%g7]ASI_MMU_CTX /* set pri-ctx to invalid */
201 GET_CPU_IMPL(%g2)
202 cmp %g2, CHEETAH_IMPL
304 GET_CPU_IMPL(%g2)
332 cmp %g2, CHEETAH_IMP
[all...]
/illumos-gate/usr/src/uts/sun4u/io/
H A Dpanther_asm.s151 setx DCU_IPS_MASK, %g2, %o3
159 PN_ECACHE_FLUSH_LINE(%o0, %o3, %o4, %g2, %g3)
223 setx DCU_IPS_MASK, %g2, %o3
230 PN_ECACHE_FLUSH_LINE(%o0, %o3, %o4, %o5, %g2)
280 setx DCU_IPS_MASK, %g2, %o3
288 PN_ECACHE_FLUSH_LINE(%o0, %o3, %o4, %o5, %g2)
348 setx DCU_IPS_MASK, %g2, %o3
355 PN_ECACHE_FLUSH_LINE(%o0, %o3, %o4, %o5, %g2)
406 setx DCU_IPS_MASK, %g2, %o3
414 PN_ECACHE_FLUSH_LINE(%o0, %o3, %o4, %g2,
[all...]
/illumos-gate/usr/src/common/crypto/aes/amd64/
H A Daesopt.h732 #define dec_fmvars uint32_t g2
733 #define fwd_mcol(x) (g2 = gf_mulx(x), g2 ^ upr((x) ^ g2, 3) ^ \
742 #define dec_imvars uint32_t g2, g4, g9
743 #define inv_mcol(x) (g2 = gf_mulx(x), g4 = gf_mulx(g2), g9 = \
745 (x) ^ g2 ^ g4 ^ upr(g2 ^ g9, 3) ^ \

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