Lines Matching refs:g2
230 SFMMU_CPU_CNUM(%o1, %g1, %g2) ! %g1 = sfmmu cnum on this CPU
296 * %g2 = sfmmup
304 cmp %g3, %g2
317 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
319 ldub [%g2 + SFMMU_CEXT], %g4 ! %g4 = sfmmup->cext
325 srlx %g5, CTXREG_NEXT_SHIFT, %g2 /* %g2 = nucleus pgsz */
326 sllx %g2, CTXREG_NEXT_SHIFT, %g2 /* preserve nucleus pgsz */
327 or %g6, %g2, %g6 /* %g6 = nucleus pgsz | primary pgsz | cnum */
352 * %g2 = <sfmmup58|pgcnt6>, (pgcnt - 1) is pass'ed in via pgcnt6 bits.
363 and %g4, %g2, %g3 /* g3 = pgcnt - 1 */
366 andn %g2, SFMMU_PGCNT_MASK, %g2 /* g2 = sfmmup */
371 cmp %g4, %g2
377 set MMU_PAGESIZE, %g2 /* g2 = pgsize */
386 add %g1, %g2, %g1 /* next page */
392 * g2 = sfmmup
395 SFMMU_CPU_CNUM(%g2, %g5, %g6) ! %g5 = sfmmu cnum on this CPU
399 ldub [%g2 + SFMMU_CEXT], %g4 ! %g4 = sfmmup->cext
405 srlx %g6, CTXREG_NEXT_SHIFT, %g2 /* %g2 = nucleus pgsz */
406 sllx %g2, CTXREG_NEXT_SHIFT, %g2 /* preserve nucleus pgsz */
407 or %g5, %g2, %g5 /* %g5 = nucleus pgsz | primary pgsz | cnum */
410 set MMU_PAGESIZE, %g2 /* g2 = pgsize */
419 add %g1, %g2, %g1 /* next page */
498 * %g1 = pfnum, %g2 = color
500 DCACHE_FLUSHPAGE(%g1, %g2, %g3, %g4, %g5)
544 DCACHE_FLUSHCOLOR(%g1, 0, %g2, %g3, %g4)
545 DCACHE_FLUSHCOLOR(%g1, 1, %g2, %g3, %g4)
546 DCACHE_FLUSHCOLOR(%g1, 2, %g2, %g3, %g4)
547 DCACHE_FLUSHCOLOR(%g1, 3, %g2, %g3, %g4)
628 mov IDDR_1, %g2
635 stxa %o1, [%g2]ASI_INTR_DISPATCH
667 sll %o1, IDCR_BN_SHIFT, %g2 ! IDCR<28:24> = b/n pair
669 or %g1, %g2, %g1
841 CH_ICACHE_FLUSHALL(%o2, %o3, %g1, %g2)
1151 ldub [%g1 + %g4], %g2
1152 brz %g2, 1f
1170 * panic flag (%g2).
1173 clr %g2
1247 * we place the clo_flags data into %g2 (sys_trap->have_win arg #1) and
1343 * %g2 = Input = AFAR. Output the clo_flags info which is passed
1356 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
1467 * will use to save %g1 and %g2.
1469 * we save %g1+%g2 using %tpc, %tnpc + %tstate and jump to the fast ecc
1475 * 4) compute physical address of the per-cpu/per-tl save area using %g1+%g2
1476 * 5) Save %g1-%g7 into the per-cpu/per-tl save area (%g1 + %g2 from the
1534 * and %g2. Note that %tstate has bits 0-2 and then bits 8-19 as r/w,
1536 * order two bits from %g1 and %g2 respectively).
1608 * struct, then we place the clo_flags data into %g2
1616 * %g2: [ clo_flags if cpu_private unavailable ] - sys_trap->have_win: arg #1
1656 * %g2 = Input = AFAR. Output the clo_flags info which is passed
1668 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
1808 * struct, then we place the clo_flags data into %g2
1815 * %g2: [ clo_flags if cpu_private unavailable ] - sys_trap->have_win: arg #1
1859 * %g2 = Input = AFAR. Output the clo_flags info which is passed
1874 set CLO_FLAGS_TT_MASK, %g2
1875 and %g4, %g2, %g4 ! ttype
1880 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
1994 or %g0, CH_ERR_DPE, %g2
2033 * and %g2. Note that %tstate has bits 0-2 and then bits 8-19 as r/w,
2035 * order two bits from %g1 and %g2 respectively).
2055 * this routine with %g1 and %g2 already saved in %tpc, %tnpc and %tstate.
2071 * the ch_err_tl1_data structure and %g2 will have the original
2073 * except for %g1 and %g2 will be available.
2176 or %g0, CH_ERR_IPE, %g2
2213 * and %g2. Note that %tstate has bits 0-2 and then bits 8-19 as r/w,
2215 * order two bits from %g1 and %g2 respectively).
2236 * this routine with %g1 and %g2 already saved in %tpc, %tnpc and %tstate.
2252 * the ch_err_tl1_data structure and %g2 will have the original
2254 * except for %g1 and %g2 will be available.
2348 ldxa [%o0]ASI_ITLB_TAGREAD, %g2
2350 andn %g2, %o4, %o5
2371 ldxa [%o0]ASI_DTLB_TAGREAD, %g2
2373 andn %g2, %o4, %o5
2439 rdpr %tick, %g2 /* get tick register */
2440 brgez,pn %g2, 1f /* if NPT bit off, we're done */
2446 rdpr %tick, %g2 /* get tick register */
2447 wrpr %g3, %g2, %tick /* write tick register, */
2450 rd STICK, %g2 /* get stick register */
2451 brgez,pn %g2, 3f /* if NPT bit off, we're done */
2457 rd STICK, %g2 /* get stick register */
2458 wr %g3, %g2, STICK /* write stick register, */
2771 ! %g2 - index into chsm_outstanding array
2774 ! %g2, %g3, %g5 - scratch
2779 mulx %g2, CHSM_OUTSTANDING_INCR, %g2
2781 add %g2, %g3, %g2
2782 GET_CPU_PRIVATE_PTR(%g2, %g4, %g5, 1f);
2783 ld [%g4], %g2 ! cpu's chsm_outstanding[index]
2788 add %g2, 0x1, %g3
2789 brnz,pn %g2, 1f ! no need to enqueue more intr_vec