Lines Matching refs:g2
130 rdpr %pstate, %g2 ! read pstate, save value in %g2
131 or %g2, PSTATE_PEF, %g1 ! new pstate with fpu enabled
134 sethi %hi(fsrholder), %g2
135 stx %fsr, [%g2 + %lo(fsrholder)]
136 ldx [%g2 + %lo(fsrholder)], %g2 ! snarf the FSR
138 and %g2, %g1, %g2 ! get version
139 srl %g2, FSR_VER_SHIFT, %g2 ! and shift it down
141 st %g2, [%g3 + %lo(fpu_version)]
171 mov -1, %g2 ! -1 is NaN
172 stx %g2, [%o0] ! initialize %f0
568 and %o1, %o4, %g2 ! get the ftt trap type
570 brnz,a,pt %g2, fttok
577 srl %g2, FSR_FTT_SHIFT, %o4 ! check ftt
651 and %o1, %o4, %g2 ! mask out trap type
653 brnz,a,pt %g2, fttgd
660 srl %g2, FSR_FTT_SHIFT, %o4 ! check ftt
686 and %l2, %o3, %g2 ! mask out cexc
688 andcc %g2, FSR_CEXC_NX, %g0 ! check for inexact
692 andcc %g2, FSR_CEXC_DZ, %g0 ! check for divide-by-zero
696 andcc %g2, FSR_CEXC_UF, %g0 ! check for underflow
700 andcc %g2, FSR_CEXC_OF, %g0 ! check for overflow
704 andcc %g2, FSR_CEXC_NV, %g0 ! check for invalid