/illumos-gate/usr/src/uts/sun4u/sys/ |
H A D | pmubus.h | 47 uint64_t reg_addr; member in struct:__anon10193
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/illumos-gate/usr/src/uts/sun4u/io/ |
H A D | iocache.c | 185 volatile uint64_t *reg_addr; local 191 for (i = 0, reg_addr = softsp->str_buf_pg_tag_diag; 192 i < STREAM_CACHE_LINES; i++, reg_addr++) { 195 reg = *reg_addr; 204 (void *)reg_addr, hi, lo));
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/ |
H A D | bnxe_fw_funcs.c | 48 u32_t reg_addr, reg_bit_map, vnic; local 69 reg_addr = ECORE_VOQ_Q_REG_ADDR(curr_cos, pf_q_num); 70 reg_bit_map = REG_RD(pdev, reg_addr); 71 REG_WR(pdev, reg_addr, reg_bit_map & (~q_bit_map)); 74 reg_addr = ECORE_VOQ_Q_REG_ADDR(new_cos, pf_q_num); 75 reg_bit_map = REG_RD(pdev, reg_addr); 76 REG_WR(pdev, reg_addr, reg_bit_map | q_bit_map); 81 reg_addr = ECORE_Q_CMDQ_REG_ADDR(pf_q_num); 82 reg_bit_map = REG_RD(pdev, reg_addr); 87 REG_WR(pdev, reg_addr, reg_bit_ma [all...] |
/illumos-gate/usr/src/uts/common/io/audio/drv/audiots/ |
H A D | audiots.c | 1151 uint16_t *reg_addr = &state->ts_regs->aud_regs.ap_acrdwr_reg; local 1170 if (!(ddi_get16(handle, reg_addr) & 1173 ddi_put16(handle, reg_addr, reg); 1187 if (!(ddi_get16(handle, reg_addr) &
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/illumos-gate/usr/src/uts/sun4u/io/i2c/nexus/ |
H A D | smbus.c | 737 uint8_t *reg_addr = smbus->smbus_regaddr; local 741 ddi_put8(hp, ®_addr[reg], data); 744 ®_addr[reg], data));
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/ |
H A D | lm_phy.c | 75 u32 elink_cb_reg_read(struct elink_dev *cb, u32 reg_addr ) 77 return REG_RD(cb, reg_addr); 80 void elink_cb_reg_write(struct elink_dev *cb, u32 reg_addr, u32 val ) argument 82 REG_WR(cb, reg_addr, val);
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/illumos-gate/usr/src/uts/common/io/chxge/com/ |
H A D | ch_subr.c | 277 int reg_addr, unsigned int *val) 289 V_MI0_PHY_REG_ADDR(reg_addr) | V_MI0_PHY_ADDR(phy_addr)); 296 int reg_addr, unsigned int val) 308 V_MI0_PHY_REG_ADDR(reg_addr) | V_MI0_PHY_ADDR(phy_addr)); 360 int reg_addr, unsigned int *valp) 362 u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr); 378 int reg_addr, unsigned int val) 380 u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr); 407 int reg_addr, unsigned int *valp) 415 (void) __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, reg_addr); 276 fpga_mdio_read(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr, unsigned int *val) argument 295 fpga_mdio_write(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr, unsigned int val) argument 359 mi1_mdio_read(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr, unsigned int *valp) argument 377 mi1_mdio_write(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr, unsigned int val) argument 432 mi1_mdio_ext_read(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr, unsigned int *valp) argument 457 mi1_mdio_ext_write(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr, unsigned int val) argument [all...] |
/illumos-gate/usr/src/uts/common/io/ixgbe/core/ |
H A D | ixgbe_phy.c | 599 * @reg_addr: 32 bit address of PHY register to read 602 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, argument 608 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | 638 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | 678 * @reg_addr: 32 bit address of PHY register to read 681 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, argument 690 status = ixgbe_read_phy_reg_mdi(hw, reg_addr, device_type, 704 * @reg_addr: 32 bit PHY register to write 708 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, argument 717 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIF 782 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u16 phy_data) argument [all...] |
H A D | ixgbe_api.c | 525 * @reg_addr: 32 bit address of PHY register to read 530 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, argument 536 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 543 * @reg_addr: 32 bit PHY register to write 548 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, argument 554 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 1213 * @reg_addr: 32 bit address of PHY register to read 1219 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, argument 1222 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr, 1229 * @reg_addr 1235 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u32 phy_data) argument [all...] |
H A D | ixgbe_x550.c | 357 static s32 ixgbe_read_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, argument 360 UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, *phy_data); 364 static s32 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, argument 367 UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, phy_data); 807 * @reg_addr: 32 bit PHY register to write 811 s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, argument 826 command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) | 854 * @reg_addr: 32 bit PHY register to write 858 s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, argument 873 command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIF [all...] |
/illumos-gate/usr/src/grub/grub-0.97/netboot/ |
H A D | e1000.c | 110 static int e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data); 111 static int e1000_read_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data); 112 static int e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data); 113 static int e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data); 2810 * reg_addr - address of the PHY register to read 2814 uint32_t reg_addr, 2822 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { 2824 (uint16_t)reg_addr))) 2828 ret_val = e1000_read_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT & reg_addr, 2836 uint32_t reg_addr, 2813 e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data) argument 2835 e1000_read_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data) argument 2916 e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data) argument 2938 e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data) argument [all...] |
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
H A D | hw_dump.h | 242 struct reg_addr { struct 264 static const struct reg_addr reg_addrs[] = { 1340 static const struct reg_addr idle_addrs[] = { 1612 static const struct reg_addr split_reg_addrs[] = { 8179 static const struct reg_addr page_read_regs_e1[] = { 8194 static const struct reg_addr page_read_regs_e1h[] = { 8210 static const struct reg_addr page_read_regs_e2[] = { 8225 static const struct reg_addr page_read_regs_e3[] = {
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/illumos-gate/usr/src/uts/common/io/e1000api/ |
H A D | e1000_ich8lan.c | 2273 u16 word_addr, reg_data, reg_addr, phy_page = 0; local 2360 1, ®_addr); 2365 if (reg_addr == IGP01E1000_PHY_PAGE_SELECT) { 2370 reg_addr &= PHY_REG_MASK; 2371 reg_addr |= phy_page; 2373 ret_val = phy->ops.write_reg_locked(hw, (u32)reg_addr,
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/illumos-gate/usr/src/uts/sun4u/io/pci/ |
H A D | pcisch.c | 1071 volatile uint64_t *reg_addr = sc_p->sc_ctx_match_reg + ctx; local 1074 if (!*reg_addr) { 1080 matchreg = *reg_addr; /* re-fetch after 1st flush */ 1091 if (pci_ctx_no_compat || !*reg_addr) /* compat: active ctx flush */
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/mcp/ |
H A D | nvm_map.h | 621 u32_t reg_addr; member in struct:_hw_set_info_t
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/illumos-gate/usr/src/uts/common/io/i40e/core/ |
H A D | i40e_common.c | 2948 * @reg_addr: register address 2955 u32 reg_addr, u64 *reg_val, 2968 cmd_resp->address = CPU_TO_LE32(reg_addr); 2983 * @reg_addr: register address 2990 u32 reg_addr, u64 reg_val, 3000 cmd->address = CPU_TO_LE32(reg_addr); 2954 i40e_aq_debug_read_register(struct i40e_hw *hw, u32 reg_addr, u64 *reg_val, struct i40e_asq_cmd_details *cmd_details) argument 2989 i40e_aq_debug_write_register(struct i40e_hw *hw, u32 reg_addr, u64 reg_val, struct i40e_asq_cmd_details *cmd_details) argument
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/illumos-gate/usr/src/uts/common/io/ntxn/ |
H A D | unm_inc.h | 984 reg_addr:5, /* which mgmt register we want to talk to */ member in struct:__anon6386
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/illumos-gate/usr/src/uts/common/sys/nxge/ |
H A D | nxge_mac_hw.h | 1325 uint32_t reg_addr : 5; member in struct:_mif_cfg_t::__anon8403::__anon8404 1335 uint32_t reg_addr : 5;
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