| /openjdk7/hotspot/src/os_cpu/bsd_x86/vm/ |
| H A D | assembler_bsd_x86.cpp | 38 shrl(thread, PAGE_SHIFT);
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| H A D | bsd_x86_32.s | 129 shrl $2,%ecx # dword count
167 1: shrl $2,%ecx # dword count
222 shrl $2,%ecx
259 1: shrl $2,%ecx
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| /openjdk7/hotspot/src/os_cpu/linux_x86/vm/ |
| H A D | assembler_linux_x86.cpp | 60 shrl(thread, PAGE_SHIFT);
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| H A D | linux_x86_32.s | 108 shrl $2,%ecx # dword count
146 1: shrl $2,%ecx # dword count
201 shrl $2,%ecx
238 1: shrl $2,%ecx
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| /openjdk7/hotspot/src/os_cpu/solaris_x86/vm/ |
| H A D | solaris_x86_32.s | 140 shrl $2,%ecx / dword count
178 1: shrl $2,%ecx / dword count
232 shrl $2,%ecx
269 1: shrl $2,%ecx
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| /openjdk7/hotspot/src/cpu/x86/vm/ |
| H A D | templateInterpreter_x86_32.cpp | 672 __ shrl(rdx, 2*BitsPerByte);
692 __ shrl(rcx, 2*BitsPerByte);
713 __ shrl(rdx, ConstantPoolCacheEntry::tos_state_shift);
1920 __ shrl(rbx, BytecodePairHistogram::log2_number_of_codes);
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| H A D | templateInterpreter_x86_64.cpp | 640 __ shrl(rdx, 2 * BitsPerByte);
660 __ shrl(rcx, 2 * BitsPerByte);
686 __ shrl(rdx, ConstantPoolCacheEntry::tos_state_shift);
1959 __ shrl(rbx, BytecodePairHistogram::log2_number_of_codes);
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| H A D | templateTable_x86_32.cpp | 593 __ shrl(reg, 16);
1199 case ushr : __ mov(rcx, rax); __ pop_i(rax); __ shrl (rax); break; // implicit masking of lower 5 bits by Intel shift instr.
2271 __ shrl(flags, ConstantPoolCacheEntry::tos_state_shift);
2426 __ shrl(rcx, ConstantPoolCacheEntry::tos_state_shift);
2478 __ shrl(rdx, ConstantPoolCacheEntry::is_volatile_shift);
2487 __ shrl(flags, ConstantPoolCacheEntry::tos_state_shift);
2730 __ shrl(rdx, ConstantPoolCacheEntry::is_volatile_shift);
2955 __ shrl(flags, ConstantPoolCacheEntry::tos_state_shift);
3323 __ shrl(rdx, LogBytesPerLong); // divide by 2*oopSize and set carry flag if odd
3329 // Ignore partial flag stall after shrl() sinc
[all...] |
| H A D | templateTable_x86_64.cpp | 605 __ shrl(reg, 16);
1213 case ushr : __ movl(rcx, rax); __ pop_i(rax); __ shrl (rax); break;
2336 __ shrl(flags, ConstantPoolCacheEntry::tos_state_shift);
2486 __ shrl(c_rarg3, ConstantPoolCacheEntry::tos_state_shift);
2535 __ shrl(rdx, ConstantPoolCacheEntry::is_volatile_shift);
2544 __ shrl(flags, ConstantPoolCacheEntry::tos_state_shift);
2770 __ shrl(rdx, ConstantPoolCacheEntry::is_volatile_shift);
2851 // __ shrl(rdx, ConstantPoolCacheEntry::is_volatile_shift);
2939 // __ shrl(rdx, ConstantPoolCacheEntry::is_volatile_shift);
3019 __ shrl(flag
[all...] |
| H A D | methodHandles_x86.cpp | 102 __ shrl(temp, java_lang_invoke_MemberName::MN_REFERENCE_KIND_SHIFT);
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| H A D | interp_masm_x86_64.cpp | 208 shrl(reg, 16);
262 shrl(bytecode, shift_count);
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| H A D | cppInterpreter_x86.cpp | 833 __ shrl(rdx, 2*BitsPerByte);
853 __ shrl(rcx, 2*BitsPerByte);
874 __ shrl(rdx, ConstantPoolCacheEntry::tos_state_shift);
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| H A D | interp_masm_x86_32.cpp | 212 shrl(reg, 16);
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| H A D | assembler_x86.hpp | 1524 void shrl(Register dst, int imm8);
1525 void shrl(Register dst);
2456 void shrptr(Register dst) { LP64_ONLY(shrq(dst)) NOT_LP64(shrl(dst)); }
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| H A D | stubGenerator_x86_64.cpp | 864 __ shrl(c_rarg3, 0x1f);
911 __ shrl(c_rarg3, 0x1f);
2700 __ shrl(r10_offset, Klass::_lh_header_size_shift);
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| H A D | assembler_x86.cpp | 2695 void Assembler::shrl(Register dst, int imm8) { function in class:Assembler
2703 void Assembler::shrl(Register dst) { function in class:Assembler
5910 else shrl(hi);
8309 shrl(tmp, os::get_serialize_page_shift_count());
8360 LP64_ONLY(shrq(dst, imm8)) NOT_LP64(shrl(dst, imm8));
8751 shrl(card_index, CardTableModRefBS::card_shift);
10724 shrl(result, 1); // index
10880 shrl(str1, 1);
10985 shrl(result, 1); // index
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| H A D | stubGenerator_x86_32.cpp | 999 __ shrl(count, shift); // bytes count
1017 __ shrl(rax, shift+1); // 8 bytes chunk count
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| H A D | c1_Runtime1_x86.cpp | 1740 __ shrl(card_index, CardTableModRefBS::card_shift);
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| H A D | c1_LIRAssembler_x86.cpp | 2965 case lir_ushr: __ shrl(value); break;
3004 case lir_ushr: __ shrl(value, count); break;
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