/vbox/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/ResetVector/Vtf0/Ia16/ |
H A D | Real16ToFlat32.asm | 33 mov bx, ADDR16_OF(gdtr) 64 gdtr: label
|
/vbox/include/VBox/vmm/ |
H A D | cpumctx-v1_6.h | 200 VBOXGDTR_VER1_6 gdtr; member in struct:CPUMCTX_VER1_6
|
H A D | cpumctx.h | 370 VBOXGDTR gdtr; member in struct:CPUMCTX
|
/vbox/src/VBox/ValidationKit/bootsectors/ |
H A D | bootsector-pae.asm | 78 lgdt [(gdtr - start) + BS_ADDR] 140 gdtr: label
|
/vbox/src/VBox/Devices/PC/ipxe/src/arch/i386/transitions/ |
H A D | librm.S | 43 gdtr: /* The first GDT entry is unused, the GDTR can fit here. */ label 204 data32 lgdt gdtr
|
/vbox/src/VBox/VMM/include/ |
H A D | CPUMInternal.h | 282 X86XDTR32 gdtr; member in struct:CPUMHOSTCTX 329 X86XDTR64 gdtr; member in struct:CPUMHOSTCTX
|
/vbox/src/VBox/VMM/VMMAll/ |
H A D | TRPMAll.cpp | 578 VBOXGDTR gdtr = {0, 0}; local 587 CPUMGetGuestGDTR(pVCpu, &gdtr); 588 Assert(gdtr.pGdt && gdtr.cbGdt > GuestIdte.Gen.u16SegSel); 590 if (!gdtr.pGdt) 593 pGdtEntry = gdtr.pGdt + (GuestIdte.Gen.u16SegSel >> X86_SEL_SHIFT) * sizeof(X86DESC);
|
H A D | CPUMAllRegs.cpp | 192 pVCpu->cpum.s.Hyper.gdtr.cbGdt = limit; 193 pVCpu->cpum.s.Hyper.gdtr.pGdt = addr; 516 *pcbLimit = pVCpu->cpum.s.Hyper.gdtr.cbGdt; 517 return pVCpu->cpum.s.Hyper.gdtr.pGdt; 594 pVCpu->cpum.s.Guest.gdtr.cbGdt = cbLimit; 595 pVCpu->cpum.s.Guest.gdtr.pGdt = GCPtrBase; 990 *pGDTR = pVCpu->cpum.s.Guest.gdtr;
|
H A D | SELMAll.cpp | 561 AssertReturnVoid((Sel | X86_SEL_RPL | X86_SEL_LDT) <= pCtx->gdtr.cbGdt); 567 selLoadHiddenSelectorRegFromGuestTable(pVCpu, pCtx, pSReg, pCtx->gdtr.pGdt + (Sel & X86_SEL_MASK), Sel, iSReg);
|
H A D | IEMAll.cpp | 2523 pCtx->gdtr.pGdt + (pCtx->tr.Sel & X86_SEL_MASK), IEM_ACCESS_SYS_RW); 2527 enmTaskSwitch, pCtx->gdtr.pGdt, VBOXSTRICTRC_VAL(rcStrict))); 2536 enmTaskSwitch, pCtx->gdtr.pGdt, VBOXSTRICTRC_VAL(rcStrict))); 2732 pCtx->gdtr.pGdt + (SelTSS & X86_SEL_MASK), IEM_ACCESS_SYS_RW); 2736 enmTaskSwitch, pCtx->gdtr.pGdt, VBOXSTRICTRC_VAL(rcStrict))); 2750 enmTaskSwitch, pCtx->gdtr.pGdt, VBOXSTRICTRC_VAL(rcStrict))); 2879 uNewLdt, pCtx->gdtr.cbGdt, VBOXSTRICTRC_VAL(rcStrict))); 3933 "gdtr=%016VR{gdtr_base}:%04VR{gdtr_lim} idtr=%016VR{idtr_base}:%04VR{idtr_lim} rflags=%08VR{rflags}\n" 4339 "gdtr=%016VR{gdtr_base}:%04VR{gdtr_lim} idtr=%016VR{idtr_base}:%04VR{idtr_lim} rflags=%08VR{rflags}\n" 8081 if ((uSel | X86_SEL_RPL_LDT) > pCtx->gdtr [all...] |
H A D | IEMAllCImpl.cpp.h | 4164 if ((uSel | X86_SEL_RPL_LDT) > pCtx->gdtr.cbGdt) 4166 GCPtrBase = pCtx->gdtr.pGdt; 4368 * @param iEffSeg The segment of the new gdtr contents 4369 * @param GCPtrEffSrc The address of the new gdtr contents. 4391 pCtx->gdtr.cbGdt = cbLimit; 4392 pCtx->gdtr.pGdt = GCPtrBase; 4404 * @param iEffSeg The segment where to store the gdtr content. 4405 * @param GCPtrEffDst The address where to store the gdtr content. 4416 VBOXSTRICTRC rcStrict = iemMemStoreDataXdtr(pIemCpu, pCtx->gdtr.cbGdt, pCtx->gdtr [all...] |
H A D | EMAll.cpp | 665 CHECK_FIELD(gdtr.cbGdt); 666 CHECK_FIELD(gdtr.pGdt);
|
/vbox/src/VBox/VMM/VMMR3/ |
H A D | CPUM.cpp | 222 SSMFIELD_ENTRY( CPUMCTX, gdtr.cbGdt), 223 SSMFIELD_ENTRY( CPUMCTX, gdtr.pGdt), 361 SSMFIELD_ENTRY( CPUMCTX, gdtr.cbGdt), 362 SSMFIELD_ENTRY( CPUMCTX, gdtr.pGdt), 498 SSMFIELD_ENTRY( CPUMCTX, gdtr.cbGdt), 499 SSMFIELD_ENTRY_U32_ZX_U64( CPUMCTX, gdtr.pGdt), 895 pCtx->gdtr.cbGdt = 0xffff; 1529 pszPrefix, pCtx->gdtr.pGdt, pCtx->gdtr.cbGdt, pszPrefix, pCtx->ldtr.Sel); 1542 pszPrefix, pCtx->gdtr [all...] |
H A D | CPUMDbg.cpp | 1201 CPU_REG_RW_AS("gdtr_base", GDTR_BASE, U64, gdtr.pGdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ), 1202 CPU_REG_RW_AS("gdtr_lim", GDTR_LIMIT, U16, gdtr.cbGdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ), 1238 CPU_REG_RW_AS("gdtr", GDTR, DTR, gdtr, cpumR3RegGet_gdtr, cpumR3RegSet_gdtr, NULL, NULL ), 1329 CPU_REG_RW_AS("gdtr_base", GDTR_BASE, U64, gdtr.pGdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ), 1330 CPU_REG_RW_AS("gdtr_lim", GDTR_LIMIT, U16, gdtr.cbGdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ), 1366 CPU_REG_RW_AS("gdtr", GDTR, DTR, gdtr, cpumR3RegGet_gdtr, cpumR3RegSet_gdtr, NULL, NULL ),
|
H A D | PATMSSM.cpp | 1211 else if (offCpumCtx == (unsigned)RT_OFFSETOF(CPUMCTX_VER1_6, gdtr.pGdt)) 1213 LogFlow(("Changing pGdt offset from %x to %x\n", offCpumCtx, RT_OFFSETOF(CPUMCTX, gdtr.pGdt))); 1214 *pFixup = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, gdtr.pGdt); 1216 else if (offCpumCtx == (unsigned)RT_OFFSETOF(CPUMCTX_VER1_6, gdtr.cbGdt)) 1218 LogFlow(("Changing cbGdt offset from %x to %x\n", offCpumCtx, RT_OFFSETOF(CPUMCTX, gdtr.cbGdt))); 1219 *pFixup = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, gdtr.cbGdt);
|
H A D | PATMPatch.cpp | 1475 offset_base = RT_OFFSETOF(CPUMCTX, gdtr.pGdt); 1476 offset_limit = RT_OFFSETOF(CPUMCTX, gdtr.cbGdt); 1491 //66 A1 48 7C 42 00 mov ax, CPUMCTX.gdtr.limit 1493 //A1 48 7C 42 00 mov eax, CPUMCTX.gdtr.base 1519 pPB[offset++] = 0x66; // mov ax, CPUMCTX.gdtr.limit 1529 pPB[offset++] = 0xA1; // mov eax, CPUMCTX.gdtr.base
|
H A D | HM.cpp | 2559 if (pCtx->gdtr.cbGdt) 2561 if ((pCtx->tr.Sel | X86_SEL_RPL_LDT) > pCtx->gdtr.cbGdt) 2566 else if ((pCtx->ldtr.Sel | X86_SEL_RPL_LDT) > pCtx->gdtr.cbGdt)
|
/vbox/src/recompiler/target-i386/ |
H A D | svm.h | 179 struct vmcb_seg gdtr; member in struct:vmcb_save_area
|
H A D | op_helper.c | 6430 stq_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.base), env->gdt.base); 6431 stl_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.limit), env->gdt.limit); 6474 env->gdt.base = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base)); 6475 env->gdt.limit = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.limit)); 6810 stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base), env->gdt.base); 6811 stl_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.limit), env->gdt.limit); 6845 env->gdt.base = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.base)); 6846 env->gdt.limit = ldl_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.limit));
|
/vbox/src/VBox/VMM/VMMR0/ |
H A D | HMR0.cpp | 1923 "gdtr=%016RX64:%04x idtr=%016RX64:%04x eflags=%08x\n" 1941 pCtx->gdtr.pGdt, pCtx->gdtr.cbGdt, pCtx->idtr.pIdt, pCtx->idtr.cbIdt, uEFlags, 1955 "gdtr=%016RX64:%04x idtr=%016RX64:%04x eflags=%08x\n" 1968 pCtx->gdtr.pGdt, pCtx->gdtr.cbGdt, pCtx->idtr.pIdt, pCtx->idtr.cbIdt, uEFlags,
|
H A D | HMSVMR0.cpp | 1350 pVmcb->guest.GDTR.u32Limit = pCtx->gdtr.cbGdt; 1351 pVmcb->guest.GDTR.u64Base = pCtx->gdtr.pGdt; 2026 pMixedCtx->gdtr.cbGdt = pVmcb->guest.GDTR.u32Limit; 2027 pMixedCtx->gdtr.pGdt = pVmcb->guest.GDTR.u64Base;
|
/vbox/src/recompiler/ |
H A D | VBoxRecompiler.c | 1431 pCtx->gdtr.cbGdt = env->gdt.limit; 1432 pCtx->gdtr.pGdt = env->gdt.base; 2312 pVM->rem.s.Env.gdt.base = pCtx->gdtr.pGdt; 2313 pVM->rem.s.Env.gdt.limit = pCtx->gdtr.cbGdt; 2635 pCtx->gdtr.cbGdt = pVM->rem.s.Env.gdt.limit; 2636 if (pCtx->gdtr.pGdt != pVM->rem.s.Env.gdt.base) 2638 pCtx->gdtr.pGdt = pVM->rem.s.Env.gdt.base; 2889 pCtx->gdtr.cbGdt = pVM->rem.s.Env.gdt.limit; 2890 if (pCtx->gdtr.pGdt != (RTGCPTR)pVM->rem.s.Env.gdt.base) 2892 pCtx->gdtr [all...] |
/vbox/src/VBox/VMM/testcase/ |
H A D | tstVMStructSize.cpp | 302 CHECK_MEMBER_ALIGNMENT(CPUMCTX, gdtr.pGdt, 8);
|
H A D | tstVMStruct.h | 103 GEN_CHECK_OFF(CPUMHOSTCTX, gdtr); 120 GEN_CHECK_OFF(CPUMHOSTCTX, gdtr); 173 GEN_CHECK_OFF(CPUMCTX, gdtr);
|
/vbox/src/VBox/VMM/VMMRC/ |
H A D | TRPMRCHandlersA.asm | 1391 COM_S_PRINT 10,13,' gdtr='
|