Searched refs:F0 (Results 1 - 20 of 20) sorted by relevance

/openjdk7/jdk/src/share/classes/java/security/spec/
H A DRSAKeyGenParameterSpec.java48 * The public-exponent value F0 = 3.
50 public static final BigInteger F0 = BigInteger.valueOf(3); field in class:RSAKeyGenParameterSpec
/openjdk7/hotspot/agent/src/share/classes/sun/jvm/hotspot/asm/sparc/
H A DSPARCFloatRegisters.java43 public static final SPARCFloatRegister F0; field in class:SPARCFloatRegisters
95 F0 = new SPARCFloatRegister(0);
144 F0, F2, F3, F4, F5, F6, F7, F8, F9, F10,
/openjdk7/hotspot/src/cpu/sparc/vm/
H A Dinterp_masm_sparc.hpp37 REGISTER_DECLARATION(FloatRegister, Ftos_f , F0); // for floats
38 REGISTER_DECLARATION(FloatRegister, Ftos_d , F0); // for doubles
39 REGISTER_DECLARATION(FloatRegister, Ftos_d1, F0); // for 1st part of double
47 #define Ftos_f F0
48 #define Ftos_d F0
49 #define Ftos_d1 F0
H A DinterpreterRT_sparc.cpp71 FloatRegister Rtmp = F0;
85 FloatRegister Rtmp = F0;
H A DjniFastGetField_sparc.cpp227 case T_FLOAT: __ ldf (FloatRegisterImpl::S, O5, O4, F0); break;
228 case T_DOUBLE: __ ldf (FloatRegisterImpl::D, O5, O4, F0); break;
H A Dc1_FrameMap_sparc.cpp316 F0_opr = as_float_opr(F0);
317 F0_double_opr = as_double_opr(F0);
H A Dregister_sparc.hpp275 CONSTANT_REGISTER_DECLARATION(FloatRegister, F0 , ( 0));
328 #define F0 ((FloatRegister)( F0_FloatRegisterEnumValue)) macro
H A Dregister_definitions_sparc.cpp76 REGISTER_DEFINITION(FloatRegister, F0);
H A DcppInterpreter_sparc.cpp89 __ stf(FloatRegisterImpl::D, F0, STATE(_native_fresult));
100 __ ldf(FloatRegisterImpl::D, STATE(_native_fresult), F0);
130 case T_FLOAT : assert(F0 == Ftos_f, "fix this code" ); break;
131 case T_DOUBLE : assert(F0 == Ftos_d, "fix this code" ); break;
216 __ stf(FloatRegisterImpl::S, F0, L1_scratch, 0);
223 __ stf(FloatRegisterImpl::D, F0, L1_scratch, -wordSize);
321 __ ldf(FloatRegisterImpl::S, O0, 0, F0);
332 __ ldf(FloatRegisterImpl::D, O0, 0, F0);
1362 // Result if any is in native abi result (O0..O1/F0..F1). The java expression
1737 // Result if any is in native abi result (O0..O1/F0
[all...]
H A DtemplateInterpreter_sparc.cpp70 // result potentially in F0/F1: save it across calls
74 __ stf(FloatRegisterImpl::D, F0, d_tmp);
87 __ ldf(FloatRegisterImpl::D, d_tmp, F0);
252 case T_FLOAT : assert(F0 == Ftos_f, "fix this code" ); break;
253 case T_DOUBLE : assert(F0 == Ftos_d, "fix this code" ); break;
H A DtemplateTable_sparc.cpp1297 assert(Ftos_f == F0, "just checking");
1308 assert( Ftos_f == F0, "fix this code" );
1327 __ pop_d( F0 );
1337 assert( Ftos_d == F0, "fix this code" );
1456 __ ldf(FloatRegisterImpl::S, __ d_tmp, F0);
1457 __ fitof(FloatRegisterImpl::S, F0, Ftos_f);
1462 __ ldf(FloatRegisterImpl::S, __ d_tmp, F0);
1463 __ fitof(FloatRegisterImpl::D, F0, Ftos_f);
1598 assert(Ftos_f == F0 && Ftos_d == F0, "alia
[all...]
H A Dinterp_masm_sparc.cpp2377 stf(FloatRegisterImpl::D, F0, STATE(_native_fresult));
2385 stf(FloatRegisterImpl::D, F0, d_tmp);
2399 ldf(FloatRegisterImpl::D, STATE(_native_fresult), F0);
2407 ldf(FloatRegisterImpl::D, d_tmp, F0);
H A DsharedRuntime_sparc.cpp849 // F0-F7 - more outgoing args
1238 __ stf(FloatRegisterImpl::S, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS);
1241 __ stf(FloatRegisterImpl::D, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS);
1249 __ ldf(FloatRegisterImpl::S, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS, F0);
1252 __ ldf(FloatRegisterImpl::D, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS, F0);
3435 FloatRegister Freturn0 = F0;
3455 // - push a dummy "register_save" and save the return values (O0, O1, F0/F1, G1)
3467 // - create a dummy "unpack_frame" and save the return values (O0, O1, F0)
H A DstubGenerator_sparc.cpp288 __ delayed()->stf(FloatRegisterImpl::S, F0, addr, G0);
292 __ delayed()->stf(FloatRegisterImpl::D, F0, addr, G0);
524 // put addr in L0, then load through L0 to F0
525 __ set((intptr_t)&zero, L0); __ ldf( FloatRegisterImpl::S, L0, 0, F0);
H A Dassembler_sparc.cpp272 fadd( FloatRegisterImpl::S, F0, F1, F2 );
273 fsub( FloatRegisterImpl::D, F34, F0, F62 );
275 fcmp( FloatRegisterImpl::Q, fcc0, F0, F60);
H A Dc1_LIRAssembler_sparc.cpp1910 assert(dest->as_double_reg() == F0, "the result will be in f0/f1");
/openjdk7/jdk/src/share/classes/sun/security/rsa/
H A DRSAKeyPairGenerator.java94 if (tmpPublicExponent.compareTo(RSAKeyGenParameterSpec.F0) < 0) {
/openjdk7/jdk/test/com/sun/jdi/
H A DAccessSpecifierTest.java87 Float F0 = new Float (2.0f); field in class:AccessSpecifierTarg
88 Float F1[]={F0}, F2[][]={F1};
/openjdk7/hotspot/agent/src/share/classes/sun/jvm/hotspot/asm/ia64/
H A DIA64FloatRegisters.java43 public static final IA64FloatRegister F0; field in class:IA64FloatRegisters
175 F0 = new IA64FloatRegister(0);
305 F0, F1, F2, F3, F4, F5, F6, F7, F8, F9,
/openjdk7/jdk/test/java/beans/XMLEncoder/
H A DEnumPrivate.java25 A0,B0,C0,D0,E0,F0,G0,H0,I0,J0,K0,L0,M0,N0,O0,P0,Q0,R0,S0,T0,U0,V0,W0,X0,Y0,Z0, enum constant in enum:EnumPrivate

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