Searched refs:pci_config_put32 (Results 1 - 25 of 55) sorted by relevance

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/illumos-gate/usr/src/uts/intel/io/dktp/controller/ata/
H A Dsil3xxx.h82 pci_config_put32(handle, PCI_CONF_BA5_IND_ADDRESS, address); \
83 pci_config_put32(handle, PCI_CONF_BA5_IND_ACCESS, value); \
88 pci_config_put32(handle, PCI_CONF_BA5_IND_ADDRESS, address); \
/illumos-gate/usr/src/uts/intel/io/mc-amd/
H A Dmcamd_pcicfg.c92 pci_config_put32(hdlp->cfh_hdl, offset, val);
/illumos-gate/usr/src/uts/intel/io/agpgart/
H A Damd64_gart.c96 pci_config_put32(sc->gsoft_pcihdl, AMD64_GART_CACHE_CTL, value);
126 pci_config_put32(sc->gsoft_pcihdl, AMD64_APERTURE_CONTROL, aper_ctl);
288 pci_config_put32(sc->gsoft_pcihdl, AMD64_GART_BASE, addr);
307 pci_config_put32(sc->gsoft_pcihdl, AMD64_GART_BASE, 0x00000000);
H A Dagptarget.c304 pci_config_put32(softstate->tsoft_pcihdl,
743 pci_config_put32(st->tsoft_pcihdl,
811 pci_config_put32(st->tsoft_pcihdl,
815 pci_config_put32(st->tsoft_pcihdl,
/illumos-gate/usr/src/uts/common/io/cxgbe/t4nex/
H A Dadapter.c72 pci_config_put32(sc->pci_regh, reg, val);
/illumos-gate/usr/src/uts/common/os/
H A Dsunpci.c127 pci_config_put32(ddi_acc_handle_t handle, off_t offset, uint32_t value) function
791 pci_config_put32(confhdl, offset, *regbuf);
835 pci_config_put32(confhdl, offset, *p);
873 pci_config_put32(confhdl, PCI_CONF_BASE0, chs_p->chs_base0);
874 pci_config_put32(confhdl, PCI_CONF_BASE1, chs_p->chs_base1);
875 pci_config_put32(confhdl, PCI_CONF_BASE2, chs_p->chs_base2);
876 pci_config_put32(confhdl, PCI_CONF_BASE3, chs_p->chs_base3);
877 pci_config_put32(confhdl, PCI_CONF_BASE4, chs_p->chs_base4);
878 pci_config_put32(confhdl, PCI_CONF_BASE5, chs_p->chs_base5);
H A Dpcifm.c161 pci_config_put32(erpt_p->pe_hdl,
252 pci_config_put32(erpt_p->pe_hdl,
266 pci_config_put32(erpt_p->pe_hdl,
271 pci_config_put32(erpt_p->pe_hdl,
288 pci_config_put32(erpt_p->pe_hdl,
300 pci_config_put32(erpt_p->pe_hdl,
/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Ddb21554.c1037 pci_config_put32(dbp->conf_handle,
1050 pci_config_put32(dbp->conf_handle, (off_t)DB_CONF_DS_IO_MEM1_TR_BASE,
1054 pci_config_put32(dbp->conf_handle, (off_t)DB_CONF_DS_MEM2_TR_BASE,
1058 pci_config_put32(dbp->conf_handle, (off_t)DB_CONF_DS_MEM3_TR_BASE,
1062 pci_config_put32(dbp->conf_handle, (off_t)DB_CONF_US_IO_MEM0_TR_BASE,
1066 pci_config_put32(dbp->conf_handle, (off_t)DB_CONF_US_MEM1_TR_BASE,
1286 pci_config_put32(dbp->conf_handle,
1296 pci_config_put32(dbp->conf_handle,
1299 pci_config_put32(dbp->conf_handle,
1308 pci_config_put32(db
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/illumos-gate/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c899 pci_config_put32(handle, offset,
901 pci_config_put32(handle, offset + 4,
919 pci_config_put32(handle, offset, 0xffffffff);
922 pci_config_put32(handle, offset,
935 pci_config_put32(handle,
956 pci_config_put32(handle, offset, io_answer);
1141 pci_config_put32(phdl->handle, phdl->io_decode_reg, io_reg);
1443 pci_config_put32(handle, PCI_BCNF_PF_BASE_LOW, 0x0000ffff);
1444 pci_config_put32(handle, PCI_BCNF_PF_BASE_HIGH, 0xffffffff);
1446 pci_config_put32(handl
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/illumos-gate/usr/src/uts/common/io/bge/
H A Dbge_chip2.c215 pci_config_put32(bgep->cfg_handle, regno, regval);
250 pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_RIAAR, regno);
277 pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_RIAAR, regno);
278 pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_RIADR, val);
370 pci_config_put32(handle, PCI_CONF_BGE_MHCR, 0);
483 pci_config_put32(handle, PCI_CONF_BGE_MHCR, mhcr);
495 pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_PCISTATE, pci_state);
554 pci_config_put32(handle, PCI_CONF_BGE_RIAAR, 0);
555 pci_config_put32(handle, PCI_CONF_BGE_MWBAR, 0);
894 pci_config_put32(bge
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/illumos-gate/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c1916 pci_config_put32(handle, offset,
1931 pci_config_put32(handle, offset, io_answer);
2062 pci_config_put32(handle, offset,
2065 pci_config_put32(handle, offset + 4,
2100 pci_config_put32(handle, offset,
2127 pci_config_put32(handle, offset,
3583 pci_config_put32(handle, PCI_BCNF_PF_BASE_HIGH,
3640 pci_config_put32(handle, PCI_BCNF_PF_LIMIT_HIGH, PCICFG_HIADDR(
3860 pci_config_put32(config_handle, i, 0xffffffff);
3901 pci_config_put32(config_handl
[all...]
/illumos-gate/usr/src/uts/common/io/chxge/
H A Dch.c483 pci_config_put32(chp->ch_hpci, 0x44, 3);
484 pci_config_put32(chp->ch_hpci, 0x44, 0);
752 pci_config_put32(chp->ch_hpci, 0x44, 3);
753 pci_config_put32(chp->ch_hpci, 0x44, 0);
812 pci_config_put32(chp->ch_hpci, 0x44, 3);
813 pci_config_put32(chp->ch_hpci, 0x44, 0);
1431 pci_config_put32(chp->ch_hpci, 0x44, 3);
1432 pci_config_put32(chp->ch_hpci, 0x44, 0);
H A Dglue.c125 pci_config_put32(obj->ch_hpci, reg, val);
282 pci_config_put32(chp->ch_hpci, pe->addr, pe->pe_reg_val);
/illumos-gate/usr/src/uts/intel/io/pciex/
H A Dpcieb_x86.c502 pci_config_put32(cfg_hdl, reg->offset, value);
599 pci_config_put32(bus_p->bus_cfg_hdl,
/illumos-gate/usr/src/uts/intel/io/amr/
H A Damrreg.h638 #define AMR_QPUT_IDB(sc, val) pci_config_put32(sc->regsmap_handle, \
642 #define AMR_QPUT_ODB(sc, val) pci_config_put32(sc->regsmap_handle, \
/illumos-gate/usr/src/uts/sun4/io/
H A Dpcicfg.c2010 pci_config_put32(handle,
2025 pci_config_put32(handle, offset, io_answer);
2150 pci_config_put32(handle,
2154 pci_config_put32(handle, offset + 4,
2183 pci_config_put32(handle,
2205 pci_config_put32(handle,
3869 pci_config_put32(handle, PCI_BCNF_PF_BASE_LOW, 0x0000ffff);
3870 pci_config_put32(handle, PCI_BCNF_PF_BASE_HIGH, 0xffffffff);
3871 pci_config_put32(handle, PCI_BCNF_PF_LIMIT_HIGH, 0x0);
4206 pci_config_put32(config_handl
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/illumos-gate/usr/src/uts/i86pc/io/pcplusmp/
H A Dapic_introp.c115 pci_config_put32(handle,
119 pci_config_put32(handle,
595 pci_config_put32(handle, msi_mask_off, (uint32_t)-1);
626 pci_config_put32(handle, msi_mask_off, msi_pvm);
/illumos-gate/usr/src/uts/common/io/
H A Dpci_cap.c314 pci_config_put32(h, offset, data);
/illumos-gate/usr/src/uts/common/io/1394/adapters/
H A Dhci1394_attach.c591 pci_config_put32(soft_state->pci_config,
681 pci_config_put32(soft_state->pci_config,
/illumos-gate/usr/src/uts/sun4u/io/
H A Dpmubus.c561 pci_config_put32(softsp->pmubus_reghdl, offset, tmp);
569 pci_config_put32(softsp->pmubus_reghdl, offset, value);
/illumos-gate/usr/src/uts/common/io/e1000g/
H A De1000g_debug.c581 pci_config_put32(handle, offset, 0xffffffff);
589 pci_config_put32(handle, offset, base);
/illumos-gate/usr/src/uts/common/io/xge/drv/
H A Dxge_osdep.h314 pci_config_put32(cfgh, where, val)
/illumos-gate/usr/src/uts/common/io/nge/
H A Dnge_chip.c170 pci_config_put32(ngep->cfg_handle, regno, regval);
630 pci_config_put32(handle, PCI_CONF_HT_INTERNAL,
647 pci_config_put32(handle, PCI_CONF_HT_MSI_MASK,
654 pci_config_put32(handle, PCI_CONF_HT_MSI_MAP_CAP,
661 pci_config_put32(handle, PCI_CONF_HT_INTERNAL,
/illumos-gate/usr/src/uts/common/io/ib/adapters/hermon/
H A Dhermon.c3911 pci_config_put32(hdl, i << 2, state->hs_cfg_data[i]);
3921 pci_config_put32(hdl, offset + HERMON_PCI_CAP_DEV_OFFS, data32);
3923 pci_config_put32(hdl, offset + HERMON_PCI_CAP_LNK_OFFS, data32);
3925 pci_config_put32(hdl, 0x04, (state->hs_cfg_data[1] | 0x0006));
4193 (void) pci_config_put32(hdl, offset, addr << 16);
4968 pci_config_put32(pcihdl, i << 2, state->hs_cfg_data[i]);
5001 pci_config_put32(pcihdl, offset + HERMON_PCI_CAP_DEV_OFFS, data32);
5003 pci_config_put32(pcihdl, offset + HERMON_PCI_CAP_LNK_OFFS, data32);
5006 pci_config_put32(pcihdl, 0x04, (state->hs_cfg_data[1] | 0x0006));
/illumos-gate/usr/src/uts/common/io/yge/
H A Dyge.c602 pci_config_put32(dev->d_pcih, PCI_OUR_REG_1, val);
613 pci_config_put32(dev->d_pcih, PCI_OUR_REG_3, 0);
619 pci_config_put32(dev->d_pcih, PCI_OUR_REG_4, our);
624 pci_config_put32(dev->d_pcih, PCI_OUR_REG_5, our);
626 pci_config_put32(dev->d_pcih, PCI_OUR_REG_1, 0);
660 pci_config_put32(dev->d_pcih, PCI_OUR_REG_1, val);
747 pci_config_put32(pcih, PCI_OUR_REG_1, val);
1222 pci_config_put32(dev->d_pcih, PCI_OUR_REG_3, 0);
1771 pci_config_put32(dev->d_pcih, PCI_OUR_REG_3, 0);

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