080575042aba2197b425ebfd52061dea061a9aa1xy/*
080575042aba2197b425ebfd52061dea061a9aa1xy * This file is provided under a CDDLv1 license. When using or
080575042aba2197b425ebfd52061dea061a9aa1xy * redistributing this file, you may do so under this license.
080575042aba2197b425ebfd52061dea061a9aa1xy * In redistributing this file this license must be included
080575042aba2197b425ebfd52061dea061a9aa1xy * and no other modification of this header file is permitted.
080575042aba2197b425ebfd52061dea061a9aa1xy *
080575042aba2197b425ebfd52061dea061a9aa1xy * CDDL LICENSE SUMMARY
080575042aba2197b425ebfd52061dea061a9aa1xy *
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
080575042aba2197b425ebfd52061dea061a9aa1xy *
080575042aba2197b425ebfd52061dea061a9aa1xy * The contents of this file are subject to the terms of Version
080575042aba2197b425ebfd52061dea061a9aa1xy * 1.0 of the Common Development and Distribution License (the "License").
080575042aba2197b425ebfd52061dea061a9aa1xy *
080575042aba2197b425ebfd52061dea061a9aa1xy * You should have received a copy of the License with this software.
080575042aba2197b425ebfd52061dea061a9aa1xy * You can obtain a copy of the License at
080575042aba2197b425ebfd52061dea061a9aa1xy * http://www.opensolaris.org/os/licensing.
080575042aba2197b425ebfd52061dea061a9aa1xy * See the License for the specific language governing permissions
080575042aba2197b425ebfd52061dea061a9aa1xy * and limitations under the License.
080575042aba2197b425ebfd52061dea061a9aa1xy */
080575042aba2197b425ebfd52061dea061a9aa1xy
080575042aba2197b425ebfd52061dea061a9aa1xy/*
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
080575042aba2197b425ebfd52061dea061a9aa1xy * Use is subject to license terms of the CDDLv1.
080575042aba2197b425ebfd52061dea061a9aa1xy */
080575042aba2197b425ebfd52061dea061a9aa1xy
080575042aba2197b425ebfd52061dea061a9aa1xy/*
080575042aba2197b425ebfd52061dea061a9aa1xy * **********************************************************************
080575042aba2197b425ebfd52061dea061a9aa1xy * *
080575042aba2197b425ebfd52061dea061a9aa1xy * Module Name: *
25f2d433de915875c8393f0b0dc14aa155997ad0xy * e1000g_debug.c *
080575042aba2197b425ebfd52061dea061a9aa1xy * *
080575042aba2197b425ebfd52061dea061a9aa1xy * Abstract: *
25f2d433de915875c8393f0b0dc14aa155997ad0xy * This module includes the debug routines *
080575042aba2197b425ebfd52061dea061a9aa1xy * *
080575042aba2197b425ebfd52061dea061a9aa1xy * **********************************************************************
080575042aba2197b425ebfd52061dea061a9aa1xy */
080575042aba2197b425ebfd52061dea061a9aa1xy#ifdef GCC
080575042aba2197b425ebfd52061dea061a9aa1xy#ifdef __STDC__
080575042aba2197b425ebfd52061dea061a9aa1xy#include <stdarg.h>
080575042aba2197b425ebfd52061dea061a9aa1xy#else
080575042aba2197b425ebfd52061dea061a9aa1xy#include <varargs.h>
080575042aba2197b425ebfd52061dea061a9aa1xy#endif
080575042aba2197b425ebfd52061dea061a9aa1xy#define _SYS_VARARGS_H
080575042aba2197b425ebfd52061dea061a9aa1xy#endif
080575042aba2197b425ebfd52061dea061a9aa1xy
080575042aba2197b425ebfd52061dea061a9aa1xy#include "e1000g_debug.h"
25f2d433de915875c8393f0b0dc14aa155997ad0xy#include "e1000g_sw.h"
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy#ifdef E1000G_DEBUG
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy#include <sys/pcie.h>
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy#endif
25f2d433de915875c8393f0b0dc14aa155997ad0xy
25f2d433de915875c8393f0b0dc14aa155997ad0xy#ifdef E1000G_DEBUG
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy#define WPL 8 /* 8 16-bit words per line */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc#define NUM_REGS 155 /* must match the array initializer */
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyytypedef struct {
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy char name[10];
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy uint32_t offset;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy} Regi_t;
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems
25f2d433de915875c8393f0b0dc14aa155997ad0xyint e1000g_debug = E1000G_WARN_LEVEL;
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems#endif /* E1000G_DEBUG */
25f2d433de915875c8393f0b0dc14aa155997ad0xyint e1000g_log_mode = E1000G_LOG_PRINT;
080575042aba2197b425ebfd52061dea061a9aa1xy
080575042aba2197b425ebfd52061dea061a9aa1xyvoid
25f2d433de915875c8393f0b0dc14aa155997ad0xye1000g_log(void *instance, int level, char *fmt, ...)
080575042aba2197b425ebfd52061dea061a9aa1xy{
25f2d433de915875c8393f0b0dc14aa155997ad0xy struct e1000g *Adapter = (struct e1000g *)instance;
080575042aba2197b425ebfd52061dea061a9aa1xy auto char name[NAMELEN];
080575042aba2197b425ebfd52061dea061a9aa1xy auto char buf[BUFSZ];
080575042aba2197b425ebfd52061dea061a9aa1xy va_list ap;
080575042aba2197b425ebfd52061dea061a9aa1xy
25f2d433de915875c8393f0b0dc14aa155997ad0xy switch (level) {
25f2d433de915875c8393f0b0dc14aa155997ad0xy#ifdef E1000G_DEBUG
25f2d433de915875c8393f0b0dc14aa155997ad0xy case E1000G_VERBOSE_LEVEL: /* 16 or 0x010 */
25f2d433de915875c8393f0b0dc14aa155997ad0xy if (e1000g_debug < E1000G_VERBOSE_LEVEL)
25f2d433de915875c8393f0b0dc14aa155997ad0xy return;
25f2d433de915875c8393f0b0dc14aa155997ad0xy level = CE_CONT;
25f2d433de915875c8393f0b0dc14aa155997ad0xy break;
25f2d433de915875c8393f0b0dc14aa155997ad0xy
25f2d433de915875c8393f0b0dc14aa155997ad0xy case E1000G_TRACE_LEVEL: /* 8 or 0x008 */
25f2d433de915875c8393f0b0dc14aa155997ad0xy if (e1000g_debug < E1000G_TRACE_LEVEL)
25f2d433de915875c8393f0b0dc14aa155997ad0xy return;
25f2d433de915875c8393f0b0dc14aa155997ad0xy level = CE_CONT;
25f2d433de915875c8393f0b0dc14aa155997ad0xy break;
25f2d433de915875c8393f0b0dc14aa155997ad0xy
25f2d433de915875c8393f0b0dc14aa155997ad0xy case E1000G_INFO_LEVEL: /* 4 or 0x004 */
25f2d433de915875c8393f0b0dc14aa155997ad0xy if (e1000g_debug < E1000G_INFO_LEVEL)
25f2d433de915875c8393f0b0dc14aa155997ad0xy return;
25f2d433de915875c8393f0b0dc14aa155997ad0xy level = CE_CONT;
25f2d433de915875c8393f0b0dc14aa155997ad0xy break;
25f2d433de915875c8393f0b0dc14aa155997ad0xy
25f2d433de915875c8393f0b0dc14aa155997ad0xy case E1000G_WARN_LEVEL: /* 2 or 0x002 */
25f2d433de915875c8393f0b0dc14aa155997ad0xy if (e1000g_debug < E1000G_WARN_LEVEL)
25f2d433de915875c8393f0b0dc14aa155997ad0xy return;
25f2d433de915875c8393f0b0dc14aa155997ad0xy level = CE_CONT;
25f2d433de915875c8393f0b0dc14aa155997ad0xy break;
25f2d433de915875c8393f0b0dc14aa155997ad0xy
25f2d433de915875c8393f0b0dc14aa155997ad0xy case E1000G_ERRS_LEVEL: /* 1 or 0x001 */
25f2d433de915875c8393f0b0dc14aa155997ad0xy level = CE_CONT;
25f2d433de915875c8393f0b0dc14aa155997ad0xy break;
25f2d433de915875c8393f0b0dc14aa155997ad0xy#else
25f2d433de915875c8393f0b0dc14aa155997ad0xy case CE_CONT:
25f2d433de915875c8393f0b0dc14aa155997ad0xy case CE_NOTE:
25f2d433de915875c8393f0b0dc14aa155997ad0xy case CE_WARN:
25f2d433de915875c8393f0b0dc14aa155997ad0xy case CE_PANIC:
25f2d433de915875c8393f0b0dc14aa155997ad0xy break;
25f2d433de915875c8393f0b0dc14aa155997ad0xy#endif
25f2d433de915875c8393f0b0dc14aa155997ad0xy default:
25f2d433de915875c8393f0b0dc14aa155997ad0xy level = CE_CONT;
25f2d433de915875c8393f0b0dc14aa155997ad0xy break;
25f2d433de915875c8393f0b0dc14aa155997ad0xy }
25f2d433de915875c8393f0b0dc14aa155997ad0xy
080575042aba2197b425ebfd52061dea061a9aa1xy if (Adapter != NULL) {
080575042aba2197b425ebfd52061dea061a9aa1xy (void) sprintf(name, "%s - e1000g[%d] ",
080575042aba2197b425ebfd52061dea061a9aa1xy ddi_get_name(Adapter->dip), ddi_get_instance(Adapter->dip));
080575042aba2197b425ebfd52061dea061a9aa1xy } else {
080575042aba2197b425ebfd52061dea061a9aa1xy (void) sprintf(name, "e1000g");
080575042aba2197b425ebfd52061dea061a9aa1xy }
080575042aba2197b425ebfd52061dea061a9aa1xy /*
080575042aba2197b425ebfd52061dea061a9aa1xy * va_start uses built in macro __builtin_va_alist from the
080575042aba2197b425ebfd52061dea061a9aa1xy * compiler libs which requires compiler system to have
080575042aba2197b425ebfd52061dea061a9aa1xy * __BUILTIN_VA_ARG_INCR defined.
080575042aba2197b425ebfd52061dea061a9aa1xy */
080575042aba2197b425ebfd52061dea061a9aa1xy /*
080575042aba2197b425ebfd52061dea061a9aa1xy * Many compilation systems depend upon the use of special functions
080575042aba2197b425ebfd52061dea061a9aa1xy * built into the the compilation system to handle variable argument
080575042aba2197b425ebfd52061dea061a9aa1xy * lists and stack allocations. The method to obtain this in SunOS
080575042aba2197b425ebfd52061dea061a9aa1xy * is to define the feature test macro "__BUILTIN_VA_ARG_INCR" which
080575042aba2197b425ebfd52061dea061a9aa1xy * enables the following special built-in functions:
080575042aba2197b425ebfd52061dea061a9aa1xy * __builtin_alloca
080575042aba2197b425ebfd52061dea061a9aa1xy * __builtin_va_alist
080575042aba2197b425ebfd52061dea061a9aa1xy * __builtin_va_arg_incr
080575042aba2197b425ebfd52061dea061a9aa1xy * It is intended that the compilation system define this feature test
080575042aba2197b425ebfd52061dea061a9aa1xy * macro, not the user of the system.
080575042aba2197b425ebfd52061dea061a9aa1xy *
080575042aba2197b425ebfd52061dea061a9aa1xy * The tests on the processor type are to provide a transitional period
080575042aba2197b425ebfd52061dea061a9aa1xy * for existing compilation systems, and may be removed in a future
080575042aba2197b425ebfd52061dea061a9aa1xy * release.
080575042aba2197b425ebfd52061dea061a9aa1xy */
080575042aba2197b425ebfd52061dea061a9aa1xy /*
080575042aba2197b425ebfd52061dea061a9aa1xy * Using GNU gcc compiler it doesn't expand to va_start....
080575042aba2197b425ebfd52061dea061a9aa1xy */
080575042aba2197b425ebfd52061dea061a9aa1xy va_start(ap, fmt);
080575042aba2197b425ebfd52061dea061a9aa1xy (void) vsprintf(buf, fmt, ap);
080575042aba2197b425ebfd52061dea061a9aa1xy va_end(ap);
080575042aba2197b425ebfd52061dea061a9aa1xy
25f2d433de915875c8393f0b0dc14aa155997ad0xy if ((e1000g_log_mode & E1000G_LOG_ALL) == E1000G_LOG_ALL)
25f2d433de915875c8393f0b0dc14aa155997ad0xy cmn_err(level, "%s: %s", name, buf);
25f2d433de915875c8393f0b0dc14aa155997ad0xy else if (e1000g_log_mode & E1000G_LOG_DISPLAY)
25f2d433de915875c8393f0b0dc14aa155997ad0xy cmn_err(level, "^%s: %s", name, buf);
25f2d433de915875c8393f0b0dc14aa155997ad0xy else if (e1000g_log_mode & E1000G_LOG_PRINT)
25f2d433de915875c8393f0b0dc14aa155997ad0xy cmn_err(level, "!%s: %s", name, buf);
25f2d433de915875c8393f0b0dc14aa155997ad0xy else /* if they are not set properly then do both */
080575042aba2197b425ebfd52061dea061a9aa1xy cmn_err(level, "%s: %s", name, buf);
080575042aba2197b425ebfd52061dea061a9aa1xy}
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy#ifdef E1000G_DEBUG
a2e9a8308e6b9832ce4d7b848660483fc31d1dc7ccextern kmutex_t e1000g_nvm_lock;
a2e9a8308e6b9832ce4d7b848660483fc31d1dc7cc
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyyvoid
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyyeeprom_dump(void *instance)
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy{
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy struct e1000g *Adapter = (struct e1000g *)instance;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy struct e1000_hw *hw = &Adapter->shared;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy uint16_t eeprom[WPL], size_field;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy int i, ret, sign, size, lines, offset = 0;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy int ee_size[] =
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {128, 256, 512, 1024, 2048, 4096, 16 * 1024, 32 * 1024, 64 * 1024};
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
a2e9a8308e6b9832ce4d7b848660483fc31d1dc7cc mutex_enter(&e1000g_nvm_lock);
a2e9a8308e6b9832ce4d7b848660483fc31d1dc7cc
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy if (ret = e1000_read_nvm(hw, 0x12, 1, &size_field)) {
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_WARN,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "e1000_read_nvm failed to read size: %d", ret);
a2e9a8308e6b9832ce4d7b848660483fc31d1dc7cc goto eeprom_dump_end;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy }
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy sign = (size_field & 0xc000) >> 14;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy if (sign != 1) {
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_WARN,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "eeprom_dump invalid signature: %d", sign);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy }
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy size = (size_field & 0x3c00) >> 10;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy if (size < 0 || size > 11) {
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_WARN,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "eeprom_dump invalid size: %d", size);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy }
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "eeprom_dump size field: %d eeprom bytes: %d\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy size, ee_size[size]);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "e1000_read_nvm hebs: %d\n", ((size_field & 0x000f) >> 10));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy lines = ee_size[size] / WPL / 2;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "dump eeprom %d lines of %d words per line\n", lines, WPL);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy for (i = 0; i < lines; i++) {
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy if (ret = e1000_read_nvm(hw, offset, WPL, eeprom)) {
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_WARN,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "e1000_read_nvm failed: %d", ret);
a2e9a8308e6b9832ce4d7b848660483fc31d1dc7cc goto eeprom_dump_end;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy }
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "0x%04x %04x %04x %04x %04x %04x %04x %04x %04x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy offset,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy eeprom[0], eeprom[1], eeprom[2], eeprom[3],
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy eeprom[4], eeprom[5], eeprom[6], eeprom[7]);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy offset += WPL;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy }
a2e9a8308e6b9832ce4d7b848660483fc31d1dc7cc
a2e9a8308e6b9832ce4d7b848660483fc31d1dc7cceeprom_dump_end:
a2e9a8308e6b9832ce4d7b848660483fc31d1dc7cc mutex_exit(&e1000g_nvm_lock);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy}
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy/*
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy * phy_dump - dump important phy registers
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy */
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyyvoid
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyyphy_dump(void *instance)
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy{
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy struct e1000g *Adapter = (struct e1000g *)instance;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy struct e1000_hw *hw = &Adapter->shared;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy /* offset to each phy register */
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy int32_t offset[] =
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy 30, 31, 0x1796, 0x187A, 0x1895, 0x1F30, 0x1F35, 0x1F3E, 0x1F54,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy 0x1F55, 0x1F56, 0x1F72, 0x1F76, 0x1F77, 0x1F78, 0x1F79, 0x1F98,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy 0x2010, 0x2011, 0x20DC, 0x20DD, 0x20DE, 0x28B4, 0x2F52, 0x2F5B,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy 0x2F70, 0x2F90, 0x2FB1, 0x2FB2 };
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy uint16_t value; /* register value */
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy uint32_t stat; /* status from e1000_read_phy_reg */
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy int i;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT, "Begin PHY dump\n");
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy for (i = 0; i < ((sizeof (offset)) / sizeof (offset[0])); i++) {
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy stat = e1000_read_phy_reg(hw, offset[i], &value);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy if (stat == 0) {
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "phyreg offset: %d value: 0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy offset[i], value);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy } else {
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_WARN,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "phyreg offset: %d ERROR: 0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy offset[i], stat);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy }
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy }
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy}
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyyuint32_t
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyye1000_read_reg(struct e1000_hw *hw, uint32_t offset)
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy{
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy return (ddi_get32(((struct e1000g_osdep *)(hw)->back)->reg_handle,
fe62dec3a38f1f79ffe68417df75dbbb58135bb7Chen-Liang Xu (uint32_t *)((uintptr_t)(hw)->hw_addr + offset)));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy}
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy/*
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy * mac_dump - dump important mac registers
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy */
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyyvoid
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyymac_dump(void *instance)
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy{
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy struct e1000g *Adapter = (struct e1000g *)instance;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy struct e1000_hw *hw = &Adapter->shared;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy int i;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy /* {name, offset} for each mac register */
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy Regi_t macreg[NUM_REGS] = {
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"CTRL", E1000_CTRL}, {"STATUS", E1000_STATUS},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"EECD", E1000_EECD}, {"EERD", E1000_EERD},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"CTRL_EXT", E1000_CTRL_EXT}, {"FLA", E1000_FLA},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"MDIC", E1000_MDIC}, {"SCTL", E1000_SCTL},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"FCAL", E1000_FCAL}, {"FCAH", E1000_FCAH},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"FCT", E1000_FCT}, {"VET", E1000_VET},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"ICR", E1000_ICR}, {"ITR", E1000_ITR},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"ICS", E1000_ICS}, {"IMS", E1000_IMS},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"IMC", E1000_IMC}, {"IAM", E1000_IAM},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"RCTL", E1000_RCTL}, {"FCTTV", E1000_FCTTV},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"TXCW", E1000_TXCW}, {"RXCW", E1000_RXCW},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"TCTL", E1000_TCTL}, {"TIPG", E1000_TIPG},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"AIT", E1000_AIT}, {"LEDCTL", E1000_LEDCTL},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"PBA", E1000_PBA}, {"PBS", E1000_PBS},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"EEMNGCTL", E1000_EEMNGCTL}, {"ERT", E1000_ERT},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"FCRTL", E1000_FCRTL}, {"FCRTH", E1000_FCRTH},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"PSRCTL", E1000_PSRCTL}, {"RDBAL(0)", E1000_RDBAL(0)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"RDBAH(0)", E1000_RDBAH(0)}, {"RDLEN(0)", E1000_RDLEN(0)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"RDH(0)", E1000_RDH(0)}, {"RDT(0)", E1000_RDT(0)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"RDTR", E1000_RDTR}, {"RXDCTL(0)", E1000_RXDCTL(0)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"RADV", E1000_RADV}, {"RDBAL(1)", E1000_RDBAL(1)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"RDBAH(1)", E1000_RDBAH(1)}, {"RDLEN(1)", E1000_RDLEN(1)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"RDH(1)", E1000_RDH(1)}, {"RDT(1)", E1000_RDT(1)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"RXDCTL(1)", E1000_RXDCTL(1)}, {"RSRPD", E1000_RSRPD},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"RAID", E1000_RAID}, {"CPUVEC", E1000_CPUVEC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"TDFH", E1000_TDFH}, {"TDFT", E1000_TDFT},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"TDFHS", E1000_TDFHS}, {"TDFTS", E1000_TDFTS},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"TDFPC", E1000_TDFPC}, {"TDBAL(0)", E1000_TDBAL(0)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"TDBAH(0)", E1000_TDBAH(0)}, {"TDLEN(0)", E1000_TDLEN(0)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"TDH(0)", E1000_TDH(0)}, {"TDT(0)", E1000_TDT(0)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"TIDV", E1000_TIDV}, {"TXDCTL(0)", E1000_TXDCTL(0)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"TADV", E1000_TADV}, {"TARC(0)", E1000_TARC(0)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"TDBAL(1)", E1000_TDBAL(1)}, {"TDBAH(1)", E1000_TDBAH(1)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"TDLEN(1)", E1000_TDLEN(1)}, {"TDH(1)", E1000_TDH(1)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"TDT(1)", E1000_TDT(1)}, {"TXDCTL(1)", E1000_TXDCTL(1)},
592a4d85662412bade15f3d9e9e0cbcf8514348ccc {"TARC(1)", E1000_TARC(1)}, {"ALGNERRC", E1000_ALGNERRC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"RXERRC", E1000_RXERRC}, {"MPC", E1000_MPC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"SCC", E1000_SCC}, {"ECOL", E1000_ECOL},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"MCC", E1000_MCC}, {"LATECOL", E1000_LATECOL},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"COLC", E1000_COLC}, {"DC", E1000_DC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"TNCRS", E1000_TNCRS}, {"SEC", E1000_SEC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"CEXTERR", E1000_CEXTERR}, {"RLEC", E1000_RLEC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"XONRXC", E1000_XONRXC}, {"XONTXC", E1000_XONTXC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"XOFFRXC", E1000_XOFFRXC}, {"XOFFTXC", E1000_XOFFTXC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"FCRUC", E1000_FCRUC}, {"PRC64", E1000_PRC64},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"PRC127", E1000_PRC127}, {"PRC255", E1000_PRC255},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"PRC511", E1000_PRC511}, {"PRC1023", E1000_PRC1023},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"PRC1522", E1000_PRC1522}, {"GPRC", E1000_GPRC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"BPRC", E1000_BPRC}, {"MPRC", E1000_MPRC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"GPTC", E1000_GPTC}, {"GORCL", E1000_GORCL},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"GORCH", E1000_GORCH}, {"GOTCL", E1000_GOTCL},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"GOTCH", E1000_GOTCH}, {"RNBC", E1000_RNBC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"RUC", E1000_RUC}, {"RFC", E1000_RFC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"ROC", E1000_ROC}, {"RJC", E1000_RJC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"MGTPRC", E1000_MGTPRC}, {"MGTPDC", E1000_MGTPDC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"MGTPTC", E1000_MGTPTC}, {"TORL", E1000_TORL},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"TORH", E1000_TORH}, {"TOTL", E1000_TOTL},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"TOTH", E1000_TOTH}, {"TPR", E1000_TPR},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"TPT", E1000_TPT}, {"PTC64", E1000_PTC64},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"PTC127", E1000_PTC127}, {"PTC255", E1000_PTC255},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"PTC511", E1000_PTC511}, {"PTC1023", E1000_PTC1023},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"PTC1522", E1000_PTC1522}, {"MPTC", E1000_MPTC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"BPTC", E1000_BPTC}, {"TSCTC", E1000_TSCTC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"TSCTFC", E1000_TSCTFC}, {"IAC", E1000_IAC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"ICRXPTC", E1000_ICRXPTC}, {"ICRXATC", E1000_ICRXATC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"ICTXPTC", E1000_ICTXPTC}, {"ICTXATC", E1000_ICTXATC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"ICTXQEC", E1000_ICTXQEC}, {"ICTXQMTC", E1000_ICTXQMTC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"ICRXDMTC", E1000_ICRXDMTC}, {"ICRXOC", E1000_ICRXOC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"RXCSUM", E1000_RXCSUM}, {"RFCTL", E1000_RFCTL},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"WUC", E1000_WUC}, {"WUFC", E1000_WUFC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"WUS", E1000_WUS}, {"MRQC", E1000_MRQC},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"MANC", E1000_MANC}, {"IPAV", E1000_IPAV},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"MANC2H", E1000_MANC2H}, {"RSSIM", E1000_RSSIM},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"RSSIR", E1000_RSSIR}, {"WUPL", E1000_WUPL},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"GCR", E1000_GCR}, {"GSCL_1", E1000_GSCL_1},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"GSCL_2", E1000_GSCL_2}, {"GSCL_3", E1000_GSCL_3},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"GSCL_4", E1000_GSCL_4}, {"FACTPS", E1000_FACTPS},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy {"FWSM", E1000_FWSM},
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy };
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT, "Begin MAC dump\n");
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy for (i = 0; i < NUM_REGS; i++) {
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "macreg %10s offset: 0x%x value: 0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy macreg[i].name, macreg[i].offset,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000_read_reg(hw, macreg[i].offset));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy }
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy}
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyyvoid
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyypciconfig_dump(void *instance)
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy{
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy struct e1000g *Adapter = (struct e1000g *)instance;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy ddi_acc_handle_t handle;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy uint8_t cap_ptr;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy uint8_t next_ptr;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy off_t offset;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy handle = Adapter->osdep.cfg_handle;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT, "Begin dump PCI config space\n");
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_VENID:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, PCI_CONF_VENID));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_DEVID:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, PCI_CONF_DEVID));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_COMMAND:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, PCI_CONF_COMM));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_STATUS:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, PCI_CONF_STAT));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_REVID:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_REVID));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_PROG_CLASS:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_PROGCLASS));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_SUB_CLASS:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_SUBCLASS));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_BAS_CLASS:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_BASCLASS));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_CACHE_LINESZ:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_CACHE_LINESZ));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_LATENCY_TIMER:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_LATENCY_TIMER));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_HEADER_TYPE:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_HEADER));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_BIST:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_BIST));
592a4d85662412bade15f3d9e9e0cbcf8514348ccc
592a4d85662412bade15f3d9e9e0cbcf8514348ccc pciconfig_bar(Adapter, PCI_CONF_BASE0, "PCI_CONF_BASE0");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc pciconfig_bar(Adapter, PCI_CONF_BASE1, "PCI_CONF_BASE1");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc pciconfig_bar(Adapter, PCI_CONF_BASE2, "PCI_CONF_BASE2");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc pciconfig_bar(Adapter, PCI_CONF_BASE3, "PCI_CONF_BASE3");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc pciconfig_bar(Adapter, PCI_CONF_BASE4, "PCI_CONF_BASE4");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc pciconfig_bar(Adapter, PCI_CONF_BASE5, "PCI_CONF_BASE5");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_CIS:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get32(handle, PCI_CONF_CIS));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_SUBVENID:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, PCI_CONF_SUBVENID));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_SUBSYSID:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, PCI_CONF_SUBSYSID));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_ROM:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get32(handle, PCI_CONF_ROM));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy cap_ptr = pci_config_get8(handle, PCI_CONF_CAP_PTR);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_CAP_PTR:\t0x%x\n", cap_ptr);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_ILINE:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_ILINE));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_IPIN:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_IPIN));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_MIN_G:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_MIN_G));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_CONF_MAX_L:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, PCI_CONF_MAX_L));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy /* Power Management */
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy offset = cap_ptr;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_PM_CAP_ID:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, offset));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy next_ptr = pci_config_get8(handle, offset + 1);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_PM_NEXT_PTR:\t0x%x\n", next_ptr);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_PM_CAP:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, offset + PCI_PMCAP));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_PM_CSR:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, offset + PCI_PMCSR));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_PM_CSR_BSE:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, offset + PCI_PMCSR_BSE));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_PM_DATA:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, offset + PCI_PMDATA));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy /* MSI Configuration */
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy offset = next_ptr;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_MSI_CAP_ID:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, offset));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy next_ptr = pci_config_get8(handle, offset + 1);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_MSI_NEXT_PTR:\t0x%x\n", next_ptr);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_MSI_CTRL:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, offset + PCI_MSI_CTRL));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_MSI_ADDR:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get32(handle, offset + PCI_MSI_ADDR_OFFSET));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_MSI_ADDR_HI:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get32(handle, offset + 0x8));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCI_MSI_DATA:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, offset + 0xC));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy /* PCI Express Configuration */
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy offset = next_ptr;
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCIE_CAP_ID:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get8(handle, offset + PCIE_CAP_ID));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy next_ptr = pci_config_get8(handle, offset + PCIE_CAP_NEXT_PTR);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCIE_CAP_NEXT_PTR:\t0x%x\n", next_ptr);
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCIE_PCIECAP:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, offset + PCIE_PCIECAP));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCIE_DEVCAP:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get32(handle, offset + PCIE_DEVCAP));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCIE_DEVCTL:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, offset + PCIE_DEVCTL));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCIE_DEVSTS:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, offset + PCIE_DEVSTS));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCIE_LINKCAP:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get32(handle, offset + PCIE_LINKCAP));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCIE_LINKCTL:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, offset + PCIE_LINKCTL));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy e1000g_log(Adapter, CE_CONT,
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy "PCIE_LINKSTS:\t0x%x\n",
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy pci_config_get16(handle, offset + PCIE_LINKSTS));
4914a7d0d1ee59f8cc21b19bfd7979cb65681eacyy}
592a4d85662412bade15f3d9e9e0cbcf8514348ccc
592a4d85662412bade15f3d9e9e0cbcf8514348cccvoid
592a4d85662412bade15f3d9e9e0cbcf8514348cccpciconfig_bar(void *instance, uint32_t offset, char *name)
592a4d85662412bade15f3d9e9e0cbcf8514348ccc{
592a4d85662412bade15f3d9e9e0cbcf8514348ccc struct e1000g *Adapter = (struct e1000g *)instance;
592a4d85662412bade15f3d9e9e0cbcf8514348ccc ddi_acc_handle_t handle = Adapter->osdep.cfg_handle;
592a4d85662412bade15f3d9e9e0cbcf8514348ccc uint32_t base = pci_config_get32(handle, offset);
592a4d85662412bade15f3d9e9e0cbcf8514348ccc uint16_t comm = pci_config_get16(handle, PCI_CONF_COMM);
592a4d85662412bade15f3d9e9e0cbcf8514348ccc uint32_t size; /* derived size of the region */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc uint32_t bits_comm; /* command word bits to disable */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc uint32_t size_mask; /* mask for size extraction */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc char tag_type[32]; /* tag to show memory vs. i/o */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc char tag_mem[32]; /* tag to show memory characteristiccs */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc
592a4d85662412bade15f3d9e9e0cbcf8514348ccc /* base address zero, simple print */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc if (base == 0) {
592a4d85662412bade15f3d9e9e0cbcf8514348ccc e1000g_log(Adapter, CE_CONT, "%s:\t0x%x\n", name, base);
592a4d85662412bade15f3d9e9e0cbcf8514348ccc
592a4d85662412bade15f3d9e9e0cbcf8514348ccc /* base address non-zero, get size */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc } else {
592a4d85662412bade15f3d9e9e0cbcf8514348ccc /* i/o factors that decode from the base address */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc if (base & PCI_BASE_SPACE_IO) {
592a4d85662412bade15f3d9e9e0cbcf8514348ccc bits_comm = PCI_COMM_IO;
592a4d85662412bade15f3d9e9e0cbcf8514348ccc size_mask = PCI_BASE_IO_ADDR_M;
fe62dec3a38f1f79ffe68417df75dbbb58135bb7Chen-Liang Xu (void) strcpy(tag_type, "i/o port size:");
fe62dec3a38f1f79ffe68417df75dbbb58135bb7Chen-Liang Xu (void) strcpy(tag_mem, "");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc /* memory factors that decode from the base address */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc } else {
592a4d85662412bade15f3d9e9e0cbcf8514348ccc bits_comm = PCI_COMM_MAE;
592a4d85662412bade15f3d9e9e0cbcf8514348ccc size_mask = PCI_BASE_M_ADDR_M;
fe62dec3a38f1f79ffe68417df75dbbb58135bb7Chen-Liang Xu (void) strcpy(tag_type, "memory size:");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc if (base & PCI_BASE_TYPE_ALL)
fe62dec3a38f1f79ffe68417df75dbbb58135bb7Chen-Liang Xu (void) strcpy(tag_mem, "64bit ");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc else
fe62dec3a38f1f79ffe68417df75dbbb58135bb7Chen-Liang Xu (void) strcpy(tag_mem, "32bit ");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc if (base & PCI_BASE_PREF_M)
fe62dec3a38f1f79ffe68417df75dbbb58135bb7Chen-Liang Xu (void) strcat(tag_mem, "prefetchable");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc else
fe62dec3a38f1f79ffe68417df75dbbb58135bb7Chen-Liang Xu (void) strcat(tag_mem, "non-prefetchable");
592a4d85662412bade15f3d9e9e0cbcf8514348ccc }
592a4d85662412bade15f3d9e9e0cbcf8514348ccc
592a4d85662412bade15f3d9e9e0cbcf8514348ccc /* disable memory decode */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc pci_config_put16(handle, PCI_CONF_COMM, (comm & ~bits_comm));
592a4d85662412bade15f3d9e9e0cbcf8514348ccc
592a4d85662412bade15f3d9e9e0cbcf8514348ccc /* write to base register */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc pci_config_put32(handle, offset, 0xffffffff);
592a4d85662412bade15f3d9e9e0cbcf8514348ccc
592a4d85662412bade15f3d9e9e0cbcf8514348ccc /* read back & compute size */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc size = pci_config_get32(handle, offset);
592a4d85662412bade15f3d9e9e0cbcf8514348ccc size &= size_mask;
592a4d85662412bade15f3d9e9e0cbcf8514348ccc size = (~size) + 1;
592a4d85662412bade15f3d9e9e0cbcf8514348ccc
592a4d85662412bade15f3d9e9e0cbcf8514348ccc /* restore base register */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc pci_config_put32(handle, offset, base);
592a4d85662412bade15f3d9e9e0cbcf8514348ccc
592a4d85662412bade15f3d9e9e0cbcf8514348ccc /* re-enable memory decode */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc pci_config_put16(handle, PCI_CONF_COMM, comm);
592a4d85662412bade15f3d9e9e0cbcf8514348ccc
592a4d85662412bade15f3d9e9e0cbcf8514348ccc /* print results */
592a4d85662412bade15f3d9e9e0cbcf8514348ccc e1000g_log(Adapter, CE_CONT, "%s:\t0x%x %s 0x%x %s\n",
592a4d85662412bade15f3d9e9e0cbcf8514348ccc name, base, tag_type, size, tag_mem);
592a4d85662412bade15f3d9e9e0cbcf8514348ccc }
592a4d85662412bade15f3d9e9e0cbcf8514348ccc}
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems#endif /* E1000G_DEBUG */