Searched refs:io_base (Results 1 - 14 of 14) sorted by relevance

/illumos-gate/usr/src/uts/sun4/io/efcode/
H A Dfc_physio.c61 fc_physio_setup(struct buf **bpp, void *io_base, size_t io_len) argument
92 bp->b_un.b_addr = io_base;
95 error = as_pagelock(asp, &pplist, io_base, io_len, S_WRITE);
117 fc_physio_free(struct buf **bpp, void *io_base, size_t io_len) argument
129 as_pageunlock(bp->b_proc->p_as, pplist, io_base, io_len, S_WRITE);
/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Dtlan.c82 static int TLan_EeReadByte(u16 io_base, u8, u8 *);
951 * io_base The IO port base address for the
960 void TLan_EeSendStart(u16 io_base) argument
964 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
965 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
983 * Parms: io_base The IO port base address for the
1000 int TLan_EeSendByte(u16 io_base, u8 data, int stop) argument
1006 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
1007 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
1043 * io_base Th
1061 TLan_EeReceiveByte(u16 io_base, u8 * data, int stop) argument
1118 TLan_EeReadByte(u16 io_base, u8 ee_addr, u8 * data) argument
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H A De1000.c724 uint32_t io_addr = hw->io_base;
725 uint32_t io_data = hw->io_base + 4;
3584 hw.io_base = pci_bar_start(p, i);
H A De1000_hw.h911 uint32_t io_base; member in struct:e1000_hw
/illumos-gate/usr/src/uts/common/io/e1000g/
H A De1000_osdep.h235 (uint32_t *)(a)->io_base, \
238 (uint32_t *)((a)->io_base + 4), \
H A De1000g_main.c765 (caddr_t *)&hw->io_base, 0, mem_size,
774 hw->io_base = 0;
/illumos-gate/usr/src/uts/common/io/igb/
H A De1000_osdep.h202 (uint32_t *)(a)->io_base, \
205 (uint32_t *)((a)->io_base + 4), \
/illumos-gate/usr/src/uts/sun4/sys/
H A Dfcode.h653 int fc_physio_setup(struct buf **bpp, void *io_base, size_t io_len);
654 void fc_physio_free(struct buf **bpp, void *io_base, size_t io_len);
/illumos-gate/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c116 uint32_t io_base; /* I/O base for this attach point */ member in struct:pcicfg_phdl
1056 phdl->io_base = phdl->io_last = (uint32_t)boundbase;
1058 phdl->io_hole.start = phdl->io_base;
1097 phdl->io_base, phdl->io_len);
1125 range[0].child_low = range[0].parent_low = (uint32_t)entry->io_base;
1687 entry->io_base, entry->io_len,
1801 io_residual = entry->io_len - (entry->io_last - entry->io_base);
1816 range[0].size_low = entry->io_last - entry->io_base;
4045 uint64_t mem_answer, io_answer, mem_base, io_base, mem_alen, io_alen; local
4063 io_answer = io_base
4853 (void) ndi_ra_free(ddi_get_parent(new_child), io_base, local
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/illumos-gate/usr/src/uts/intel/io/pci/
H A Dpci_boot.c896 uint_t io_base, io_limit, mem_base, mem_limit; local
1083 io_base = pci_getb(bus, dev, func, PCI_BCNF_IO_BASE_LOW);
1085 io_base = (io_base & 0xf0) << 8;
1093 (io_base > io_limit) ||
1105 io_base = 0;
1109 if (!io_base) {
1110 io_base = (uint_t)list->ml_address;
1113 io_base =
1114 P2ALIGN(io_base, PPB_IO_ALIGNMEN
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/illumos-gate/usr/src/uts/sun4/io/
H A Dpcicfg.c150 uint32_t io_base; /* I/O base for this attach point */ member in struct:pcicfg_phdl
1203 phdl->io_base = phdl->io_last = (uint32_t)boundbase;
1205 phdl->io_hole.start = phdl->io_base;
1215 phdl->io_base, phdl->io_len);
1254 range[0].child_lo = range[0].parent_lo = (uint32_t)entry->io_base;
1784 entry->io_base,
1933 range[0].size_lo = entry->io_last - entry->io_base;
2451 phdl->io_base = phdl->io_last = (uint32_t)io_answer;
2454 phdl->io_hole.start = phdl->io_base;
2461 phdl->io_base, phd
4900 uint64_t io_answer, io_base, io_alen, io_size, io_end; local
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/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_vf.h266 unsigned long io_base; member in struct:e1000_hw
H A De1000_hw.h1000 unsigned long io_base; member in struct:e1000_hw
/illumos-gate/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c142 uint32_t io_base; /* I/O base for this attach point */ member in struct:cardbus_phdl
156 uint32_t io_base; /* I/O base for this attach point */ member in struct:__anon5111
589 res.ra_addr_lo = entry->io_base;
595 entry->io_base, entry->io_len);
765 range[0].size_lo = entry->io_last - entry->io_base;
1076 isa_phdl.io_base = io_answer;
1102 "cardbus_add_isa_reg, base 0x%x\n", phdl->io_base);
1119 reg[1] = breg[1] + phdl->io_base;
1293 phdl->io_base = phdl->io_last = (uint32_t)res.ra_addr_lo;
1308 phdl->io_base, phd
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