/illumos-gate/usr/src/uts/intel/io/drm/ |
H A D | radeon_cp.c | 827 drm_radeon_private_t *dev_priv = dev->dev_private; local 833 static int RADEON_READ_PCIE(drm_radeon_private_t *dev_priv, int addr) argument 840 static void radeon_status(drm_radeon_private_t *dev_priv) argument 865 static int radeon_do_pixcache_flush(drm_radeon_private_t *dev_priv) argument 870 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; 876 for (i = 0; i < dev_priv->usec_timeout; i++) { 886 radeon_status(dev_priv); 891 static int radeon_do_wait_for_fifo(drm_radeon_private_t *dev_priv, int entries) argument 895 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; 897 for (i = 0; i < dev_priv 914 radeon_do_wait_for_idle(drm_radeon_private_t *dev_priv) argument 947 radeon_cp_load_microcode(drm_radeon_private_t *dev_priv) argument 987 radeon_do_cp_flush(drm_radeon_private_t *dev_priv) argument 1001 radeon_do_cp_idle(drm_radeon_private_t *dev_priv) argument 1018 radeon_do_cp_start(drm_radeon_private_t *dev_priv) argument 1043 radeon_do_cp_reset(drm_radeon_private_t *dev_priv) argument 1059 radeon_do_cp_stop(drm_radeon_private_t *dev_priv) argument 1071 drm_radeon_private_t *dev_priv = dev->dev_private; local 1126 radeon_cp_init_ring_buffer(drm_device_t *dev, drm_radeon_private_t *dev_priv) argument 1244 radeon_test_writeback(drm_radeon_private_t *dev_priv) argument 1300 radeon_set_pciegart(drm_radeon_private_t *dev_priv, int on) argument 1329 radeon_set_pcigart(drm_radeon_private_t *dev_priv, int on) argument 1363 drm_radeon_private_t *dev_priv = dev->dev_private; local 1713 drm_radeon_private_t *dev_priv = dev->dev_private; local 1770 drm_radeon_private_t *dev_priv = dev->dev_private; local 1862 drm_radeon_private_t *dev_priv = dev->dev_private; local 1889 drm_radeon_private_t *dev_priv = dev->dev_private; local 1934 drm_radeon_private_t *dev_priv = dev->dev_private; local 1991 drm_radeon_private_t *dev_priv = dev->dev_private; local 2013 drm_radeon_private_t *dev_priv = dev->dev_private; local 2079 drm_radeon_private_t *dev_priv = dev->dev_private; local 2155 drm_radeon_private_t *dev_priv = dev->dev_private; local 2170 radeon_wait_ring(drm_radeon_private_t *dev_priv, int n) argument 2307 drm_radeon_private_t *dev_priv; local 2352 drm_radeon_private_t *dev_priv = dev->dev_private; local 2380 drm_radeon_private_t *dev_priv = dev->dev_private; local [all...] |
H A D | radeon_irq.c | 44 radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv, u32 mask) argument 75 drm_radeon_private_t *dev_priv = local 83 stat = radeon_acknowledge_irqs(dev_priv, (RADEON_SW_INT_TEST_ACK | 88 stat &= dev_priv->irq_enable_reg; 92 DRM_WAKEUP(&dev_priv->swi_queue); 97 int vblank_crtc = dev_priv->vblank_crtc; 121 drm_radeon_private_t *dev_priv = dev->dev_private; local 125 atomic_inc(&dev_priv->swi_emitted); 126 ret = atomic_read(&dev_priv->swi_emitted); 139 drm_radeon_private_t *dev_priv local 157 drm_radeon_private_t *dev_priv = local 217 drm_radeon_private_t *dev_priv = dev->dev_private; local 261 drm_radeon_private_t *dev_priv = dev->dev_private; local 276 drm_radeon_private_t *dev_priv; local 300 drm_radeon_private_t *dev_priv = local 320 drm_radeon_private_t *dev_priv = local 332 drm_radeon_private_t *dev_priv = local 345 drm_radeon_private_t *dev_priv; local 364 drm_radeon_private_t *dev_priv; local [all...] |
H A D | i915_irq.c | 66 igdng_enable_irq(drm_i915_private_t *dev_priv, u32 mask, int gfx_irq) argument 68 if (gfx_irq && ((dev_priv->gt_irq_mask_reg & mask) != 0)) { 69 dev_priv->gt_irq_mask_reg &= ~mask; 70 I915_WRITE(GTIMR, dev_priv->gt_irq_mask_reg); 72 } else if ((dev_priv->irq_mask_reg & mask) != 0) { 73 dev_priv->irq_mask_reg &= ~mask; 74 I915_WRITE(DEIMR, dev_priv->irq_mask_reg); 81 igdng_disable_irq(drm_i915_private_t *dev_priv, u32 mask, int gfx_irq) argument 83 if (gfx_irq && ((dev_priv->gt_irq_mask_reg & mask) != mask)) { 84 dev_priv 96 igdng_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) argument 118 i915_enable_irq(drm_i915_private_t *dev_priv, uint32_t mask) argument 128 i915_disable_irq(drm_i915_private_t *dev_priv, uint32_t mask) argument 148 i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, uint32_t mask) argument 161 i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask) argument 184 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 195 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 238 struct drm_i915_private *dev_priv = dev->dev_private; local 306 struct drm_i915_private *dev_priv = dev->dev_private; local 418 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 431 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 488 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 562 drm_i915_private_t *dev_priv = dev->dev_private; local 617 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 631 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 645 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 700 drm_i915_private_t *dev_priv = dev->dev_private; local 741 drm_i915_private_t *dev_priv = dev->dev_private; local 757 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 775 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 793 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 817 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 835 drm_i915_private_t *dev_priv = dev->dev_private; local 849 drm_i915_private_t *dev_priv = dev->dev_private; local 893 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 911 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 941 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 955 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 978 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 1029 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local [all...] |
H A D | i915_dma.c | 52 drm_i915_private_t *dev_priv = dev->dev_private; local 53 drm_i915_ring_buffer_t *ring = &(dev_priv->ring); 85 drm_i915_private_t *dev_priv = dev->dev_private; local 96 dev_priv->status_page_dmah = dmah; 97 dev_priv->hw_status_page = (void *)dmah->vaddr; 98 dev_priv->dma_status_page = dmah->paddr; 100 (void) memset(dev_priv->hw_status_page, 0, PAGE_SIZE); 102 I915_WRITE(HWS_PGA, dev_priv->dma_status_page); 105 DRM_DEBUG("Enabled hardware status page add 0x%lx read GEM HWS 0x%x\n",dev_priv->hw_status_page, READ_HWSP(dev_priv, 111 drm_i915_private_t *dev_priv = dev->dev_private; local 133 drm_i915_private_t *dev_priv = dev->dev_private; local 146 drm_i915_private_t *dev_priv = local 177 drm_i915_private_t *dev_priv = local 234 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 372 drm_i915_private_t *dev_priv = dev->dev_private; local 418 drm_i915_private_t *dev_priv = dev->dev_private; local 460 drm_i915_private_t *dev_priv = dev->dev_private; local 514 drm_i915_private_t *dev_priv = dev->dev_private; local 564 drm_i915_private_t *dev_priv = dev->dev_private; local 613 drm_i915_private_t *dev_priv = dev->dev_private; local 648 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 701 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local 775 drm_i915_private_t *dev_priv = dev->dev_private; local 829 drm_i915_private_t *dev_priv = dev->dev_private; local 861 drm_i915_private_t *dev_priv = dev->dev_private; local 909 struct drm_i915_private *dev_priv; local 988 drm_i915_private_t *dev_priv = dev->dev_private; local 1025 drm_i915_private_t *dev_priv = dev->dev_private; local 1043 drm_i915_private_t *dev_priv = dev->dev_private; local [all...] |
H A D | radeon_state.c | 49 radeon_check_and_fixup_offset(drm_radeon_private_t *dev_priv, argument 53 u32 fb_end = dev_priv->fb_location + dev_priv->fb_size - 1; 76 if (RADEON_CHECK_OFFSET(dev_priv, off)) 84 if (off < (dev_priv->fb_size + dev_priv->gart_size)) { 91 off = off - fb_end - 1 + dev_priv->gart_vm_start; 94 if (RADEON_CHECK_OFFSET(dev_priv, off)) { 103 radeon_check_and_fixup_packets(drm_radeon_private_t *dev_priv, argument 109 if (radeon_check_and_fixup_offset(dev_priv, filp_pri 276 radeon_check_and_fixup_packet3(drm_radeon_private_t *dev_priv, drm_file_t *filp_priv, drm_radeon_kcmd_buffer_t *cmdbuf, unsigned int *cmdsz) argument 443 radeon_emit_clip_rect(drm_radeon_private_t *dev_priv, drm_clip_rect_t *box) argument 460 radeon_emit_state(drm_radeon_private_t *dev_priv, drm_file_t *filp_priv, drm_radeon_context_regs_t *ctx, drm_radeon_texture_regs_t *tex, unsigned int dirty) argument 626 radeon_emit_state2(drm_radeon_private_t *dev_priv, drm_file_t *filp_priv, drm_radeon_state_t *state) argument 757 radeon_clear_box(drm_radeon_private_t *dev_priv, int x, int y, int w, int h, int r, int g, int b) argument 806 radeon_cp_performance_boxes(drm_radeon_private_t *dev_priv) argument 862 drm_radeon_private_t *dev_priv = dev->dev_private; local 1400 drm_radeon_private_t *dev_priv = dev->dev_private; local 1476 drm_radeon_private_t *dev_priv = dev->dev_private; local 1554 drm_radeon_private_t *dev_priv = dev->dev_private; local 1598 drm_radeon_private_t *dev_priv = dev->dev_private; local 1616 drm_radeon_private_t *dev_priv = dev->dev_private; local 1651 drm_radeon_private_t *dev_priv = dev->dev_private; local 1709 drm_radeon_private_t *dev_priv = dev->dev_private; local 1978 drm_radeon_private_t *dev_priv = dev->dev_private; local 1996 radeon_apply_surface_regs(int surf_index, drm_radeon_private_t *dev_priv) argument 2024 alloc_surface(drm_radeon_surface_alloc_t *new, drm_radeon_private_t *dev_priv, drm_file_t *filp) argument 2120 free_surface(drm_file_t *filp, drm_radeon_private_t *dev_priv, int lower) argument 2156 radeon_surfaces_release(drm_file_t *filp, drm_radeon_private_t *dev_priv) argument 2175 drm_radeon_private_t *dev_priv = dev->dev_private; local 2195 drm_radeon_private_t *dev_priv = dev->dev_private; local 2215 drm_radeon_private_t *dev_priv = dev->dev_private; local 2260 drm_radeon_private_t *dev_priv = dev->dev_private; local 2286 drm_radeon_private_t *dev_priv = dev->dev_private; local 2303 drm_radeon_private_t *dev_priv = dev->dev_private; local 2322 drm_radeon_private_t *dev_priv = dev->dev_private; local 2343 drm_radeon_private_t *dev_priv = dev->dev_private; local 2431 drm_radeon_private_t *dev_priv = dev->dev_private; local 2529 drm_radeon_private_t *dev_priv = dev->dev_private; local 2592 drm_radeon_private_t *dev_priv = dev->dev_private; local 2627 drm_radeon_private_t *dev_priv = dev->dev_private; local 2702 drm_radeon_private_t *dev_priv = dev->dev_private; local 2819 radeon_emit_packets(drm_radeon_private_t *dev_priv, drm_file_t *filp_priv, drm_radeon_cmd_header_t header, drm_radeon_kcmd_buffer_t *cmdbuf) argument 2855 radeon_emit_scalars(drm_radeon_private_t *dev_priv, drm_radeon_cmd_header_t header, drm_radeon_kcmd_buffer_t *cmdbuf) argument 2878 radeon_emit_scalars2(drm_radeon_private_t *dev_priv, drm_radeon_cmd_header_t header, drm_radeon_kcmd_buffer_t *cmdbuf) argument 2898 radeon_emit_vectors(drm_radeon_private_t *dev_priv, drm_radeon_cmd_header_t header, drm_radeon_kcmd_buffer_t *cmdbuf) argument 2920 radeon_emit_veclinear(drm_radeon_private_t *dev_priv, drm_radeon_cmd_header_t header, drm_radeon_kcmd_buffer_t *cmdbuf) argument 2949 drm_radeon_private_t *dev_priv = dev->dev_private; local 2975 drm_radeon_private_t *dev_priv = dev->dev_private; local 3035 drm_radeon_private_t *dev_priv = dev->dev_private; local 3066 drm_radeon_private_t *dev_priv = dev->dev_private; local 3253 drm_radeon_private_t *dev_priv = dev->dev_private; local 3357 drm_radeon_private_t *dev_priv = dev->dev_private; local 3425 drm_radeon_private_t *dev_priv = dev->dev_private; local 3444 drm_radeon_private_t *dev_priv = dev->dev_private; local [all...] |
H A D | r300_cmdbuf.c | 64 static int r300_emit_cliprects(drm_radeon_private_t *dev_priv, argument 260 r300_emit_carefully_checked_packet0(drm_radeon_private_t *dev_priv, argument 283 if (!RADEON_CHECK_OFFSET(dev_priv, (u32) values[i])) { 313 static __inline__ int r300_emit_packet0(drm_radeon_private_t *dev_priv, argument 338 return (r300_emit_carefully_checked_packet0(dev_priv, 362 static inline int r300_emit_vpu(drm_radeon_private_t *dev_priv, argument 400 static inline int r300_emit_clear(drm_radeon_private_t *dev_priv, argument 421 static inline int r300_emit_3d_load_vbpntr(drm_radeon_private_t *dev_priv, argument 447 if (!RADEON_CHECK_OFFSET(dev_priv, payload[i])) { 458 if (!RADEON_CHECK_OFFSET(dev_priv, payloa 488 r300_emit_bitblt_multi(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf) argument 536 r300_emit_indx_buffer(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf) argument 567 r300_emit_raw_packet3(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf) argument 643 r300_emit_packet3(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf, drm_r300_cmd_header_t header) argument 713 r300_pacify(drm_radeon_private_t *dev_priv) argument 734 drm_radeon_private_t *dev_priv = dev->dev_private; local 742 r300_scratch(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf, drm_r300_cmd_header_t header) argument 814 drm_radeon_private_t *dev_priv = dev->dev_private; local [all...] |
H A D | i915_gem.c | 84 drm_i915_private_t *dev_priv = dev->dev_private; local 105 (void) drm_mm_init(&dev_priv->mm.gtt_space, 107 DRM_DEBUG("i915_gem_init_ioctl dev->gtt_total %x, dev_priv->mm.gtt_space 0x%x gtt_start 0x%lx", dev->gtt_total, dev_priv->mm.gtt_space, args.gtt_start); 535 drm_i915_private_t *dev_priv = dev->dev_private; local 545 &dev_priv->mm.active_list, (caddr_t)obj_priv); 553 drm_i915_private_t *dev_priv = dev->dev_private; local 556 list_move_tail(&obj_priv->list, &dev_priv->mm.flushing_list, (caddr_t)obj_priv); 564 drm_i915_private_t *dev_priv = dev->dev_private; local 571 list_move_tail(&obj_priv->list, &dev_priv 591 drm_i915_private_t *dev_priv = dev->dev_private; local 669 drm_i915_private_t *dev_priv = dev->dev_private; local 693 drm_i915_private_t *dev_priv = dev->dev_private; local 736 drm_i915_private_t *dev_priv = dev->dev_private; local 747 drm_i915_private_t *dev_priv = dev->dev_private; local 773 drm_i915_private_t *dev_priv = dev->dev_private; local 810 drm_i915_private_t *dev_priv = dev->dev_private; local 888 drm_i915_private_t *dev_priv = dev->dev_private; local 947 drm_i915_private_t *dev_priv = dev->dev_private; local 1118 drm_i915_private_t *dev_priv = dev->dev_private; local 1221 drm_i915_private_t *dev_priv = dev->dev_private; local 1904 drm_i915_private_t *dev_priv = dev->dev_private; local 1995 drm_i915_private_t *dev_priv = dev->dev_private; local 2260 drm_i915_private_t *dev_priv = dev->dev_private; local 2542 drm_i915_private_t *dev_priv = dev->dev_private; local 2642 drm_i915_private_t *dev_priv = dev->dev_private; local 2698 drm_i915_private_t *dev_priv = dev->dev_private; local 2721 drm_i915_private_t *dev_priv = dev->dev_private; local 2823 drm_i915_private_t *dev_priv = dev->dev_private; local 2842 drm_i915_private_t *dev_priv = dev->dev_private; local 2879 drm_i915_private_t *dev_priv = dev->dev_private; local 2895 drm_i915_private_t *dev_priv = dev->dev_private; local 2908 drm_i915_private_t *dev_priv = dev->dev_private; local [all...] |
H A D | i915_mem.c | 58 drm_i915_private_t *dev_priv = dev->dev_private; local 59 drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv; 67 shift = dev_priv->tex_lru_log_granularity; 278 struct mem_block **get_heap(drm_i915_private_t * dev_priv, int region) argument 282 return (&dev_priv->agp_heap); 294 drm_i915_private_t *dev_priv = dev->dev_private; local 298 if (!dev_priv) { 314 heap = get_heap(dev_priv, alloc.region); 343 drm_i915_private_t *dev_priv = dev->dev_private; local 347 if (!dev_priv) { 374 drm_i915_private_t *dev_priv = dev->dev_private; local 401 drm_i915_private_t *dev_priv = dev->dev_private; local [all...] |
H A D | radeon_mem.c | 228 get_heap(drm_radeon_private_t *dev_priv, int region) argument 232 return (&dev_priv->gart_heap); 234 return (&dev_priv->fb_heap); 245 drm_radeon_private_t *dev_priv = dev->dev_private; local 249 if (!dev_priv) { 271 heap = get_heap(dev_priv, alloc.region); 301 drm_radeon_private_t *dev_priv = dev->dev_private; local 305 if (!dev_priv) { 312 heap = get_heap(dev_priv, memfree.region); 332 drm_radeon_private_t *dev_priv local [all...] |
H A D | radeon_drv.h | 160 #define GET_RING_HEAD(dev_priv) \ 161 (dev_priv->writeback_works ? \ 162 DRM_READ32((dev_priv)->ring_rptr, 0) : \ 165 #define SET_RING_HEAD(dev_priv, val) \ 166 DRM_WRITE32((dev_priv)->ring_rptr, 0, (val)) 333 #define RADEON_CHECK_OFFSET(dev_priv, off) \ 334 (((off >= dev_priv->fb_location) && \ 335 (off <= (dev_priv->fb_location + dev_priv->fb_size - 1))) || \ 336 ((off >= dev_priv [all...] |
H A D | i915_gem_tiling.c | 98 drm_i915_private_t *dev_priv = dev->dev_private; local 187 dev_priv->mm.bit_6_swizzle_x = swizzle_x; 188 dev_priv->mm.bit_6_swizzle_y = swizzle_y; 272 drm_i915_private_t *dev_priv = dev->dev_private; local 300 args.swizzle_mode = dev_priv->mm.bit_6_swizzle_x; 302 args.swizzle_mode = dev_priv->mm.bit_6_swizzle_y; 347 drm_i915_private_t *dev_priv = dev->dev_private; local 368 args.swizzle_mode = dev_priv->mm.bit_6_swizzle_x; 371 args.swizzle_mode = dev_priv->mm.bit_6_swizzle_y;
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H A D | i915_drv.h | 572 #define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, (reg)) 573 #define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, (reg), (val)) 574 #define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, (reg)) 575 #define I915_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, (reg), (val)) 607 DRM_DEBUG("dev_priv->ring.virtual_start (%lx)\n", (dev_priv->ring.virtual_start)); \ 609 if (dev_priv->ring.space < (n)*4) \ 612 outring = dev_priv->ring.tail; \ 613 ringmask = dev_priv->ring.tail_mask; \ 614 virt = dev_priv [all...] |
/illumos-gate/usr/src/uts/common/inet/ |
H A D | inetddi.c | 110 static struct dev_priv { struct 137 ndevs = sizeof (netdev_privs) / sizeof (struct dev_priv);
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/illumos-gate/usr/src/uts/common/io/drm/ |
H A D | drmP.h | 274 dev_priv->sarea = map; \
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