Searched refs:GRCBASE_MISC (Results 1 - 5 of 5) sorted by relevance
| /illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
| H A D | grc_addr.h | 17 #define GRCBASE_MISC 0x00A000 macro
59 #define GRCBASE_MISC_AEU GRCBASE_MISC // just for driver init
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| /illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/ |
| H A D | lm_er.c | 189 REG_WR(pdev, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
192 REG_WR(pdev, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR,
195 REG_WR(pdev, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, reset_mask2);
197 REG_WR(pdev, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, reset_mask1);
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| H A D | lm_hw_init_reset.c | 632 REG_WR(pdev,(GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET),MISC_REGISTERS_RESET_REG_1_RST_RBCP);
746 REG_WR(pdev, GRCBASE_MISC+ MISC_REGISTERS_RESET_REG_1_CLEAR, reg_1_clear );
756 REG_WR(pdev, GRCBASE_MISC+ MISC_REGISTERS_RESET_REG_2_CLEAR, reg_2_clear);
762 REG_WR(pdev, GRCBASE_MISC+ MISC_REGISTERS_RESET_REG_1_SET, MISC_REGISTERS_RESET_REG_1_RST_NIG);
2564 REG_WR(pdev,GRCBASE_MISC+MISC_REGISTERS_RESET_REG_1_SET,reset_reg_1_val);
2566 REG_WR(pdev,GRCBASE_MISC+MISC_REGISTERS_RESET_REG_2_SET,reset_reg_2_val);
3856 REG_WR(pdev,GRCBASE_MISC+MISC_REGISTERS_RESET_REG_1_CLEAR,0x3);
3858 REG_WR(pdev,GRCBASE_MISC+MISC_REGISTERS_RESET_REG_1_SET,0x3);
3933 REG_WR(pdev,GRCBASE_MISC+MISC_REGISTERS_RESET_REG_1_CLEAR,0x03);
3935 REG_WR(pdev,GRCBASE_MISC
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| H A D | lm_mcp.c | 246 REG_WR(pdev, GRCBASE_MISC+ MISC_REGISTERS_RESET_REG_2_CLEAR,
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| /illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/ |
| H A D | bnxe_clc.c | 1674 REG_WR(cb, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
1677 REG_WR(cb, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET,
1750 REG_WR(cb, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
1754 REG_WR(cb, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET,
1865 REG_WR(cb, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
1869 REG_WR(cb, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET,
1895 REG_WR(cb, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
1899 REG_WR(cb, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET,
2015 REG_WR(cb, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
2165 REG_WR(cb, GRCBASE_MISC
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