/*
* This file defines GRC base address for every block.
* This file is included by chipsim, asm microcode and cpp microcode.
* These values are used in Design.xml on regBase attribute * Use the base with the generated offsets of specific registers.
*/
#
define GRCBASE_TSDM 0x042000 //Note: regBase is made to fit in 20 bits, for TsdmTB::GrcCmd test#
define GRCBASE_PXP 0x103000 // we have 2 pxp blocks now#
define GRCBASE_QM_4PORT 0x168000 // a dummy block for generating 4-port-specific QM init values#
define GRCBASE_TSEM 0x180000 // was previously GRCBASE_TSTORM#
define GRCBASE_CSEM 0x200000 // was previously GRCBASE_CSTORM#
define GRCBASE_XSEM 0x280000 // was previously GRCBASE_XSTORM#
define GRCBASE_XSEM_4PORT 0x280000 // a dummy block for generating 4-port-specific XSEM init values#
define GRCBASE_USEM 0x300000 // was previously GRCBASE_USTORM
#endif //_GRC_ADRR_H