d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * CDDL HEADER START
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * The contents of this file are subject to the terms of the
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Common Development and Distribution License (the "License").
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * You may not use this file except in compliance with the License.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * or http://www.opensolaris.org/os/licensing.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * See the License for the specific language governing permissions
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * and limitations under the License.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * When distributing Covered Code, include this CDDL HEADER in each
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * If applicable, add the following below this CDDL HEADER, with the
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * fields enclosed by brackets "[]" replaced with your own identifying
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * information: Portions Copyright [yyyy] [name of copyright owner]
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * CDDL HEADER END
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Copyright 2014 QLogic Corporation
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * The contents of this file are subject to the terms of the
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * QLogic End User License (the "License").
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * You may not use this file except in compliance with the License.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * You can obtain a copy of the License at
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * http://www.qlogic.com/Resources/Documents/DriverDownloadHelp/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * See the License for the specific language governing permissions
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * and limitations under the License.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Module Description:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This file encapsulates all the functions required to support error
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * recovery in E2. It is an isolated module that can be compiled in/out
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * according to error recovery support in upper layer
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This function should be called to acquire the leader lock. the leader
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * lock should not be released until recovery process id done.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * The leader lock is not waited for, its a non-blockinf function
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return lm_status_t SUCCESS or FAILURE
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_er_acquire_leader_lock(lm_device_t * pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi return lm_hw_lock(pdev, HW_LOCK_RESOURCE_RECOVERY_LEADER_0, FALSE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * release the lock acquired in the previous function
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return lm_status_t SUCCESS, INVALID_PARAM: if invalid input
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * is provided, LM_STATUS_OBJECT_NOT_FOUND if the lock
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * isn't taken.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_er_release_leader_lock(lm_device_t * pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi return lm_hw_unlock(pdev, HW_LOCK_RESOURCE_RECOVERY_LEADER_0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This function disables close the gate functionality
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * should be called from the last driver that unloads
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * (unless recovery is in progress)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchivoid lm_er_disable_close_the_gate(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMer, "Disabling \"close the gates\"\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = REG_RD(pdev, MISC_REG_AEU_GENERAL_MASK);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val &= ~(MISC_AEU_GENERAL_MASK_REG_AEU_PXP_CLOSE_MASK |
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi MISC_AEU_GENERAL_MASK_REG_AEU_NIG_CLOSE_MASK);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, MISC_REG_AEU_GENERAL_MASK, val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* Close gates #2, #3 and #4: */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_er_set_234_gates(lm_device_t *pdev, u8_t close_g8)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* close gate #4 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, PXP_REG_HST_DISCARD_DOORBELLS, enable_bit);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* close gate #2 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, PXP_REG_HST_DISCARD_INTERNAL_WRITES, enable_bit);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* close gate #3 (this will disable new interrupts */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = REG_RD(pdev, IGU_REG_BLOCK_CONFIGURATION);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi close_g8? RESET_FLAGS(val, IGU_BLOCK_CONFIGURATION_REG_BLOCK_ENABLE) :
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS(val, IGU_BLOCK_CONFIGURATION_REG_BLOCK_ENABLE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, IGU_REG_BLOCK_CONFIGURATION, val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "%s gates #2, #3 and #4\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_er_pxp_prep(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Reset the whole chip except for:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * - PCIE core
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * - PCI Glue, PSWHST, PXP/PXP2 RF (all controlled by
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * one reset bit)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * - MISC (including AEU)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * - RBCN, RBCP
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Reset MCP ONLY if reset_mcp is TRUE
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_er_process_kill_chip_reset(lm_device_t *pdev, u8_t reset_mcp)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t not_reset_mask1, reset_mask1, not_reset_mask2, reset_mask2;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE |
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi MISC_REGISTERS_RESET_REG_2_RST_EMAC1_HARD_CORE |
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_REG_HARD_CORE |
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi MISC_REGISTERS_RESET_REG_2_RST_MCP_N_HARD_CORE_RST_B;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi RESET_FLAGS(reset_mask2, MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_CMN_CPU);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi RESET_FLAGS(reset_mask2, MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_CMN_CORE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (CHIP_IS_E3(pdev)) /* Maybe some day... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi reset_mask2 |= MISC_REGISTERS_RESET_REG_2_MSTAT0;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi reset_mask2 |= MISC_REGISTERS_RESET_REG_2_MSTAT1;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* CQ54250, CQ54294, CQ54298, CQ54396
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Error Recovery: break at evbda!lm_dmae_command+960 during error recovery,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * REG_1 must be called after reg_2 so that QM is reset AFTER PXP, this is because
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * resetting QM cancels close the gates, initiates request to PXP
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * <Ofer Zipin>: theory when QM is reset before PXP: 'close the gates' is de-activated shortly before resetting PXP.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * PSWRQ sends a write request to PGLUE. Then PXP is reset (PGLUE is not reset).
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * PGLUE tries to read the payload data from PSWWR, but PSWWR does not respond. The write queue in PGLUE will be stuck.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Take blocks out of reset */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, reset_mask2);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, reset_mask1);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * 13.2 Poll for Tetris buffer to empty. PSWWR FIFOs are
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * not guaraneteed to empty. wait for all Glue tags to
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * become unused (all read completions have returned).
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return lm_status_t
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_er_empty_tetris_buffer(lm_device_t * pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_cnt = REG_RD(pdev, PXP2_REG_RD_BLK_CNT);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi port_is_idle_0 = REG_RD(pdev, PXP2_REG_RD_PORT_IS_IDLE_0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi port_is_idle_1 = REG_RD(pdev, PXP2_REG_RD_PORT_IS_IDLE_1);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pgl_exp_rom2 = REG_RD(pdev, PXP2_REG_PGL_EXP_ROM2);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pgl_b_reg_tags = REG_RD(pdev, PGLUE_B_REG_TAGS_63_32);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi && (!CHIP_IS_E3(pdev) || (pgl_b_reg_tags == 0xffffffff)))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi } while (cnt-- > 0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Tetris buffer didn't get empty or there are still outstanding read requests after 1s!\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "sr_cnt=0x%08x, blk_cnt=0x%08x, port_is_idle_0=0x%08x, port_is_idle_1=0x%08x, pgl_exp_rom2=0x%08x\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi sr_cnt, blk_cnt, port_is_idle_0, port_is_idle_1, pgl_exp_rom2);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * 13.5. Poll for IGU VQ to become empty
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return lm_status_t
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_er_poll_igu_vq(lm_device_t * pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pend_bits = REG_RD(pdev, IGU_REG_PENDING_BITS_STATUS);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi } while (cnt-- > 0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Still pending IGU requests pend_bits=%x!\n", pend_bits);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This section is based on E2 Recovery Flows Design
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * document by Yuval Eliyahu. Section 12.2 (process kill)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * item #13. Number below refer to items inside item #13.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Some modifications were made to accomidate to E2.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return lm_status_t
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_er_process_kill(lm_device_t *pdev, u8_t reset_mcp)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.2 Empty the Tetris buffer, wait for 1s TODO_ER: is this needed for E2? */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_er_empty_tetris_buffer(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.3, 13.4 Close gates #2, #3 and #4 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.5 Poll for IGU VQ to become empty */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.6 Indicate that "process kill" is in progress to MCP TODO_ER: how/why? */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.7 Clear "unprepared" bit */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.8 Wait for 1ms to empty GLUE and PCI-E core queues,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * PSWHST, GRC and PSWRD Tetris buffer.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Prepare to chip reset: */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.11.1 PXP preparations TODO_ER: should this really be called before or only after
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * spec says after, bnx2x implementation does this before as well. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.9 reset the chip */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.10 check that PSWRD, PSWRQ, PSWWR are reset : handled in function */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_er_process_kill_chip_reset(pdev, reset_mcp);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.11 Recover after reset: */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_reset_mcp_comp(pdev, magic_val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Reset the loader for no-mcp mode, mcp has been reset!! */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.11.1.2 PXP */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // PXP2 initialization skipped here to address CQ61863:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // - PXP2 must not be re-initialized.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // - Starting MCP 7.0.45, PXP2 is initialized by MCP.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi //lm_er_pxp_prep(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.11.2 Open the gates #2, #3 and #4 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 13.11.3 TODO_ER: IGU/AEU preparation bring back the AEU/IGU to a
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * reset state, re-enable attentions. This is done in "init" */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Clear the general attention used to notify second engine */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, MISC_REG_AEU_GENERAL_ATTN_20 , 0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Some Notes:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * 1. parity bits will be cleard for blocks that are being reset, so no need to take care of it...
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * 2. MCP notification isn't handled yet, when it is leader will need to nofity mcp reset is done.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Perform the error recovery leader process kill flow.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return lm_status_t SUCCESS or FAILURE
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_er_leader_reset(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Try to recover after the failure */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* need to recover on both paths using pretend */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi function_of_opposite_path = !PATH_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_er_process_kill(pdev, reset_mcp);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Pretend to the other path... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_pretend_func(pdev, function_of_opposite_path);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Only second go should reset MCP, so that the second engine doesn't get out of close-dg8 before the process is done */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* in anycase pretend back... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This function notifies the second engine that a
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * attention occured and error recovery will initiate on
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * second engine as well. Only the leader does this meaning
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * that the second engine either hasn't seen that there was
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * an error, or seen it and is waiting (won't initiate
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * leader reset) which means it won't see it anyway...
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return lm_status_t
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_er_notify_other_path(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "lm_er_notify_other_path\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Pretend to the other path... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi function_of_opposite_path = lm_er_get_first_func_of_opp_path(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_pretend_func(pdev, function_of_opposite_path);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, MISC_REG_AEU_GENERAL_ATTN_20 , 1);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* in anycase pretend back... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "No ebnabled functions on path%d, the pah is not notfied about ER\n",!PATH_ID(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This function attaches attentions to NIG / PXP
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * close-the-g8, any attention that is added here should
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * also be added to the lm_recoverable_error function.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchivoid lm_er_config_close_the_g8(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (!pdev->params.enable_error_recovery || CHIP_IS_E1x(pdev))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* HW Attentions (Except Parity which is configured by init-tool / reset-values ) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* QM Block */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = REG_RD(pdev, MISC_REG_AEU_ENABLE2_NIG_0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS(val, AEU_INPUTS_ATTN_BITS_QM_HW_INTERRUPT); /* QM HW Interrupt */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, MISC_REG_AEU_ENABLE2_NIG_0, val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = REG_RD(pdev, MISC_REG_AEU_ENABLE2_PXP_0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS(val, AEU_INPUTS_ATTN_BITS_QM_HW_INTERRUPT); /* QM HW Interrupt */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, MISC_REG_AEU_ENABLE2_PXP_0, val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* General Attention 20 (error recovery attention) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = REG_RD(pdev, MISC_REG_AEU_ENABLE4_NIG_0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS(val, AEU_INPUTS_ATTN_BITS_GRC_MAPPED_GENERAL_ATTN20); /* general attention 20 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, MISC_REG_AEU_ENABLE4_NIG_0, val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = REG_RD(pdev, MISC_REG_AEU_ENABLE4_PXP_0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS(val, AEU_INPUTS_ATTN_BITS_GRC_MAPPED_GENERAL_ATTN20); /* general attention 20 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, MISC_REG_AEU_ENABLE4_PXP_0, val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu32_t lm_er_get_func_bit(struct _lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu32_t lm_er_get_number_of_functions(u32_t er_register)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (i = 0; i < MAX_FUNC_NUM; i++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu8_t lm_er_get_first_func_of_opp_path(struct _lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_lock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG, TRUE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_unlock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (por_aux_register & (1 << (i*2 + opposite_path)))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu32_t lm_er_inc_load_cnt(lm_device_t *pdev, u8_t sync_it)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_lock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG, TRUE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_unlock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "HW Recovery bit was not cleared in previous session.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->debug_info.er_bit_is_set_already = TRUE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->debug_info.er_bit_from_previous_sessions++;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER, por_aux_register);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->debug_info.er_bit_is_set_already = FALSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_unlock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi counter = lm_er_get_number_of_functions(por_aux_register);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu32_t lm_er_dec_load_cnt(lm_device_t *pdev, u8_t sync_it)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_lock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG, TRUE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_unlock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "HW Recovery bit is clear already.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER, por_aux_register);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_unlock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi counter = lm_er_get_number_of_functions(por_aux_register);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu32_t lm_er_get_load_cnt(lm_device_t *pdev, u8_t sync_it)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_lock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG, TRUE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_unlock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi counter = lm_er_get_number_of_functions(por_aux_register);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchivoid lm_er_clear_load_cnt(lm_device_t *pdev, u8_t sync_it)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_lock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG, TRUE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER, 0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_unlock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchivoid lm_er_set_recover_done(lm_device_t *pdev, u8_t sync_it)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Setting recovery in progress = 0\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_lock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG, TRUE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi por_aux_register &= ~LM_ERROR_RECOVERY_IN_PROGRESS_FLAG;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER, por_aux_register);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_unlock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchivoid lm_er_set_recover_in_progress(lm_device_t *pdev, u8_t sync_it)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Setting recovery in progress = 1\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_lock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG, TRUE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi por_aux_register |= LM_ERROR_RECOVERY_IN_PROGRESS_FLAG;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER, por_aux_register);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_unlock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu8_t lm_er_recovery_in_progress(lm_device_t *pdev, u8_t sync_it)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_lock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG, TRUE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_hw_unlock(pdev, HW_LOCK_RESOURCE_RECOVERY_REG);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (por_aux_register & LM_ERROR_RECOVERY_IN_PROGRESS_FLAG)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");