Searched defs:txq (Results 1 - 24 of 24) sorted by relevance

/illumos-gate/usr/src/uts/intel/io/vmxnet3s/
H A Dvmxnet3_tx.c40 vmxnet3_txqueue_init(vmxnet3_softc_t *dp, vmxnet3_txqueue_t *txq) argument
49 vmxnet3_txqueue_fini(vmxnet3_softc_t *dp, vmxnet3_txqueue_t *txq) argument
55 for (i = 0; i < txq->cmdRing.size; i++) {
56 mblk_t *mp = txq->metaRing[i].mp;
157 vmxnet3_tx_one(vmxnet3_softc_t *dp, vmxnet3_txqueue_t *txq, argument
162 vmxnet3_cmdring_t *cmdRing = &txq->cmdRing;
163 Vmxnet3_TxQueueCtrl *txqCtrl = txq->sharedCtrl;
205 ASSERT(!txq->metaRing[eopIdx].mp);
285 txq->metaRing[sopIdx].mp = mp;
286 txq
325 vmxnet3_txqueue_t *txq = &dp->txQueue; local
427 vmxnet3_tx_complete(vmxnet3_softc_t *dp, vmxnet3_txqueue_t *txq) argument
[all...]
H A Dvmxnet3_main.c337 vmxnet3_txqueue_t *txq = &dp->txQueue; local
340 ASSERT(!(txq->cmdRing.size & VMXNET3_RING_SIZE_MASK));
341 ASSERT(!(txq->compRing.size & VMXNET3_RING_SIZE_MASK));
342 ASSERT(!txq->cmdRing.dma.buf && !txq->compRing.dma.buf);
344 if ((err = vmxnet3_alloc_cmdring(dp, &txq->cmdRing)) != 0) {
347 tqdesc->conf.txRingBasePA = txq->cmdRing.dma.bufPA;
348 tqdesc->conf.txRingSize = txq->cmdRing.size;
352 if ((err = vmxnet3_alloc_compring(dp, &txq->compRing)) != 0) {
355 tqdesc->conf.compRingBasePA = txq
433 vmxnet3_txqueue_t *txq = &dp->txQueue; local
[all...]
/illumos-gate/usr/src/uts/common/io/ath/
H A Dath_aux.c137 struct ath_txq *txq; local
174 txq = &asc->asc_txq[qnum];
175 txq->axq_qnum = qnum;
176 txq->axq_depth = 0;
177 txq->axq_intrcnt = 0;
178 txq->axq_link = NULL;
179 list_create(&txq->axq_list, sizeof (struct ath_buf),
181 mutex_init(&txq->axq_lock, NULL, MUTEX_DRIVER, NULL);
209 struct ath_txq *txq = &asc->asc_txq[i]; local
211 ATH_HAL_RELEASETXQUEUE(asc->asc_ah, txq
367 ath_drainq(ath_t *asc, struct ath_txq *txq) argument
399 struct ath_txq *txq; local
[all...]
H A Dath_main.c679 struct ath_txq *txq; local
788 txq = asc->asc_ac2q[WME_AC_VO];
800 txq = asc->asc_ac2q[WME_AC_VO];
811 txq = asc->asc_ac2q[WME_AC_BK];
878 if (++txq->axq_intrcnt >= ATH_TXINTR_PERIOD) {
880 txq->axq_intrcnt = 0;
905 txq->axq_qnum, rix, shortPreamble, *(uint16_t *)wh->i_dur));
930 mutex_enter(&txq->axq_lock);
931 list_insert_tail(&txq->axq_list, bf);
932 if (txq
1096 ath_tx_processq(ath_t *asc, struct ath_txq *txq) argument
1222 struct ath_txq *txq; local
2344 struct ath_txq *txq = &asc->asc_txq[i]; local
[all...]
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_send.c263 * txq lock is taken by the caller
268 IN lm_tx_chain_t *txq,
274 if (ERR_IF(CHK_NULL(pdev) || CHK_NULL(txq) || !buf_size)) {
279 coalesce_buf_cnt = s_list_entry_cnt(&txq->coalesce_buf_list);
283 &txq->coalesce_buf_list);
294 txq->coalesce_buf_used++;
298 s_list_push_tail(&txq->coalesce_buf_list, &coalesce_buf->link);
308 * returns coalesce_buf into txq list
310 * txq lock is taken by the caller
315 IN lm_tx_chain_t *txq,
266 lm_get_coalesce_buffer( IN lm_device_t *pdev, IN lm_tx_chain_t *txq, IN u32_t buf_size) argument
313 lm_put_coalesce_buffer( IN lm_device_t *pdev, IN lm_tx_chain_t *txq, IN lm_coalesce_buffer_t *coalesce_buf) argument
342 lm_copy_packet_to_coalesce_buffer( IN lm_device_t *pdev, IN lm_tx_chain_t *txq, IN lm_packet_t *lmpkt, IN lm_frag_list_t *frags, OUT lm_coalesce_buffer_t **coal_buf ) argument
[all...]
H A Dlm_resc.c143 * reset txq, rxq, rcq counters for L2 client connection
149 * allocate given num of coalesce buffers, and queue them in the txq chain.
158 lm_tx_chain_t *txq,
173 if(CHK_NULL(pdev) || CHK_NULL(txq))
209 &txq->coalesce_buf_list,
218 &txq->coalesce_buf_list);
225 &txq->coalesce_buf_list);
237 &txq->coalesce_buf_list);
601 DbgMessage(pdev, INFORMi, "txq %d, bd_chain %p, bd_left %d\n",
640 DbgBreakMsg("OOO doesn't have a txq");
156 lm_allocate_coalesce_buffers( lm_device_t *pdev, lm_tx_chain_t *txq, u32_t coalesce_buf_cnt, u32_t cid) argument
[all...]
/illumos-gate/usr/src/uts/common/io/cxgbe/t4nex/
H A Dt4_mac.c448 struct sge_txq *txq = &sc->sge.txq[pi->first_txq]; local
450 return (t4_eth_tx(pi, txq, m));
H A Dadapter.h268 /* txq: SGE egress queue + miscellaneous items */
272 struct port_info *port; /* the port this txq belongs to */
312 uint32_t qflush; /* # of SGE_EGR_UPDATE notifications for txq */
378 struct sge_txq *txq; /* NIC tx queues */ member in struct:sge
544 #define TXQ_LOCK(txq) EQ_LOCK(&(txq)->eq)
545 #define TXQ_UNLOCK(txq) EQ_UNLOCK(&(txq)->eq)
546 #define TXQ_LOCK_ASSERT_OWNED(txq) EQ_LOCK_ASSERT_OWNED(&(txq)
[all...]
H A Dt4_sge.c108 static int alloc_txq(struct port_info *pi, struct sge_txq *txq, int idx);
109 static int free_txq(struct port_info *pi, struct sge_txq *txq);
131 static int get_frame_txinfo(struct sge_txq *txq, mblk_t **fp,
133 static inline int fits_in_txb(struct sge_txq *txq, int len, int *waste);
134 static inline int copy_into_txb(struct sge_txq *txq, mblk_t *m, int len,
137 static inline int add_mblk(struct sge_txq *txq, struct txinfo *txinfo,
139 static void free_txinfo_resources(struct sge_txq *txq, struct txinfo *txinfo);
140 static int add_to_txpkts(struct sge_txq *txq, struct txpkts *txpkts, mblk_t *m,
142 static void write_txpkts_wr(struct sge_txq *txq, struct txpkts *txpkts);
143 static int write_txpkt_wr(struct port_info *pi, struct sge_txq *txq, mblk_
430 struct sge_txq *txq; local
573 struct sge_txq *txq; local
929 t4_eth_tx(struct port_info *pi, struct sge_txq *txq, mblk_t *frame) argument
1654 alloc_txq(struct port_info *pi, struct sge_txq *txq, int idx) argument
1701 free_txq(struct port_info *pi, struct sge_txq *txq) argument
2154 get_frame_txinfo(struct sge_txq *txq, mblk_t **fp, struct txinfo *txinfo, int sgl_only) argument
2263 fits_in_txb(struct sge_txq *txq, int len, int *waste) argument
2286 copy_into_txb(struct sge_txq *txq, mblk_t *m, int len, struct txinfo *txinfo) argument
2354 add_mblk(struct sge_txq *txq, struct txinfo *txinfo, mblk_t *m, int len) argument
2403 free_txinfo_resources(struct sge_txq *txq, struct txinfo *txinfo) argument
2440 add_to_txpkts(struct sge_txq *txq, struct txpkts *txpkts, mblk_t *m, struct txinfo *txinfo) argument
2516 write_txpkts_wr(struct sge_txq *txq, struct txpkts *txpkts) argument
2561 write_txpkt_wr(struct port_info *pi, struct sge_txq *txq, mblk_t *m, struct txinfo *txinfo) argument
2699 write_ulp_cpl_sgl(struct port_info *pi, struct sge_txq *txq, struct txpkts *txpkts, struct txinfo *txinfo) argument
2830 reclaim_tx_descs(struct sge_txq *txq, int howmany) argument
2903 write_txqflush_wr(struct sge_txq *txq) argument
3318 setup_txq_kstats(struct port_info *pi, struct sge_txq *txq, int idx) argument
3368 struct sge_txq *txq = ksp->ks_private; local
[all...]
/illumos-gate/usr/src/uts/common/io/ral/
H A Drt2560_var.h162 struct rt2560_tx_ring txq; member in struct:rt2560_softc
/illumos-gate/usr/src/uts/common/io/i40e/core/
H A Di40e_virtchnl.h221 struct i40e_virtchnl_txq_info txq; member in struct:i40e_virtchnl_queue_pair_info
/illumos-gate/usr/src/uts/common/io/rwd/
H A Drt2661_var.h114 struct rt2661_tx_ring txq[4]; member in struct:rt2661_softc
/illumos-gate/usr/src/uts/common/io/rwn/
H A Drt2860_var.h156 struct rt2860_tx_ring txq[6]; member in struct:rt2860_softc
/illumos-gate/usr/src/uts/common/io/sfxge/
H A Dsfxge_tx.c2509 SFXGE_CMN_ERR "txq[%d] stop with flush_pending=%d",
2514 SFXGE_CMN_ERR "txq[%d] flush failed", index);
2606 unsigned int txq, evq; local
2654 txq = 0;
2658 if (txq + tx_scale > EFX_ARRAY_SIZE(sp->s_stp)) {
2663 sp->s_tx_scale_base[qtype] = txq;
2666 if ((rc = sfxge_tx_qinit(sp, txq, qtype, evq)) != 0) {
2669 txq++;
2671 ASSERT3U(txq, <=, EFX_ARRAY_SIZE(sp->s_stp));
2755 unsigned int txq; local
[all...]
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/
H A Dhw_channel.h315 } txq; member in struct:vfpf_setup_q_tlv
H A Dvfpf_if.h234 } txq; member in struct:vf_pf_msg_setup_q
/illumos-gate/usr/src/uts/common/io/yge/
H A Dyge.c2418 int32_t txq; local
2422 txq = port->p_txq;
2561 CSR_WRITE_4(dev, Q_ADDR(txq, Q_CSR), BMU_CLR_RESET);
2562 CSR_WRITE_4(dev, Q_ADDR(txq, Q_CSR), BMU_OPER_INIT);
2563 CSR_WRITE_4(dev, Q_ADDR(txq, Q_CSR), BMU_FIFO_OP_ON);
2564 CSR_WRITE_2(dev, Q_ADDR(txq, Q_WM), MSK_BMU_TX_WM);
2570 CSR_WRITE_2(dev, Q_ADDR(txq, Q_AL), MSK_ECU_TXFF_LEV);
2579 CSR_WRITE_4(dev, Q_ADDR(txq, Q_F), F_TX_CHK_AUTO_OFF);
2637 uint32_t txq; local
2642 txq
2709 uint32_t txq = port->p_txq; local
[all...]
/illumos-gate/usr/src/uts/common/io/arn/
H A Darn_main.c1683 struct ath_txq *txq; local
1693 txq = &sc->sc_txq[i];
1694 mutex_enter(&txq->axq_lock);
1695 bf = list_head(&txq->axq_list);
1700 bf = list_next(&txq->axq_list, bf);
1702 mutex_exit(&txq->axq_lock);
2653 struct ath_txq *txq; local
2658 txq = &sc->sc_txq[arn_get_hal_qnum(ac, sc)];
2659 (void) ath9k_hw_get_txq_props(ah, txq->axq_qnum, &qi);
2696 txq
[all...]
H A Darn_xmit.c97 static void arn_tx_send_ht_normal(struct arn_softc *sc, struct ath_txq *txq,
101 static void arn_tx_txqaddbuf(struct arn_softc *sc, struct ath_txq *txq,
145 * NB: must be called with txq lock held
148 arn_tx_queue_tid(struct ath_txq *txq, struct ath_atx_tid *tid) argument
163 /* add node ac to txq atmost once */
168 list_insert_tail(&txq->axq_acq, &ac->list);
175 struct ath_txq *txq = &sc->sc_txq[tid->ac->qnum]; local
177 mutex_enter(&txq->axq_lock);
181 mutex_exit(&txq->axq_lock);
188 struct ath_txq *txq local
214 struct ath_txq *txq = &sc->sc_txq[tid->ac->qnum]; local
289 arn_tid_drain(struct arn_softc *sc, struct ath_txq *txq, struct ath_atx_tid *tid) argument
354 arn_tx_complete_aggr(struct arn_softc *sc, struct ath_txq *txq, struct ath_buf *bf, list_t *bf_q, int txok) argument
721 arn_tx_sched_aggr(struct arn_softc *sc, struct ath_txq *txq, struct ath_atx_tid *tid) argument
796 struct ath_txq *txq = &sc->sc_txq[txtid->ac->qnum]; local
887 arn_txq_drain_pending_buffers(struct arn_softc *sc, struct ath_txq *txq) argument
935 struct ath_txq *txq = NULL; local
1084 arn_tx_send_ht_normal(struct arn_softc *sc, struct ath_txq *txq, struct ath_atx_tid *tid, list_t *list) argument
1108 arn_tx_txqaddbuf(struct arn_softc *sc, struct ath_txq *txq, list_t *list) argument
1483 arn_tx_stopdma(struct arn_softc *sc, struct ath_txq *txq) argument
1591 struct ath_txq *txq = &sc->sc_txq[qnum]; local
1615 arn_tx_cleanupq(struct arn_softc *sc, struct ath_txq *txq) argument
1634 struct ath_txq *txq; local
1651 arn_tx_draintxq(struct arn_softc *sc, struct ath_txq *txq) argument
1864 struct ath_txq *txq; local
2185 arn_tx_processq(struct arn_softc *sc, struct ath_txq *txq) argument
2395 struct ath_txq *txq; local
[all...]
H A Darn_core.h525 struct ath_txq *txq; member in struct:ath_tx_control
557 void arn_tx_cleanupq(struct arn_softc *sc, struct ath_txq *txq);
560 void arn_tx_draintxq(struct arn_softc *sc, struct ath_txq *txq);
561 void arn_txq_schedule(struct arn_softc *sc, struct ath_txq *txq);
/illumos-gate/usr/src/uts/common/io/iwn/
H A Dif_iwnvar.h243 struct iwn_tx_ring txq[IWN5000_NTXQUEUES]; member in struct:iwn_softc
H A Dif_iwn.c931 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
935 iwn_free_tx_ring(sc, &sc->txq[i]);
1142 iwn_free_tx_ring(sc, &sc->txq[i]);
1444 iwn_free_tx_ring(sc, &sc->txq[qid]);
2757 struct iwn_tx_ring *txq; local
2762 txq = &sc->txq[le16toh(ba->qid)];
2924 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2957 struct iwn_tx_ring *ring = &sc->txq[IWN_CMD_QUEUE_NUM];
3212 struct iwn_tx_ring *ring = &sc->txq[qi
7349 struct iwn_tx_ring *txq = &sc->txq[qid]; local
[all...]
/illumos-gate/usr/src/uts/common/io/bnxe/
H A Dbnxe.h659 TxQueue txq[MAX_ETH_CONS]; member in struct:_um_device
933 #define BNXE_LOCK_ENTER_TX(pUM, idx) mutex_enter(&(pUM)->txq[(idx)].txMutex)
934 #define BNXE_LOCK_EXIT_TX(pUM, idx) mutex_exit(&(pUM)->txq[(idx)].txMutex)
935 #define BNXE_LOCK_ENTER_FREETX(pUM, idx) mutex_enter(&(pUM)->txq[(idx)].freeTxDescMutex)
936 #define BNXE_LOCK_EXIT_FREETX(pUM, idx) mutex_exit(&(pUM)->txq[(idx)].freeTxDescMutex)
/illumos-gate/usr/src/uts/common/io/cxgbe/common/
H A Dt4_hw.c4272 * @txq: the max number of egress queues
4289 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl,
4303 V_FW_PFVF_CMD_PMASK(pmask) | V_FW_PFVF_CMD_NEQ(txq));
4288 t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl, unsigned int rxqi, unsigned int rxq, unsigned int tc, unsigned int vi, unsigned int cmask, unsigned int pmask, unsigned int nexact, unsigned int rcaps, unsigned int wxcaps) argument

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