Searched defs:phy_data (Results 1 - 15 of 15) sorted by relevance

/illumos-gate/usr/src/uts/common/io/e1000g/
H A De1000g_workarounds.c201 u16 phy_data = 0; local
239 &phy_data);
246 if (phy_data & NWAY_ER_PAR_DETECT_FAULT) {
H A De1000g_rx.c156 uint16_t phy_data; local
334 (void) e1000_read_phy_reg(hw, PHY_REG(770, 26), &phy_data);
335 phy_data &= 0xfff8;
336 phy_data |= (1 << 2);
337 (void) e1000_write_phy_reg(hw, PHY_REG(770, 26), phy_data);
340 (void) e1000_read_phy_reg(hw, 22, &phy_data);
341 phy_data &= 0x0fff;
342 phy_data |= (1 << 14);
345 (void) e1000_write_phy_reg(hw, 22, phy_data);
/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_82540.c533 u16 phy_data; local
548 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
552 phy_data &= ~M88E1000_PHY_VCO_REG_BIT8;
553 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
563 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
567 phy_data |= M88E1000_PHY_VCO_REG_BIT11;
568 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
H A De1000_80003es2lan.c665 u16 phy_data; local
676 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
680 phy_data &= ~GG82563_PSCR_CROSSOVER_MODE_AUTO;
681 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, phy_data);
685 DEBUGOUT1("GG82563 PSCR: %X\n", phy_data);
687 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data);
691 e1000_phy_force_speed_duplex_setup(hw, &phy_data);
694 phy_data |= MII_CR_RESET;
696 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data);
727 &phy_data);
761 u16 phy_data, index; local
[all...]
H A De1000_82541.c675 u16 phy_data, phy_saved_data, speed, duplex, i; local
707 &phy_data);
711 phy_data &= ~IGP01E1000_PHY_EDAC_MU_INDEX;
715 phy_data);
729 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);
736 &phy_data);
740 idle_errs += (phy_data & SR_1000T_IDLE_ERROR_CNT);
781 &phy_data);
785 phy_data &= ~IGP01E1000_PHY_EDAC_MU_INDEX;
786 phy_data |
[all...]
H A De1000_82543.c1407 u16 phy_data; local
1423 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1428 if (phy_data & M88E1000_PSSR_DPLX)
1437 if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS)
1439 else if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_100MBS)
H A De1000_82575.c3078 u16 phy_data; local
3094 &phy_data);
3098 phy_data |= E1000_M88E1543_EEE_CTRL_1_MS;
3100 phy_data);
3112 &phy_data);
3117 phy_data |= E1000_EEE_ADV_100_SUPPORTED;
3119 phy_data &= ~E1000_EEE_ADV_100_SUPPORTED;
3122 phy_data |= E1000_EEE_ADV_1000_SUPPORTED;
3124 phy_data &= ~E1000_EEE_ADV_1000_SUPPORTED;
3128 phy_data);
3160 u16 phy_data; local
[all...]
H A De1000_phy.c1011 u16 phy_data; local
1014 ret_val = hw->phy.ops.read_reg(hw, PHY_1000T_CTRL, &phy_data);
1019 hw->phy.original_ms_type = (phy_data & CR_1000T_MS_ENABLE) ?
1020 ((phy_data & CR_1000T_MS_VALUE) ?
1026 phy_data |= (CR_1000T_MS_ENABLE | CR_1000T_MS_VALUE);
1029 phy_data |= CR_1000T_MS_ENABLE;
1030 phy_data &= ~(CR_1000T_MS_VALUE);
1033 phy_data &= ~CR_1000T_MS_ENABLE;
1039 return hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data);
1051 u16 phy_data; local
1116 u16 phy_data; local
1268 u16 phy_data; local
1744 u16 phy_data; local
1810 u16 phy_data; local
2164 u16 phy_data, offset, mask; local
2279 u16 phy_data, offset, mask; local
2410 u16 phy_data, index; local
2436 u16 phy_data, phy_data2, is_cm; local
2559 u16 phy_data, i, agc_value = 0; local
2629 u16 phy_data; local
3904 u16 phy_data; local
4016 u16 phy_data, length; local
[all...]
H A De1000_ich8lan.c2229 u16 phy_data; local
2237 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_SMB_ADDR, &phy_data);
2241 phy_data &= ~HV_SMB_ADDR_MASK;
2242 phy_data |= (strap >> E1000_STRAP_SMBUS_ADDRESS_SHIFT);
2243 phy_data |= HV_SMB_ADDR_PEC_EN | HV_SMB_ADDR_VALID;
2248 phy_data &= ~HV_SMB_ADDR_FREQ_MASK;
2249 phy_data |= (freq & (1 << 0)) <<
2251 phy_data |= (freq & (1 << 1)) <<
2258 return e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, phy_data);
2621 u16 phy_data; local
6061 u16 phy_data; local
[all...]
/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Ddavicom.c214 u16 phy_data;
245 for (phy_data=0, i=0; i<16; i++) {
246 phy_data<<=1;
247 phy_data|=phy_read_1bit(io_dcr9);
250 return phy_data;
256 static void phy_write(int location, u16 phy_data)
291 phy_write_1bit(io_dcr9, phy_data&i ? PHY_DATA_1: PHY_DATA_0);
297 static void phy_write_1bit(u32 ee_addr, u32 phy_data)
300 outl(phy_data, ee_addr); /* MII Clock Low */
302 outl(phy_data|MDCLK
211 u16 phy_data; local
253 phy_write(int location, u16 phy_data) argument
294 phy_write_1bit(u32 ee_addr, u32 phy_data) argument
310 int phy_data; local
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H A De1000.c110 static int e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data);
111 static int e1000_read_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data);
112 static int e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data);
113 static int e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data);
1546 uint16_t phy_data; local
1601 &phy_data)))
1607 phy_data &= ~(IGP01E1000_PSCR_AUTO_MDIX |
1613 phy_data &= ~IGP01E1000_PSCR_AUTO_MDIX;
1617 phy_data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX;
1620 phy_data |
2063 uint16_t phy_data; local
2408 uint16_t phy_data; local
2643 uint16_t phy_data; local
2813 e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data) argument
2835 e1000_read_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data) argument
2916 e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data) argument
2938 e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data) argument
3052 uint16_t phy_data; local
[all...]
/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_phy.c600 * @phy_data: Pointer to read data from PHY register
603 u16 *phy_data)
669 *phy_data = (u16)(data);
679 * @phy_data: Pointer to read data from PHY register
682 u32 device_type, u16 *phy_data)
691 phy_data);
706 * @phy_data: Data to write to the PHY register
709 u32 device_type, u16 phy_data)
714 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);
780 * @phy_data
602 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u16 *phy_data) argument
681 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u16 *phy_data) argument
708 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u16 phy_data) argument
782 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u16 phy_data) argument
1037 u16 phy_data = 0; local
1196 u16 phy_data = 0; local
2707 u16 phy_data = 0; local
[all...]
H A Dixgbe_api.c526 * @phy_data: Pointer to read data from PHY register
531 u16 *phy_data)
537 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
544 * @phy_data: Data to write to the PHY register
549 u16 phy_data)
555 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1215 * @phy_data: Pointer to read data from PHY register
1220 u32 device_type, u32 *phy_data)
1223 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1231 * @phy_data
530 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u16 *phy_data) argument
548 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u16 phy_data) argument
1219 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u32 *phy_data) argument
1235 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u32 phy_data) argument
[all...]
H A Dixgbe_x550.c358 u32 device_type, u16 *phy_data)
360 UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, *phy_data);
365 u32 device_type, u16 phy_data)
367 UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, phy_data);
856 * @phy_data: Pointer to read data from the register
3105 u16 phy_data; local
3114 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, &phy_data);
3115 phy_data |= IXGBE_X557_LED_MANUAL_SET_MASK;
3117 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, phy_data);
3129 u16 phy_data; local
357 ixgbe_read_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u16 *phy_data) argument
364 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u16 phy_data) argument
[all...]
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_mac.c2882 uint16_t phy_data = 0; local
2892 phy_data = ((address + 1) << NLP2020_XCVR_I2C_ADDR_SH) | reg;
2894 phy_dev, phy_reg, phy_data) != NXGE_OK)
2906 &phy_data);
2907 *data = (phy_data >> 8);

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