Searched defs:control (Results 1 - 25 of 86) sorted by relevance

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/illumos-gate/usr/src/cmd/refer/
H A Drefer2.c40 int control(char);
63 if (control(line[0]))
218 control(char c) function
/illumos-gate/usr/src/cmd/cmd-inet/usr.lib/in.ripngd/
H A Dmain.c40 char *control; variable
197 control = (char *)malloc(IPV6_MAX_PACKET);
198 if (control == NULL) {
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_txc.c302 txc_control_t control; local
310 (void) npi_txc_control(handle, OP_GET, &control);
313 NXGE_DEBUG_MSG((nxgep, TX_CTL, "\n\tTXC port control 0x%0llx",
314 (long long)control.value));
H A Dnxge_hio_guest.c606 nxge_dma_common_t *control; local
663 * Initialize logical page 1 for control buffers.
665 control = nxge->tx_cntl_pool_p->dma_buf_pool_p[channel];
666 ring->hv_tx_cntl_base_ioaddr_pp = (uint64_t)control->orig_ioaddr_pp;
667 ring->hv_tx_cntl_ioaddr_size = (uint64_t)control->orig_alength;
725 nxge_dma_common_t *control; local
781 * Initialize logical page 1 for control buffers.
783 control = nxge->rx_cntl_pool_p->dma_buf_pool_p[channel];
784 ring->hv_rx_cntl_base_ioaddr_pp = (uint64_t)control->orig_ioaddr_pp;
785 ring->hv_rx_cntl_ioaddr_size = (uint64_t)control
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H A Dnxge_intr.c687 nxge_ldgv_t *control; local
739 control = nxge->ldgvp;
740 if (control->ldgp) {
741 KMEM_FREE(control->ldgp,
743 control->ldgp = 0;
746 if (control->ldvp) {
747 KMEM_FREE(control->ldvp,
749 control->ldvp = 0;
752 KMEM_FREE(control, sizeof (nxge_ldgv_t));
909 nxge_ldgv_t *control; local
[all...]
/illumos-gate/usr/src/lib/pam_modules/authtok_check/
H A Drules.c363 Mangle(char *input, char *control) argument
373 for (ptr = control; *ptr; ptr++) {
677 * PMatch(register char *control, register char *string)
679 * while (*string && *control) {
680 * if (!MatchClass(*control, *string)) {
685 * control++;
688 * if (*string || *control) {
/illumos-gate/usr/src/uts/common/inet/sockmods/
H A Dsocksctpsubr.c278 sosctp_find_cmsg(const uchar_t *control, socklen_t clen, int type) argument
283 cmsg = (struct cmsghdr *)control;
284 cend = (char *)control + clen;
360 socklen_t namelen, const uchar_t *control, socklen_t controllen, int fflag,
432 cmsg = sosctp_find_cmsg(control, controllen, SCTP_INIT);
359 sosctp_assoc_createconn(struct sctp_sonode *ss, const struct sockaddr *name, socklen_t namelen, const uchar_t *control, socklen_t controllen, int fflag, struct cred *cr, struct sctp_soassoc **ssap) argument
/illumos-gate/usr/src/uts/common/io/hxge/
H A Dhpi_txdma.c88 hpi_txdma_channel_control(hpi_handle_t handle, txdma_cs_cntl_t control, argument
102 switch (control) {
160 " Invalid Input: control <0x%x>", control));
197 " Invalid Input: control <0x%x>", op_mode));
/illumos-gate/usr/src/uts/common/io/nge/
H A Dnge_xmii.c207 uint16_t control; local
211 control = nge_mii_get16(ngep, MII_CONTROL);
212 control &= ~(MII_CONTROL_PWRDN | MII_CONTROL_ISOLATE);
213 nge_mii_put16(ngep, MII_CONTROL, control);
216 control = nge_mii_get16(ngep, MII_CONTROL);
217 if (BIC(control, MII_CONTROL_PWRDN))
232 uint16_t control; local
242 control = nge_mii_get16(ngep, MII_CONTROL);
243 control |= MII_CONTROL_RESET;
244 nge_mii_put16(ngep, MII_CONTROL, control);
316 uint16_t control; local
[all...]
/illumos-gate/usr/src/uts/sun4u/io/i2c/clients/
H A Dpcf8591.c235 uchar_t control, reg; local
287 control = ((0 << PCF8591_ANALOG_OUTPUT_SHIFT) |
292 i2c_tran_pointer->i2c_wbuf[0] = control;
346 control = ((1 << PCF8591_ANALOG_OUTPUT_SHIFT) |
351 i2c_tran_pointer->i2c_wbuf[0] = control;
H A Dssc050.c321 uchar_t control; local
430 &control, I2C_SLEEP);
435 D1CMN_ERR((CE_NOTE, "%s: port %d: control = %x", unitp->name,
436 port, control));
438 if (!(control & SSC050_FAN_CONTROL_ENABLE)) {
465 divisor = control & SSC050_FAN_CONTROL_DIVISOR;
/illumos-gate/usr/src/uts/intel/io/pciex/hotplug/
H A Dpciehpc_acpi.c82 * if native hotplug control was granted or not by BIOS.
84 * If _OSC method fails for any reason or if native hotplug control was
118 * Intialize hot plug control for ACPI mode.
222 * Otherwise, there are no ACPI interfaces to do LED control or to get
313 uint16_t status, control; local
350 control = pciehpc_reg_get16(ctrl_p,
354 if (!(control & PCIE_SLOTCTL_PWR_CONTROL)) {
/illumos-gate/usr/src/uts/common/io/cxgbe/t4nex/
H A Doffload.h124 int (*control)(void *handle, enum cxgb4_control control, ...); member in struct:uld_info
/illumos-gate/usr/src/uts/common/sys/scsi/adapters/pmcs/
H A Datapi7v3.h55 uint8_t control; member in struct:__anon8939
/illumos-gate/usr/src/uts/intel/io/dnet/
H A Ddnet_mii.c209 phydata->control = MII_CONTROL_ANE;
296 ushort_t control; local
300 /* Strobe the reset bit in the control register */
302 phyd->control | MII_CONTROL_RESET);
308 * control register once, the devices we have seen can have already
313 control = mac->mii_read(mac->mii_dip, phy, MII_CONTROL);
314 if (!(control & MII_CONTROL_RESET))
324 control = mac->mii_read(mac->mii_dip, phy, MII_CONTROL);
325 if (!(control & MII_CONTROL_RESET))
345 * the control o
[all...]
/illumos-gate/usr/src/uts/common/smbsrv/
H A Dsmb_privilege.h164 uint32_t control; member in struct:smb_privset
/illumos-gate/usr/src/boot/sys/boot/common/
H A Disapnp.h176 Offset 2: Memory control
177 Bit[1] specifies 8/16-bit control. This bit is set to indicate
265 int control; /* Memory Control Register */ member in struct:pnp_cinfo::__anon124
/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Ddavicom.c110 control:10; /* control bits */ member in struct:txdesc
119 control:10; /* control bits */ member in struct:rxdesc
445 txd[i].control = 0x184; /* Begin/End/Chain */
465 rxd[i].control = 0x4; /* Chain Structure */
511 txd[TxPtr].control = 0x024; /* SF/CE */
565 txd[TxPtr].control = 0x00000184; /* LS+FS+CE */
/illumos-gate/usr/src/cmd/bart/
H A Dcompare.c31 static int compare_manifests(FILE *rulesfile, char *control, char *test,
102 compare_manifests(FILE *rulesfile, char *control, char *test, argument
116 control_fd = fopen(control, "r");
118 perror(control);
129 BUF_SIZE, 0, &control_line, control);
139 control);
163 control);
184 control);
200 BUF_SIZE, control_pos, &control_line, control);
507 (void) printf(" %s control
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/illumos-gate/usr/src/cmd/troff/
H A Dn1.c303 control(getrq(), 1);
647 control(a, b) function
680 fdprintf(stderr, "control: macro %c%c, contab[%d]\n",
/illumos-gate/usr/src/uts/common/inet/
H A Doptcom.c1939 process_auxiliary_options(conn_t *connp, void *control, t_uscalar_t controllen, argument
1952 for (cmsg = (struct cmsghdr *)control;
1953 CMSG_VALID(cmsg, control, (uintptr_t)control + controllen);
/illumos-gate/usr/src/uts/common/io/bge/
H A Dbge_mii.c234 uint16_t control; local
255 control = bge_mii_get16(bgep, MII_CONTROL);
256 if (BIC(control, MII_CONTROL_RESET))
263 BGE_DEBUG(("bge_phy_reset: FAILED, control now 0x%x", control));
487 /* Blocks the PHY control access */
505 /* Remove block phy control */
710 /* Enable MAC control of LPI */
919 uint16_t control; local
939 control
[all...]
/illumos-gate/usr/src/lib/storage/libg_fc/common/hdrs/
H A Dg_scsi.h175 unsigned char control; member in struct:my_cdb_g0
/illumos-gate/usr/src/uts/common/io/pciex/hotplug/
H A Dpciehpc.c82 static void pciehpc_issue_hpc_command(pcie_hp_ctrl_t *ctrl_p, uint16_t control);
269 uint16_t status, control; local
332 control = pciehpc_reg_get16(ctrl_p,
335 if (control & PCIE_SLOTCTL_PWR_FAULT_EN) {
340 PCIE_SLOTCTL, control & ~PCIE_SLOTCTL_PWR_FAULT_EN);
389 control = pciehpc_reg_get16(ctrl_p,
392 if (control & PCIE_SLOTCTL_PWR_FAULT_EN)
395 control & ~PCIE_SLOTCTL_PWR_FAULT_EN);
506 uint16_t control, status; local
510 control
1047 uint16_t status, control; local
1203 uint16_t status, control; local
1888 pciehpc_issue_hpc_command(pcie_hp_ctrl_t *ctrl_p, uint16_t control) argument
2109 uint16_t control, state; local
2149 uint16_t control; local
2274 uint16_t control; local
[all...]
/illumos-gate/usr/src/uts/common/io/usb/hcd/openhci/
H A Dohci_polled.c1486 uint32_t control; local
1496 control = Get_OpReg(hcr_control) & ~(HCR_CONTROL_CLE |
1499 Set_OpReg(hcr_control, (control | mask));
1972 /* Update the dummy with control information */

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