678453a8ed49104d8adad58f3ba591bdc39883e8speer * CDDL HEADER START
678453a8ed49104d8adad58f3ba591bdc39883e8speer * The contents of this file are subject to the terms of the
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Common Development and Distribution License (the "License").
678453a8ed49104d8adad58f3ba591bdc39883e8speer * You may not use this file except in compliance with the License.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
678453a8ed49104d8adad58f3ba591bdc39883e8speer * See the License for the specific language governing permissions
678453a8ed49104d8adad58f3ba591bdc39883e8speer * and limitations under the License.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * When distributing Covered Code, include this CDDL HEADER in each
678453a8ed49104d8adad58f3ba591bdc39883e8speer * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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678453a8ed49104d8adad58f3ba591bdc39883e8speer * fields enclosed by brackets "[]" replaced with your own identifying
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678453a8ed49104d8adad58f3ba591bdc39883e8speer * CDDL HEADER END
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Use is subject to license terms.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * This file manages the interrupts for a hybrid I/O (hio) device.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * In the future, it may manage interrupts for all Neptune-based
678453a8ed49104d8adad58f3ba591bdc39883e8speer * External prototypes
678453a8ed49104d8adad58f3ba591bdc39883e8speer/* The following function may be found in nxge_[t|r]xdma.c */
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Local prototypes
678453a8ed49104d8adad58f3ba591bdc39883e8speerstatic int nxge_intr_vec_find(nxge_t *, vpc_type_t, int);
678453a8ed49104d8adad58f3ba591bdc39883e8speer * nxge_intr_add
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Add <channel>'s interrupt.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Arguments:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * type Tx or Rx
678453a8ed49104d8adad58f3ba591bdc39883e8speer * channel The channel whose interrupt we want to add.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Add here means: add a handler, enable, & arm the interrupt.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Service domain
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_intr_t *interrupts; /* The global interrupt data. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_ldg_t *group; /* The logical device group data. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer uint_t *inthandler; /* A parameter to ddi_intr_add_handler */
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((vector = nxge_intr_vec_find(nxge, type, channel)) == -1) {
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_intr_add(%cDC %d): vector not found", c, channel));
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((status2 = ddi_intr_add_handler(interrupts->htable[vector],
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_ERROR_MSG((nxge, NXGE_ERR_CTL, "nxge_intr_add(%cDC %d): "
678453a8ed49104d8adad58f3ba591bdc39883e8speer "ddi_intr_add_handler(%d) returned %s",
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Enable the interrupt. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((status2 = ddi_intr_enable(interrupts->htable[vector]))
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_ERROR_MSG((nxge, NXGE_ERR_CTL, "nxge_intr_add(%cDC %d): "
678453a8ed49104d8adad58f3ba591bdc39883e8speer "ddi_intr_enable(%d) returned %s",
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Finally, arm the interrupt. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer * nxge_intr_remove
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Remove <channel>'s interrupt.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Arguments:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * type Tx or Rx
678453a8ed49104d8adad58f3ba591bdc39883e8speer * channel The channel whose interrupt we want to remove.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Remove here means: disarm, disable, & remove the handler.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Service domain
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_intr_t *interrupts; /* The global interrupt data. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_ldg_t *group; /* The logical device group data. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "==> nxge_intr_remove"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((vector = nxge_intr_vec_find(nxge, type, channel)) == -1) {
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_intr_remove(%cDC %d): vector not found", c, channel));
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Disarm the interrupt. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer group->arm = B_TRUE; /* HIOXXX There IS a better way */
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Disable the interrupt. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((status2 = ddi_intr_disable(interrupts->htable[vector]))
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_ERROR_MSG((nxge, NXGE_ERR_CTL, "nxge_intr_remove(%cDC %d)"
678453a8ed49104d8adad58f3ba591bdc39883e8speer ": ddi_intr_disable(%d) returned %s",
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Remove the interrupt handler. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((status2 = ddi_intr_remove_handler(interrupts->htable[vector]))
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_ERROR_MSG((nxge, NXGE_ERR_CTL, "nxge_intr_remove(%cDC %d)"
678453a8ed49104d8adad58f3ba591bdc39883e8speer ": ddi_intr_remove_handler(%d) returned %s",
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "<== nxge_intr_remove"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer * nxge_intr_vec_find
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Find the interrupt vector associated with <channel>.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Arguments:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * type Tx or Rx
678453a8ed49104d8adad58f3ba591bdc39883e8speer * channel The channel whose vector we want to find.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Service domain
678453a8ed49104d8adad58f3ba591bdc39883e8speer "==> nxge_intr_vec_find(%cDC %d)",
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_vec_find(%cDC %d): ldgvp == 0",
678453a8ed49104d8adad58f3ba591bdc39883e8speer return (-1);
678453a8ed49104d8adad58f3ba591bdc39883e8speer return (-1);
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "<== nxge_intr_vec_find"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer * ---------------------------------------------------------------------
678453a8ed49104d8adad58f3ba591bdc39883e8speer * HIO-specific interrupt functions.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * ---------------------------------------------------------------------
678453a8ed49104d8adad58f3ba591bdc39883e8speer * nxge_hio_intr_add
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Add <channel>'s interrupt.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Arguments:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * type Tx or Rx
678453a8ed49104d8adad58f3ba591bdc39883e8speer * channel The channel whose interrupt we want to remove.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Guest domain
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_hio_dc_t *dc; /* The relevant DMA channel data structure. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_intr_t *interrupts; /* The global interrupt data. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_ldg_t *group; /* The logical device group data. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer uint_t *inthandler; /* A parameter to ddi_intr_add_handler */
678453a8ed49104d8adad58f3ba591bdc39883e8speer int ddi_status; /* The response to ddi_intr_add_handler */
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_add(%cDC %d): ldgvp == 0", c, channel));
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((dc = nxge_grp_dc_find(nxge, type, channel)) == 0) {
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_add: find(%s, %d) failed", c, channel));
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* 'nxge_intr_type' is a bad name for this data structure. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Set <vector> here to make the following code easier to read. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((ddi_status = ddi_intr_add_handler(interrupts->htable[vector],
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_add(%cDC %d): "
678453a8ed49104d8adad58f3ba591bdc39883e8speer "ddi_intr_add_handler(%d) returned %s",
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Enable the interrupt. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((ddi_status = ddi_intr_enable(interrupts->htable[vector]))
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_add(%cDC %d): "
678453a8ed49104d8adad58f3ba591bdc39883e8speer "ddi_intr_enable(%d) returned %s",
e759c33a51f9bc8c2bbf4f37e5ea7e7de77d8edcMichael Speer * Note: RDC interrupts will be armed in nxge_m_start(). This
e759c33a51f9bc8c2bbf4f37e5ea7e7de77d8edcMichael Speer * prevents us from getting an interrupt before we are ready
e759c33a51f9bc8c2bbf4f37e5ea7e7de77d8edcMichael Speer * to process packets.
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "<== nxge_hio_intr_add"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer * nxge_hio_intr_remove
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Remove <channel>'s interrupt.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Arguments:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * type Tx or Rx
678453a8ed49104d8adad58f3ba591bdc39883e8speer * channel The channel whose interrupt we want to remove.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Guest domain
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_hio_dc_t *dc; /* The relevant DMA channel data structure. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_intr_t *interrupts; /* The global interrupt data. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_ldg_t *group; /* The logical device group data. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_remove(%cDC %d): ldgvp == 0", c, channel));
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((dc = nxge_grp_dc_find(nxge, type, channel)) == 0) {
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_remove(%cDC %d): DC FIND failed",
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_remove(%cDC %d): interrupting == FALSE",
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* 'nxge_intr_type' is a bad name for this data structure. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Set <vector> here to make the following code easier to read. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Disarm the interrupt. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer group->arm = B_TRUE; /* HIOXXX There IS a better way */
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Disable the interrupt. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((status2 = ddi_intr_disable(interrupts->htable[vector]))
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_remove(%cDC %d): "
678453a8ed49104d8adad58f3ba591bdc39883e8speer "ddi_intr_disable(%d) returned %s",
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Remove the interrupt handler. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((status2 = ddi_intr_remove_handler(interrupts->htable[vector]))
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_remove(%cDC %d): "
678453a8ed49104d8adad58f3ba591bdc39883e8speer "ddi_intr_remove_handle(%d) returned %s",
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "<== nxge_hio_intr_remove"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer * nxge_hio_intr_init
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Initialize interrupts in a guest domain.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Arguments:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Guest domain
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_hw_pt_cfg_t *hardware = &nxge->pt_config.hw_config;
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "==> nxge_hio_intr_init"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Look up the "interrupts" property. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((ddi_prop_lookup_int_array(DDI_DEV_T_ANY, nxge->dip, 0,
678453a8ed49104d8adad58f3ba591bdc39883e8speer "interrupts", &prop_val, &prop_len)) != DDI_PROP_SUCCESS) {
678453a8ed49104d8adad58f3ba591bdc39883e8speer "==> nxge_hio_intr_init(obp): no 'interrupts' property"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer * For each device assigned, the content of each interrupts
678453a8ed49104d8adad58f3ba591bdc39883e8speer * property is its logical device group.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Assignment of interrupts property is in the the following
678453a8ed49104d8adad58f3ba591bdc39883e8speer * two receive channels
678453a8ed49104d8adad58f3ba591bdc39883e8speer * two transmit channels
678453a8ed49104d8adad58f3ba591bdc39883e8speer for (i = 0; i < prop_len; i++) {
678453a8ed49104d8adad58f3ba591bdc39883e8speer "==> nxge_hio_intr_init(obp): F%d: interrupt #%d, ldg %d",
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* ----------------------------------------------------- */
678453a8ed49104d8adad58f3ba591bdc39883e8speer "ddi_intr_get_supported_types() returned 0x%x, "
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_ERROR_MSG((nxge, HIO_CTL, "ddi_intr_get_supported_types() "
678453a8ed49104d8adad58f3ba591bdc39883e8speer "returned 0x%x, types = 0x%x", ddi_status, interrupts->intr_types));
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* HIOXXX hack */
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* HIOXXX hack */
678453a8ed49104d8adad58f3ba591bdc39883e8speer ddi_status = ddi_intr_get_navail(nxge->dip, intr_type, &navail);
678453a8ed49104d8adad58f3ba591bdc39883e8speer "ddi_intr_get_navail() returned %s, navail: %d",
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_init: number of available interrupts: %d", navail));
678453a8ed49104d8adad58f3ba591bdc39883e8speer ddi_status = ddi_intr_get_nintrs(nxge->dip, intr_type, &nintrs);
678453a8ed49104d8adad58f3ba591bdc39883e8speer "ddi_intr_get_nintrs() returned %s, nintrs: %d",
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_init: number of interrupts: %d", nintrs));
678453a8ed49104d8adad58f3ba591bdc39883e8speer interrupts->intr_size = navail * sizeof (ddi_intr_handle_t);
678453a8ed49104d8adad58f3ba591bdc39883e8speer interrupts->htable = kmem_alloc(interrupts->intr_size, KM_SLEEP);
678453a8ed49104d8adad58f3ba591bdc39883e8speer * When <behavior> is set to DDI_INTR_ALLOC_STRICT,
678453a8ed49104d8adad58f3ba591bdc39883e8speer * ddi_intr_alloc() succeeds if and only if <navail>
678453a8ed49104d8adad58f3ba591bdc39883e8speer * interrupts are are allocated. Otherwise, it fails.
678453a8ed49104d8adad58f3ba591bdc39883e8speer ddi_status = ddi_intr_alloc(nxge->dip, interrupts->htable, intr_type,
678453a8ed49104d8adad58f3ba591bdc39883e8speer "ddi_intr_alloc() returned 0x%x%, "
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_init: number of interrupts allocated: %d", nactual));
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* <ninterrupts> is a dead variable: we may as well use it. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* FOI: Get the interrupt priority. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((ddi_status = ddi_intr_get_pri(interrupts->htable[0],
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_init: interrupt priority: %d", interrupts->pri));
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* FOI: Get our interrupt capability flags. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer if ((ddi_status = ddi_intr_get_cap(interrupts->htable[0],
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nxge_hio_intr_init: interrupt capabilities: %d",
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "<== nxge_hio_intr_init"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer * nxge_hio_intr_uninit
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Uninitialize interrupts in a guest domain.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Arguments:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Guest domain
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "==> nxge_hio_intr_uninit"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* ----------------------------------------------------- */
678453a8ed49104d8adad58f3ba591bdc39883e8speer * If necessary, disable any currently active interrupts.
678453a8ed49104d8adad58f3ba591bdc39883e8speer group = set->group[0]; /* Assumption: only one group! */
678453a8ed49104d8adad58f3ba591bdc39883e8speer for (channel = 0; channel < NXGE_MAX_TDCS; channel++) {
678453a8ed49104d8adad58f3ba591bdc39883e8speer group = set->group[0]; /* Assumption: only one group! */
678453a8ed49104d8adad58f3ba591bdc39883e8speer for (channel = 0; channel < NXGE_MAX_RDCS; channel++) {
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Free all of our allocated interrupts.
48056c53c7a3d65cab2626a67418401d97b58c1aMichael Speer KMEM_FREE(interrupts->htable, interrupts->intr_size);
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "<== nxge_hio_intr_uninit"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer * nxge_hio_tdsv_add
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Add a transmit device interrupt.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Arguments:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * dc The TDC whose interrupt we're adding
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Guest domain
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_hio_data_t *nhd = (nxge_hio_data_t *)nxge->nxge_hw_p->hio;
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_hw_pt_cfg_t *hardware = &nxge->pt_config.hw_config;
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nx_hio_tdsv_add: tx->getinfo absent"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Get the dma channel information.
678453a8ed49104d8adad58f3ba591bdc39883e8speer hv_rv = (*tx->getinfo)(dc->cookie, dc->page, &dc->ldg.index,
678453a8ed49104d8adad58f3ba591bdc39883e8speer if (hv_rv != 0) {
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nx_hio_tdsv_add: VRgroup = %d, LDSV = %d",
678453a8ed49104d8adad58f3ba591bdc39883e8speer * In version 1.0 of the hybrid I/O driver, there
678453a8ed49104d8adad58f3ba591bdc39883e8speer * are eight interrupt vectors per VR.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Vectors 0 - 3 are reserved for RDCs.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Vectors 4 - 7 are reserved for TDCs.
678453a8ed49104d8adad58f3ba591bdc39883e8speer dc->ldg.vector = (dc->ldg.ldsv % 2) + HIO_INTR_BLOCK_SIZE;
678453a8ed49104d8adad58f3ba591bdc39883e8speer // Version 1.0 hack only!
678453a8ed49104d8adad58f3ba591bdc39883e8speer return (0);
678453a8ed49104d8adad58f3ba591bdc39883e8speer * nxge_hio_rdsv_add
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Add a transmit device interrupt.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Arguments:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * dc The RDC whose interrupt we're adding
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Guest domain
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_hio_data_t *nhd = (nxge_hio_data_t *)nxge->nxge_hw_p->hio;
678453a8ed49104d8adad58f3ba591bdc39883e8speer nxge_hw_pt_cfg_t *hardware = &nxge->pt_config.hw_config;
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nx_hio_tdsv_add: rx->getinfo absent"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Get DMA channel information.
678453a8ed49104d8adad58f3ba591bdc39883e8speer hv_rv = (*rx->getinfo)(dc->cookie, dc->page, &dc->ldg.index,
678453a8ed49104d8adad58f3ba591bdc39883e8speer if (hv_rv != 0) {
678453a8ed49104d8adad58f3ba591bdc39883e8speer "nx_hio_rdsv_add: VRgroup = %d, LDSV = %d",
678453a8ed49104d8adad58f3ba591bdc39883e8speer * In version 1.0 of the hybrid I/O driver, there
678453a8ed49104d8adad58f3ba591bdc39883e8speer * are eight interrupt vectors per VR.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Vectors 0 - 3 are reserved for RDCs.
678453a8ed49104d8adad58f3ba591bdc39883e8speer // Version 1.0 hack only!
678453a8ed49104d8adad58f3ba591bdc39883e8speer return (0);
678453a8ed49104d8adad58f3ba591bdc39883e8speer * nxge_hio_ldsv_add
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Add a transmit or receive interrupt.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Arguments:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * dc The DMA channel whose interrupt we're adding
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Guest domains can only add interrupts for DMA channels.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * They cannot access the MAC, MIF, or SYSERR interrupts.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Guest domain
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyernxge_hio_ldsv_add(nxge_t *nxge, nxge_hio_dc_t *dc)
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "==> nxge_hio_ldsv_add(TDC %d)",
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "==> nxge_hio_ldsv_add(RDC %d)",
678453a8ed49104d8adad58f3ba591bdc39883e8speer control = KMEM_ZALLOC(sizeof (nxge_ldgv_t), KM_SLEEP);
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Initialize the logical device group data structure first.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * <hw_config.ldg> is a copy of the "interrupts" property.
678453a8ed49104d8adad58f3ba591bdc39883e8speer group->ldg = nxge->pt_config.hw_config.ldg[dc->ldg.vector];
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Since <vldg_index> is a dead variable, I'm reusing
678453a8ed49104d8adad58f3ba591bdc39883e8speer * it in Hybrid I/O to calculate the offset into the
678453a8ed49104d8adad58f3ba591bdc39883e8speer * virtual PIO_LDSV space.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * <intdata> appears to be a dead variable.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Though it is not used anywhere in the driver,
678453a8ed49104d8adad58f3ba591bdc39883e8speer * we'll set it anyway.
678453a8ed49104d8adad58f3ba591bdc39883e8speer group->intdata = SID_DATA(group->func, group->vector);
678453a8ed49104d8adad58f3ba591bdc39883e8speer group->sys_intr_handler = nxge_intr; /* HIOXXX Does this work? */
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Initialize the logical device state vector next.
678453a8ed49104d8adad58f3ba591bdc39883e8speer device->use_timer = B_FALSE; /* Set to B_TRUE for syserr only. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer * This code seems to imply a strict 1-to-1 correspondence.
678453a8ed49104d8adad58f3ba591bdc39883e8speer NXGE_DEBUG_MSG((nxge, HIO_CTL, "<== nxge_hio_ldsv_add"));
678453a8ed49104d8adad58f3ba591bdc39883e8speer return (0);
678453a8ed49104d8adad58f3ba591bdc39883e8speer * nxge_hio_ldsv_im
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Manage a VLDG's interrupts.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Arguments:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * group The VLDG to manage
678453a8ed49104d8adad58f3ba591bdc39883e8speer * There are 8 sets of 4 64-bit registers per VR, 1 per LDG.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * That sums to 256 bytes of virtual PIO_LDSV space.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * VLDG0 starts at offset 0,
678453a8ed49104d8adad58f3ba591bdc39883e8speer * VLDG1 starts at offset 32, etc.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Each set consists of 4 registers:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Logical Device State Vector 0. LDSV0
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Logical Device State Vector 1. LDSV1
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Logical Device State Vector 2. LDSV2
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Logical Device Group Interrupt Management. LDGIMGN
678453a8ed49104d8adad58f3ba591bdc39883e8speer * The first three (LDSVx) are read-only. The 4th register is the
678453a8ed49104d8adad58f3ba591bdc39883e8speer * LDGIMGN, the LDG Interrupt Management register, which is used to
678453a8ed49104d8adad58f3ba591bdc39883e8speer * arm the LDG, or set its timer.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * The offset to write to is calculated as follows:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * 0x2000 + (VLDG << 4) + offset, where:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * VDLG is the virtual group, i.e., index of the LDG.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * offset is the offset (alignment 8) of the register
678453a8ed49104d8adad58f3ba591bdc39883e8speer * to read or write.
678453a8ed49104d8adad58f3ba591bdc39883e8speer * So, for example, if we wanted to arm the first TDC of VRx, we would
678453a8ed49104d8adad58f3ba591bdc39883e8speer * calculate the address as:
678453a8ed49104d8adad58f3ba591bdc39883e8speer * 0x2000 + (0 << 4) + 0x18 = 0x18
678453a8ed49104d8adad58f3ba591bdc39883e8speer * Guest domain
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Read any register in the PIO_LDSV space. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer offset += group->vldg_index << VLDG_SLL; /* bits 7:5 */
678453a8ed49104d8adad58f3ba591bdc39883e8speer offset += (op * sizeof (uint64_t)); /* 0, 8, 16, 24 */
678453a8ed49104d8adad58f3ba591bdc39883e8speer /* Write the PIO_LDGIMGN register. */
678453a8ed49104d8adad58f3ba591bdc39883e8speer offset += group->vldg_index << VLDG_SLL; /* bits 7:5 */