Lines Matching defs:control
209 phydata->control = MII_CONTROL_ANE;
296 ushort_t control;
300 /* Strobe the reset bit in the control register */
302 phyd->control | MII_CONTROL_RESET);
308 * control register once, the devices we have seen can have already
313 control = mac->mii_read(mac->mii_dip, phy, MII_CONTROL);
314 if (!(control & MII_CONTROL_RESET))
324 control = mac->mii_read(mac->mii_dip, phy, MII_CONTROL);
325 if (!(control & MII_CONTROL_RESET))
345 * the control of the mii interface. Should this happen, the driver is
386 mac->mii_write(mac->mii_dip, phy, MII_CONTROL, phyd->control);
454 phyd->control |= MII_CONTROL_ANE;
455 mac->mii_write(mac->mii_dip, phy, MII_CONTROL, phyd->control);
492 if (!(phyd->control & MII_CONTROL_ANE)) {
495 * wrote to the control registerfrom control register
498 *speed = phyd->control & MII_CONTROL_100MB ? 100:10;
499 *fulld = phyd->control & MII_CONTROL_FDUPLEX ? 1:0;
526 phyd->control &= ~MII_CONTROL_ANE;
529 phyd->control |= MII_CONTROL_100MB;
531 phyd->control &= ~MII_CONTROL_100MB;
537 phyd->control |= MII_CONTROL_FDUPLEX;
539 phyd->control &= ~MII_CONTROL_FDUPLEX;
541 mac->mii_write(mac->mii_dip, phy, MII_CONTROL, phyd->control);
558 phyd->control |= MII_CONTROL_ISOLATE;
559 mac->mii_write(mac->mii_dip, phy, MII_CONTROL, phyd->control);
574 phyd->control &= ~MII_CONTROL_ISOLATE;
575 mac->mii_write(mac->mii_dip, phy, MII_CONTROL, phyd->control);
599 phyd->control |= MII_CONTROL_ANE;
600 mac->mii_write(dip, phy, MII_CONTROL, phyd->control|MII_CONTROL_RSAN);