io/hxge/hpi_txdma.c

3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs/*
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * CDDL HEADER START
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs *
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * The contents of this file are subject to the terms of the
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * Common Development and Distribution License (the "License").
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * You may not use this file except in compliance with the License.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs *
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * or http://www.opensolaris.org/os/licensing.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * See the License for the specific language governing permissions
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * and limitations under the License.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs *
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * When distributing Covered Code, include this CDDL HEADER in each
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * If applicable, add the following below this CDDL HEADER, with the
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * fields enclosed by brackets "[]" replaced with your own identifying
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * information: Portions Copyright [yyyy] [name of copyright owner]
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs *
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * CDDL HEADER END
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs/*
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * Use is subject to license terms.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs#pragma ident   "%Z%%M% %I% %E% SMI"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs#include <hpi_txdma.h>
fe930412c257f961ae67039de3b164b83717976aqs#include <hxge_impl.h>
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs#define TXDMA_WAIT_LOOP     10000
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs#define TXDMA_WAIT_MSEC     5
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qsstatic hpi_status_t hpi_txdma_control_reset_wait(hpi_handle_t handle,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    uint8_t channel);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_log_page_handle_set(hpi_handle_t handle, uint8_t channel,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_page_handle_t *hdl_p)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int status = HPI_SUCCESS;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (!TXDMA_CHANNEL_VALID(channel)) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_log_page_handle_set"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " Invalid Input: channel <0x%x>", channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_CHANNEL_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    TXDMA_REG_WRITE64(handle, TDC_PAGE_HANDLE, channel, hdl_p->value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (status);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_channel_reset(hpi_handle_t handle, uint8_t channel)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        " hpi_txdma_channel_reset" " RESETTING", channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (hpi_txdma_channel_control(handle, TXDMA_RESET, channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_channel_init_enable(hpi_handle_t handle, uint8_t channel)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (hpi_txdma_channel_control(handle, TXDMA_INIT_START, channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_channel_enable(hpi_handle_t handle, uint8_t channel)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (hpi_txdma_channel_control(handle, TXDMA_START, channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_channel_disable(hpi_handle_t handle, uint8_t channel)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (hpi_txdma_channel_control(handle, TXDMA_STOP, channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_channel_mbox_enable(hpi_handle_t handle, uint8_t channel)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (hpi_txdma_channel_control(handle, TXDMA_MBOX_ENABLE, channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_channel_control(hpi_handle_t handle, txdma_cs_cntl_t control,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    uint8_t channel)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int     status = HPI_SUCCESS;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_stat_t  cs;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_tdr_cfg_t   cfg;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (!TXDMA_CHANNEL_VALID(channel)) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_channel_control"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " Invalid Input: channel <0x%x>", channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_CHANNEL_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    switch (control) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case TXDMA_INIT_RESET:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        cfg.value = 0;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        cfg.bits.reset = 1;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (hpi_txdma_control_reset_wait(handle, channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case TXDMA_INIT_START:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        cfg.value = 0;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        cfg.bits.enable = 1;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case TXDMA_RESET:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        /*
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs         * Sets reset bit only (Hardware will reset all the RW bits but
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs         * leave the RO bits alone.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs         */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        cfg.value = 0;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        cfg.bits.reset = 1;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (hpi_txdma_control_reset_wait(handle, channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case TXDMA_START:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        /* Enable the DMA channel */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        cfg.bits.enable = 1;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case TXDMA_STOP:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        /* Disable the DMA channel */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        cfg.bits.enable = 0;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        status = hpi_txdma_control_stop_wait(handle, channel);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        if (status) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs                "Cannot stop channel %d (TXC hung!)", channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case TXDMA_MBOX_ENABLE:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        /*
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs         * Write 1 to MB bit to enable mailbox update (cleared to 0 by
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs         * hardware after update).
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs         */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_STAT, channel, &cs.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        cs.bits.mb = 1;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_STAT, channel, cs.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    default:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        status = (HPI_FAILURE | HPI_TXDMA_OPCODE_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_channel_control"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " Invalid Input: control <0x%x>", control));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (status);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_control_status(hpi_handle_t handle, io_op_t op_mode, uint8_t channel,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_stat_t *cs_p)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int     status = HPI_SUCCESS;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_stat_t  txcs;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (!TXDMA_CHANNEL_VALID(channel)) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_control_status"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " Invalid Input: channel <0x%x>", channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_CHANNEL_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    switch (op_mode) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case OP_GET:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_STAT, channel, &cs_p->value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case OP_SET:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_STAT, channel, cs_p->value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case OP_UPDATE:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_STAT, channel, &txcs.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_STAT, channel,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            cs_p->value | txcs.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    default:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_control_status"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " Invalid Input: control <0x%x>", op_mode));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_OPCODE_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (status);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_event_mask(hpi_handle_t handle, io_op_t op_mode, uint8_t channel,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_int_mask_t *mask_p)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int     status = HPI_SUCCESS;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_int_mask_t  mask;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (!TXDMA_CHANNEL_VALID(channel)) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_event_mask Invalid Input: channel <0x%x>",
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_CHANNEL_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    switch (op_mode) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case OP_GET:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_INT_MASK, channel, &mask_p->value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case OP_SET:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_INT_MASK, channel, mask_p->value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case OP_UPDATE:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_INT_MASK, channel, &mask.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_INT_MASK, channel,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            mask_p->value | mask.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    default:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_event_mask Invalid Input: eventmask <0x%x>",
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            op_mode));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_OPCODE_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (status);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_ring_config(hpi_handle_t handle, io_op_t op_mode,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    uint8_t channel, uint64_t *reg_data)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int status = HPI_SUCCESS;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (!TXDMA_CHANNEL_VALID(channel)) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_ring_config"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " Invalid Input: channel <0x%x>", channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_CHANNEL_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    switch (op_mode) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case OP_GET:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, reg_data);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case OP_SET:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, *reg_data);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    default:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_ring_config"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " Invalid Input: ring_config <0x%x>", op_mode));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_OPCODE_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (status);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_mbox_config(hpi_handle_t handle, io_op_t op_mode,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    uint8_t channel, uint64_t *mbox_addr)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int     status = HPI_SUCCESS;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_mbh_t   mh;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_mbl_t   ml;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (!TXDMA_CHANNEL_VALID(channel)) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_mbox_config Invalid Input: channel <0x%x>",
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_CHANNEL_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    mh.value = ml.value = 0;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    switch (op_mode) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case OP_GET:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_MBH, channel, &mh.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_MBL, channel, &ml.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        *mbox_addr = ml.value;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        *mbox_addr |= (mh.value << TDC_MBH_ADDR_SHIFT);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    case OP_SET:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        ml.bits.mbaddr = ((*mbox_addr & TDC_MBL_MASK) >> TDC_MBL_SHIFT);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_MBL, channel, ml.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        mh.bits.mbaddr = ((*mbox_addr >> TDC_MBH_ADDR_SHIFT) &
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            TDC_MBH_MASK);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_WRITE64(handle, TDC_MBH, channel, mh.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        break;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    default:
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_mbox_config Invalid Input: mbox <0x%x>",
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            op_mode));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_OPCODE_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (status);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs/*
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * This function is called to set up a transmit descriptor entry.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_desc_gather_set(hpi_handle_t handle, p_tx_desc_t desc_p,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    uint8_t gather_index, boolean_t mark, uint8_t ngathers,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    uint64_t dma_ioaddr, uint32_t transfer_len)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int status;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    status = HPI_TXDMA_GATHER_INDEX(gather_index);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (status) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_desc_gather_set"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " Invalid Input: gather_index <0x%x>", gather_index));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (status);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (transfer_len > TX_MAX_TRANSFER_LENGTH) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_desc_gather_set"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " Invalid Input: tr_len <0x%x>", transfer_len));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_XFER_LEN_INVALID);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (gather_index == 0) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        desc_p->bits.sop = 1;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        desc_p->bits.mark = mark;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        desc_p->bits.num_ptr = ngathers;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            "hpi_txdma_gather_set: SOP len %d (%d)",
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            desc_p->bits.tr_len, transfer_len));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    desc_p->bits.tr_len = transfer_len;
fe930412c257f961ae67039de3b164b83717976aqs    desc_p->bits.sad = dma_ioaddr >> 32;
fe930412c257f961ae67039de3b164b83717976aqs    desc_p->bits.sad_l = dma_ioaddr & 0xffffffff;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        "hpi_txdma_gather_set: xfer len %d to set (%d)",
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        desc_p->bits.tr_len, transfer_len));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    HXGE_MEM_PIO_WRITE64(handle, desc_p->value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (status);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_desc_set_zero(hpi_handle_t handle, uint16_t entries)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    uint32_t    offset;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int     i;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    /*
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs     * Assume no wrapped around.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs     */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    offset = 0;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    for (i = 0; i < entries; i++) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HXGE_REG_WR64(handle, offset, 0);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        offset += (i * (sizeof (tx_desc_t)));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (HPI_SUCCESS);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs/*
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * This function is called to get the transmit ring head index.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_ring_head_get(hpi_handle_t handle, uint8_t channel,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_tdr_head_t *hdl_p)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int status = HPI_SUCCESS;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (!TXDMA_CHANNEL_VALID(channel)) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " hpi_txdma_ring_head_get"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            " Invalid Input: channel <0x%x>", channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_CHANNEL_INVALID(channel));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    TXDMA_REG_READ64(handle, TDC_TDR_HEAD, channel, &hdl_p->value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (status);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs/*
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * Dumps the contents of transmit descriptors.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs/*ARGSUSED*/
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qsvoid
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_dump_desc_one(hpi_handle_t handle, p_tx_desc_t desc_p, int desc_index)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tx_desc_t desc, *desp;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs#ifdef HXGE_DEBUG
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    uint64_t sad;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int xfer_len;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs#endif
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        "\n==> hpi_txdma_dump_desc_one: dump "
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        " desc_p $%p descriptor entry %d\n", desc_p, desc_index));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    desc.value = 0;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    desp = ((desc_p != NULL) ? desc_p : (p_tx_desc_t)&desc);
fe930412c257f961ae67039de3b164b83717976aqs    HXGE_MEM_PIO_READ64(handle, &desp->value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs#ifdef HXGE_DEBUG
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    sad = desp->bits.sad;
fe930412c257f961ae67039de3b164b83717976aqs    sad = (sad << 32) | desp->bits.sad_l;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    xfer_len = desp->bits.tr_len;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs#endif
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL, "\n\t: value 0x%llx\n"
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        "\t\tsad $%p\ttr_len %d len %d\tnptrs %d\tmark %d sop %d\n",
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        desp->value, sad, desp->bits.tr_len, xfer_len,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        desp->bits.num_ptr, desp->bits.mark, desp->bits.sop));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        "\n<== hpi_txdma_dump_desc_one: Done \n"));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs/*
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs * Static functions start here.
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qsstatic hpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_control_reset_wait(hpi_handle_t handle, uint8_t channel)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_tdr_cfg_t txcs;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int loop = 0;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    txcs.value = 0;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    do {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HXGE_DELAY(TXDMA_WAIT_MSEC);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &txcs.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        /*
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs         * Reset completes when this bit is set to 1 by hw
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs         */
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        if (txcs.bits.qst) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            return (HPI_SUCCESS);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        loop++;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    } while (loop < TXDMA_WAIT_LOOP);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (loop == TXDMA_WAIT_LOOP) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            "hpi_txdma_control_reset_wait: RST bit not "
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            "cleared to 0 txcs.bits 0x%llx", txcs.value));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_RESET_FAILED);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (HPI_SUCCESS);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
fe930412c257f961ae67039de3b164b83717976aqshpi_status_t
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qshpi_txdma_control_stop_wait(hpi_handle_t handle, uint8_t channel)
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs{
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    tdc_tdr_cfg_t   txcs;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    int     loop = 0;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    do {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        txcs.value = 0;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HXGE_DELAY(TXDMA_WAIT_MSEC);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &txcs.value);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        if (txcs.bits.qst) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            return (HPI_SUCCESS);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        loop++;
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    } while (loop < TXDMA_WAIT_LOOP);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    if (loop == TXDMA_WAIT_LOOP) {
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            "hpi_txdma_control_stop_wait: SNG_STATE not "
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs            "set to 1 txcs.bits 0x%llx", txcs.value));
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs        return (HPI_FAILURE | HPI_TXDMA_STOP_FAILED);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    }
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs    return (HPI_SUCCESS);
3dec9fcdd56adf1b4a563137b4915c8f2d83b881qs}