/illumos-gate/usr/src/lib/fm/topo/modules/sun4u/chip/ |
H A D | chip_sun4u.c | 49 * system. For each chip found, the necessary nodes (one or more cores, and 59 #define CHIP_NODE_NAME "chip" 61 typedef struct chip { struct 73 { "chip", FM_FMRI_SCHEME_HC, CHIP_VERSION, &chip_ops }; 78 chip_t *chip; local 82 topo_mod_dprintf(mod, "initializing chip enumerator\n"); 84 if ((chip = topo_mod_zalloc(mod, sizeof (chip_t))) == NULL) 87 if ((chip->chip_kc = kstat_open()) == NULL) { 90 topo_mod_free(mod, chip, sizeof (chip_t)); 94 chip 119 chip_t *chip; local 134 cpu_kstat_init(chip_t *chip, int i) argument 177 cpu_create(topo_mod_t *mod, tnode_t *rnode, const char *name, topo_instance_t min, topo_instance_t max, chip_t *chip) argument 271 chip_t *chip = (chip_t *)arg; local [all...] |
/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/qlc/ |
H A D | ql_hba_fru.c | 236 uint16_t chip = ha->device_id; local 336 switch (chip & 0xFF00) { 416 switch (chip & 0xFF00) { 436 "%x", chip); 438 FCHBA_MODEL_DESCRIPTION_LEN, "%x", chip); 465 "%x", chip); 467 FCHBA_MODEL_DESCRIPTION_LEN, "%x", chip);
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/illumos-gate/usr/src/uts/intel/ia32/os/ |
H A D | cpc_subr.c | 95 * If this chip now has more than 1 active cpu, we must invalidate all 238 pg_cmt_t *chip; local 246 * Only one CPU per chip may be online. 257 while ((chip = group_iterate(chips, &i)) != NULL) { 258 if (GROUP_SIZE(&chip->cmt_cpus_actv) > 1) {
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/illumos-gate/usr/src/uts/intel/io/intel_nhm/ |
H A D | dimm_topo.c | 253 inhm_create_nvl(int chip) argument 263 inhm_dimmlist(chip, nvl); 265 nvlist_free(inhm_mc_nvl[chip]); 266 inhm_mc_nvl[chip] = nvl;
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H A D | intel_nhmdrv.c | 117 int chip; local 124 chip = getminor(dev) % MAX_CPU_NODES; 125 if (inhm_mc_nvl[chip] == NULL || 131 if (inhm_mc_nvl[chip]) 133 inhm_create_nvl(chip); 139 mcs.mcs_size = (uint32_t)inhm_mc_snapshotsz[chip]; 147 if (ddi_copyout(inhm_mc_snapshot[chip], (void *)arg, 148 inhm_mc_snapshotsz[chip], mode) < 0)
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/illumos-gate/usr/src/lib/fm/topo/modules/i86pc/chip/ |
H A D | chip_label.c | 169 * dimms_per_chip: the number of DIMM slots per chip 177 tnode_t *chip; local 212 chip = topo_node_parent(topo_node_parent(node)); 216 (void) snprintf(buf, BUFSZ, fmtstr, topo_node_instance(chip), 220 (void) snprintf(buf, BUFSZ, fmtstr, topo_node_instance(chip), 221 (((topo_node_instance(chip) + 1) * dimms_per_chip) 243 * are 4 DIMM slots per chip. It takes the following two arguments: 266 tnode_t *chip; local 292 chip = topo_node_parent(topo_node_parent(node)); 297 + (topo_node_instance(chip) * 671 tnode_t *chip, *chan; local 718 tnode_t *chip; local 792 tnode_t *chip; local [all...] |
H A D | chip.c | 52 #include "chip.h" 59 * system. For each chip found, the necessary nodes (one or more cores, and 113 topo_mod_dprintf(mod, "initializing chip enumerator\n"); 346 * Inherit FRU from the chip node, for native, we use hc 459 tnode_t *chip; local 495 ": enumerating x86pi & chip topology, but" 509 if ((chip = topo_node_lookup(pnode, CHIP_NODE_NAME, chipid)) == NULL) { 510 if ((chip = create_node(mod, pnode, auth, CHIP_NODE_NAME, 518 if (topo_method_register(mod, chip, chip_methods) < 0) 523 (void) topo_pgroup_create(chip, [all...] |
/illumos-gate/usr/src/lib/fm/topo/modules/sun4v/chip/ |
H A D | chip_sun4v.c | 46 * system. For each chip found, the necessary nodes (one or more cores, and 52 #define CHIP_NODE_NAME "chip" 64 { "chip", FM_FMRI_SCHEME_HC, CHIP_VERSION, &chip_ops }; 77 md_info_t *chip; local 81 topo_mod_dprintf(mod, "initializing chip enumerator\n"); 83 if ((chip = topo_mod_zalloc(mod, sizeof (md_info_t))) == NULL) 86 if (cpu_mdesc_init(mod, chip) != 0) { 88 topo_mod_free(mod, chip, sizeof (md_info_t)); 92 topo_mod_setspecific(mod, (void *)chip); 97 cpu_mdesc_fini(mod, chip); 110 md_info_t *chip; local 233 cpu_create(topo_mod_t *mod, tnode_t *rnode, const char *name, md_info_t *chip, uint64_t serial) argument 343 chip_create(topo_mod_t *mod, tnode_t *rnode, const char *name, topo_instance_t min, topo_instance_t max, md_info_t *chip) argument 416 md_info_t *chip = (md_info_t *)arg; local [all...] |
/illumos-gate/usr/src/lib/fm/topo/modules/sun4v/platform-cpu/ |
H A D | cpu.c | 121 md_info_t *chip; local 128 if ((chip = topo_mod_zalloc(mod, sizeof (md_info_t))) == NULL) 131 if (cpu_mdesc_init(mod, chip) != 0) { 133 topo_mod_free(mod, chip, sizeof (md_info_t)); 137 topo_mod_setspecific(mod, (void *)chip); 142 cpu_mdesc_fini(mod, chip); 143 topo_mod_free(mod, chip, sizeof (md_info_t)); 155 md_info_t *chip; local 157 chip = (md_info_t *)topo_mod_getspecific(mod); 159 cpu_mdesc_fini(mod, chip); 177 md_info_t *chip = (md_info_t *)topo_mod_getspecific(mod); local 222 md_info_t *chip = (md_info_t *)topo_mod_getspecific(mod); local 269 md_info_t *chip = (md_info_t *)topo_mod_getspecific(mod); local 340 md_info_t *chip = (md_info_t *)topo_mod_getspecific(mod); local 441 cpu_create(topo_mod_t *mod, tnode_t *rnode, const char *name, md_info_t *chip) argument [all...] |
H A D | cpu_mdesc.c | 47 cpu_find_proc(md_info_t *chip, uint32_t procid) { argument 52 for (i = 0, procp = chip->procs; i < chip->nprocs; i++, procp++) { 62 cpu_find_cpumap(md_info_t *chip, uint32_t cpuid) { argument 66 for (i = 0, mcmp = chip->cpus; i < chip->ncpus; i++, mcmp++) { 75 cpu_get_serialid_mdesc(md_info_t *chip, uint32_t cpuid, uint64_t *serialidp) argument 78 if ((mcmp = cpu_find_cpumap(chip, cpuid)) != NULL) { 86 cpu_n1_mdesc_init(topo_mod_t *mod, md_t *mdp, md_info_t *chip) argument 96 chip 158 cpu_n2_mdesc_init(topo_mod_t *mod, md_t *mdp, md_info_t *chip) argument 344 cpu_mdesc_init(topo_mod_t *mod, md_info_t *chip) argument 398 cpu_mdesc_fini(topo_mod_t *mod, md_info_t *chip) argument [all...] |
/illumos-gate/usr/src/uts/common/io/chxge/ |
H A D | oschtoe.h | 148 * Can change chip revision support 154 uint32_t chip; member in struct:pe_config_data
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/illumos-gate/usr/src/cmd/fm/modules/sun4v/generic-mem/ |
H A D | gmem_dimm.c | 490 gmem_find_dimm_chip(nvlist_t *nvl, uint32_t *chip) argument 498 *chip = ULONG_MAX; 506 if (strcmp(name, "chip") == 0) { 507 *chip = (uint32_t)strtoul(id, &end, 10);
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/illumos-gate/usr/src/cmd/psrinfo/ |
H A D | psrinfo.c | 51 * cpu id, core id, or chip id. We generalize this with simple node. 60 * A physical chip. A chip can contain multiple cores and virtual cpus. 228 struct pchip *chip; local 235 chip = l1->l_ptr; 237 if ((nspec != 0) && (chip->p_doit == 0)) 240 vcpu = chip->p_vcpus->l_ptr; 247 if ((chip->p_ncore == 1) || (chip->p_ncore == chip 443 struct pchip *chip; local [all...] |
/illumos-gate/usr/src/uts/common/io/urf/ |
H A D | urf_usbgem.c | 109 struct chip_info *chip; member in struct:urf_dev 777 * Check if the chip is supported. 781 * Check the chip if it is really realtek rtl8150 861 lp->chip = NULL;
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/illumos-gate/usr/src/lib/fm/topo/modules/common/fac_prov_ipmi/ |
H A D | fac_prov_ipmi.c | 1627 tnode_t *chip, *dimm; local 1658 chip = topo_node_parent(topo_node_parent(dimm)); 1662 (void) snprintf(buf, BUFSZ, fmtarr[i], topo_node_instance(chip), 1690 tnode_t *chip, *chan, *cs; local 1718 chip = topo_node_parent(topo_node_parent(topo_node_parent(cs))); 1725 chip = topo_node_parent(topo_node_parent(topo_node_parent(cs))); 1734 (void) snprintf(buf, BUFSZ, fmtarr[i], topo_node_instance(chip),
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/illumos-gate/usr/src/uts/common/io/rge/ |
H A D | rge_chip.c | 697 chip_id_t *chip = &rgep->chipid; local 706 chip->mac_ver = val32; 707 chip->is_pcie = pci_lcap_locate(rgep->cfg_handle, 713 chip->enable_mac_first = !chip->is_pcie; 714 if (chip->mac_ver == MAC_VER_8101E_C) { 715 chip->is_pcie = B_FALSE; 723 chip->phy_ver = val16; 726 if (chip->mac_ver == MAC_VER_8169 || 727 chip 888 chip_id_t *chip = &rgep->chipid; local [all...] |
/illumos-gate/usr/src/uts/intel/io/intel_nb5000/ |
H A D | intel_nb5000.c | 1893 int chip; local 1896 chip = nb_regs->nb.fsb_regs.fsb * 2; 1898 chip = nb_regs->nb.fsb_regs.fsb; 1900 "motherboard", 0, "chip", chip);
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/illumos-gate/usr/src/uts/common/io/axf/ |
H A D | axf_usbgem.c | 84 (((struct axf_dev *)(dp)->private)->chip->type == CHIP_TYPE_AX88172) 87 (((struct axf_dev *)(dp)->private)->chip->type == CHIP_TYPE_AX88772) 257 struct chip_info *chip; member in struct:axf_dev 340 val8 = lp->chip->gpio_reset[1] 341 | lp->chip->gpio_speed[dp->speed] 342 | lp->chip->gpio_duplex[dp->full_duplex]; 348 val8 = lp->chip->gpio_reset[0] 349 | lp->chip->gpio_speed[dp->speed] 350 | lp->chip->gpio_duplex[dp->full_duplex]; 620 gpio = lp->chip [all...] |
/illumos-gate/usr/src/uts/common/io/sfe/ |
H A D | sfe.c | 148 struct chip_info *chip; member in struct:sfe_dev 278 /* ensure de-assert chip select */ 284 /* assert chip select */ 548 cmn_err(CE_WARN, "%s: chip reset timeout", dp->name); 601 cmn_err(CE_WARN, "!%s: chip reset timeout", dp->name); 606 DPRINTF(0, (CE_CONT, "!%s: chip reset in %duS", dp->name, i*10)); 721 /* all broadcast, all multicast, physical for the chip */ 726 * accept all broadcast and physical for the chip. 738 * accept all broadcast and physical for the chip 757 * the chip [all...] |
/illumos-gate/usr/src/uts/common/io/vr/ |
H A D | vr.h | 156 #define VR_BUG_NEEDMODE10T (1 << 1) /* chip needs mode10t secret */ 157 #define VR_BUG_NEEDMIION (1 << 2) /* chip needs miion secret */ 158 #define VR_BUG_NEEDMODE2PCEROPT (1 << 3) /* chip needs pceropt */ 159 #define VR_BUG_NO_TXQUEUEING (1 << 4) /* chip cannot queue tx */ 160 #define VR_BUG_NO_MEMIO (1 << 5) /* chip cannot memory space */ 454 vr_chip_t chip; member in struct:__anon6581
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/illumos-gate/usr/src/uts/common/sys/fibre-channel/fca/emlxs/ |
H A D | emlxs_adapters.h | 316 uint32_t chip; member in struct:emlxs_model 318 /* chip */
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/illumos-gate/usr/src/uts/sun4u/tazmo/io/ |
H A D | envctrl.c | 318 * Address map of this chip 1821 * value of the chip. This means that the i2c bus got wedged. 2512 * is a clock calendar chip on the envctrl bus. 2513 * We use this chip as a watchdog timer for the 2514 * fan control. At reset this chip pulses the interrupt 2895 struct envctrl_pcf8574_chip chip; local 2899 chip.val = ENVCTRL_FSP_OFF; /* init all values to off */ 2900 chip.chip_num = ENVCTRL_PCF8574_DEV6; /* 0x01 port 1 */ 2901 chip.type = PCF8574A; 2906 chip 2914 envctrl_get_dskled(struct envctrlunit *unitp, struct envctrl_pcf8574_chip *chip) argument 2934 envctrl_set_dskled(struct envctrlunit *unitp, struct envctrl_pcf8574_chip *chip) argument 3189 struct envctrl_pcf8574_chip chip; local [all...] |
/illumos-gate/usr/src/uts/sun4u/io/ |
H A D | opl_cfg.c | 226 printf("HWD:chip status:\n"); 231 printf("chip[%d] = ", i); 509 int portid, board, chip, channel, leaf; local 522 chip = OPL_CPU_CHIP(portid); 523 opl_boards[board].cfg_cpu_chips[chip] = node; 742 hwd_cpu_chip_t *chip; local 748 chip = &probe->pr_sb->sb_cmu.cmu_cpu_chips[probe->pr_cpu_chip]; 749 core = &chip->chip_cores[probe->pr_core]; 769 hwd_cpu_chip_t *chip; local 773 chip 810 hwd_cpu_chip_t *chip; local 871 hwd_cpu_chip_t *chip; local 916 hwd_cpu_chip_t *chip; local [all...] |
/illumos-gate/usr/src/uts/sun4u/io/px/ |
H A D | px_hlib.c | 48 * This array is in reg,chip form. PX_CHIP_UNIDENTIFIED is for all chips 53 uint64_t chip; member in struct:px_pec_regs 192 DBG(DBG_CB, NULL, "hvio_cb_init - unknown chip type: 0x%x\n", 1601 DBG(DBG_PEC, NULL, "hvio_pec_init - unknown chip type: 0x%x\n", 1642 DBG(DBG_MMU, NULL, "mmu_tte_to_pa - unknown chip type: 0x%x\n", 1651 * Return MMU bypass noncache bit for chip 1667 "mmu_bypass_nocache - unknown chip type: 0x%x\n", 1676 * Calculate number of TSB entries for the chip. 1993 "hvio_get_bypass_base - unknown chip type: 0x%x\n", 2016 "hvio_get_bypass_end - unknown chip typ [all...] |
/illumos-gate/usr/src/uts/sun4u/javelin/io/ |
H A D | envctrltwo.c | 1111 "%s%d: Write to chip (IOC_SETRAW) failed", 1128 "%s%d: Read of chip (IOC_GETRAW) failed", 1293 * The interrupt routine got called but the interrupt chip 2358 envctrl_get_dskled(struct envctrlunit *unitp, struct envctrl_chip *chip) argument 2364 if (chip->chip_num != EHC_DEV7 || 2365 chip->type != ENVCTRL_PCF8574A) { 2370 0, &chip->val, 1); 2375 chip->val = ~chip->val; 2381 envctrl_set_dskled(struct envctrlunit *unitp, struct envctrl_chip *chip) argument [all...] |