25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CDDL HEADER START
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The contents of this file are subject to the terms of the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Common Development and Distribution License (the "License").
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * You may not use this file except in compliance with the License.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * See the License for the specific language governing permissions
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * and limitations under the License.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * When distributing Covered Code, include this CDDL HEADER in each
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * If applicable, add the following below this CDDL HEADER, with the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * fields enclosed by brackets "[]" replaced with your own identifying
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * information: Portions Copyright [yyyy] [name of copyright owner]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CDDL HEADER END
88294e09b5c27cbb12b6735e2fb247a86b76666dRichard Bean * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Use is subject to license terms.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Module control operations
88294e09b5c27cbb12b6735e2fb247a86b76666dRichard Bean "OPL opl_cfg"
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_map_in(dev_info_t *, fco_handle_t, fc_ci_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_map_out(dev_info_t *, fco_handle_t, fc_ci_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_register_fetch(dev_info_t *, fco_handle_t, fc_ci_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_register_store(dev_info_t *, fco_handle_t, fc_ci_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_claim_memory(dev_info_t *, fco_handle_t, fc_ci_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_release_memory(dev_info_t *, fco_handle_t, fc_ci_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_vtop(dev_info_t *, fco_handle_t, fc_ci_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_config_child(dev_info_t *, fco_handle_t, fc_ci_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_get_fcode_size(dev_info_t *, fco_handle_t, fc_ci_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_get_fcode(dev_info_t *, fco_handle_t, fc_ci_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_map_phys(dev_info_t *, struct regspec *, caddr_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int opl_get_hwd_va(dev_info_t *, fco_handle_t, fc_ci_t *);
531232457f24de82ba95346b3de302b990fe50f4mvstatic int opl_master_interrupt(dev_info_t *, fco_handle_t, fc_ci_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern int prom_get_fcode_size(char *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern int prom_get_fcode(char *, char *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Create a resource map for the contiguous memory allocated
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * at start-of-day in startup.c
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cmn_err(CE_WARN, "Cannot setup resource map opl-fcodemem\n");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Put the allocated memory into the pool.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl (void) ndi_ra_free(ddi_root_node(), (uint64_t)efcode_vaddr,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cmn_err(CE_WARN, "opl_cfg failed to load, error=%d", err);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl (void) ndi_ra_map_destroy(ddi_root_node(), "opl-fcodemem");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl (void) ndi_ra_map_destroy(ddi_root_node(), "opl-fcodemem");
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic void
25cf1a301a396c38e8adf52c15f537b80d2483f7jl printf("HWD:version = 0x%x.%x\n", hdrp->hdr_version.major,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl printf("HWD:board offset = 0x%x\n", hdrp->hdr_sb_info_offset);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl printf("HWD:board status = %d\n", statp->sb_status[board]);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl printf("HWD:banner name = %s\n", dinfop->dinf_banner_name);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl printf("HWD:platform = %s\n", dinfop->dinf_platform_token);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (i = 0; i < HWD_CPU_CHIPS_PER_CMU; i++) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (i = 0; i < HWD_PCI_CHANNELS_PER_SB; i++) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif /* DEBUG */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * For SesamI debugging, just map the SRAM directly to a kernel
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * VA and read it out from there
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * 0x4081F1323000LL is the HWD base address for LSB 0. But we need to map
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * at page boundaries. So, we use a base address of 0x4081F1322000LL.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Note that this has to match the HWD base pa set in .sesami-common-defs.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The size specified for the HWD in the SCF spec is 36K. But since
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * we adjusted the base address by 4K, we need to use 40K for the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * mapping size to cover the HWD. And 40K is also a multiple of the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * base page size.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif /* UCTEST */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Get the hardware descriptor from SCF.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_read_hwd(int board, hwd_header_t **hdrp, hwd_sb_status_t **statp,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl static int (*getinfop)(uint32_t, uint8_t, uint32_t, uint32_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl void *) = NULL;
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Just map the HWD in SRAM to a kernel VA
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl hat_devload(kas.a_hat, opl_hwd_vaddr, size, pfn, PROT_READ,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* find the scf_service_getinfo() function */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* allocate memory to receive the data */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* get the HWD */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* copy the data to the destination */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (ret == 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The opl_probe_t probe structure is used to pass all sorts of parameters
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * to callback functions during probing. It also contains a snapshot of
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * the hardware descriptor that is taken at the beginning of a probe.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Read the hardware descriptor.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (ret != 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This function is used to obtain pointers to relevant device nodes
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * which are created by Solaris at boot time.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This function walks the child nodes of a given node, extracts
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * the "name" property, if it exists, and passes the node to a
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * callback init function. The callback determines if this node is
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * interesting or not. If it is, then a pointer to the node is
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * stored away by the callback for use during unprobe.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The DDI get property function allocates storage for the name
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * property. That needs to be freed within this function.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Hold parent node busy to walk its child list
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The property does not exist for this node.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (ret != 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This init function finds all the interesting nodes under the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * root node and stores pointers to them. The following nodes
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * are considered interesting by this implementation:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * These are nodes that represent processor chips.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * These are nodes that represent PCI leaves.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * "pseudo-mc"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * These are nodes that contain memory information.
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_init_root_nodes(dev_info_t *node, char *name, int len)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl } else if (strncmp(name, OPL_PSEUDO_MC_NODE, len) == 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This function initializes the OPL IKP feature. Currently, all it does
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * is find the interesting nodes that Solaris has created at boot time
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * for boards present at boot time and store pointers to them. This
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * is useful if those boards are unprobed by DR.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * When DR is initialized, we walk the device tree and acquire a hold on
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * all the nodes that are interesting to IKP. This is so that the corresponding
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * branches cannot be deleted.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The following function informs the walk about which nodes are interesting
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * so that it can hold the corresponding branches.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * We only need to hold/release the following nodes which
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * represent separate branches that must be managed.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * We only need to hold/release the following nodes which
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * represent separate branches that must be managed.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Not of interest to us */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ddi_walk_devs(ddi_get_child(dip), opl_hold_rele_devtree, &hold);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ddi_walk_devs(ddi_get_child(dip), opl_hold_rele_devtree, &hold);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This is a helper function that allows opl_create_node() to return a
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * pointer to a newly created node to its caller.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic void
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Function to create a node in the device tree under a specified parent.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * e_ddi_branch_create() allows the creation of a whole branch with a
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * single call of the function. However, we only use it to create one node
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * at a time in the case of non-I/O device nodes. In other words, we
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * create branches by repeatedly using this function. This makes the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * code more readable.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The branch descriptor passed to e_ddi_branch_create() takes two
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * callbacks. The create() callback is used to set the properties of a
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * newly created node. The other callback is used to return a pointer
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * to the newly created node. The create() callback is passed by the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * caller of this function based on the kind of node he wishes to
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * e_ddi_branch_create() returns with the newly created node held. We
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * only need to hold the top nodes of the branches we create. We release
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * the hold for the others. E.g., the "cmp" node needs to be held. Since
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * we hold the "cmp" node, there is no need to hold the "core" and "cpu"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * nodes below it.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (e_ddi_branch_create(probe->pr_parent, &branch, NULL, 0) != 0)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Function to tear down a whole branch rooted at the specified node.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Although we create each node of a branch individually, we destroy
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * a whole branch in one call. This is more efficient.
e98fafb9956429b59c817d4fbd27720c73879203jl cmn_err(CE_WARN, "OPL node removal failed: %s (%p)", path,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Set the properties for a "cpu" node.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jl chip = &probe->pr_sb->sb_cmu.cmu_cpu_chips[probe->pr_cpu_chip];
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(string, node, "device_type", OPL_CPU_NODE);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Create "cpu" nodes as child nodes of a given "core" node.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl chip = &probe->pr_sb->sb_cmu.cmu_cpu_chips[probe->pr_cpu_chip];
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (i = 0; i < HWD_CPUS_PER_CORE; i++) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Olympus-C has 2 cpus per core.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Jupiter has 4 cpus per core.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * For the Olympus-C based platform, we expect the cpu_status
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * of the non-existent cpus to be set to missing.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Set the properties for a "core" node.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_create_core(dev_info_t *node, void *arg, uint_t flags)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl chip = &probe->pr_sb->sb_cmu.cmu_cpu_chips[probe->pr_cpu_chip];
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(string, node, "device_type", OPL_CORE_NODE);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(string, node, "compatible", chip->chip_compatible);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(int, node, "manufacturer#", core->core_manufacturer);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(int, node, "clock-frequency", core->core_frequency);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(int, node, "l1-icache-size", core->core_l1_icache_size);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(int, node, "l1-dcache-size", core->core_l1_dcache_size);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(int, node, "l2-cache-size", core->core_l2_cache_size);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP_ARRAY(int, node, "l2-cache-sharing", sharing, 2);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Create "core" nodes as child nodes of a given "cmp" node.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Create the branch below each "core" node".
25cf1a301a396c38e8adf52c15f537b80d2483f7jl chip = &probe->pr_sb->sb_cmu.cmu_cpu_chips[probe->pr_cpu_chip];
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (i = 0; i < HWD_CORES_PER_CPU_CHIP; i++) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Create "cpu" nodes below "core".
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
e98fafb9956429b59c817d4fbd27720c73879203jl probe->pr_cpu_impl |= (1 << cores[i].core_implementation);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Set the properties for a "cmp" node.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_create_cpu_chip(dev_info_t *node, void *arg, uint_t flags)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl chip = &probe->pr_sb->sb_cmu.cmu_cpu_chips[probe->pr_cpu_chip];
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(string, node, "name", OPL_CPU_CHIP_NODE);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl dummy_addr = OPL_PROC_AS(probe->pr_board, probe->pr_cpu_chip);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP_ARRAY(int, node, "reg", (int *)&range, 4);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Create "cmp" nodes as child nodes of the root node.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Create the branch below each "cmp" node.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cfg_cpu_chips = opl_boards[probe->pr_board].cfg_cpu_chips;
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (i = 0; i < HWD_CPU_CHIPS_PER_CMU; i++) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Create "core" nodes below "cmp".
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * We hold the "cmp" node. So, there is no need to hold
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * the "core" and "cpu" nodes below it.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Set the properties for a "pseudo-mc" node.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_create_pseudo_mc(dev_info_t *node, void *arg, uint_t flags)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(string, node, "name", OPL_PSEUDO_MC_NODE);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(string, node, "device_type", "memory-controller");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(string, node, "compatible", "FJSV,oplmc");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP_ARRAY(int, node, "reg", (int *)&range, 4);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP_ARRAY(int, node, "sb-mem-ranges", (int *)&range, 4);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (i = 0, j = 0; i < HWD_BANKS_PER_CMU; i++) {
68ac2337c38c8af06edcf32a72e42de36ec72a9djl if (j > 0) {
68ac2337c38c8af06edcf32a72e42de36ec72a9djl OPL_UPDATE_PROP_ARRAY(int, node, "mc-addr", (int *)mc, j*3);
68ac2337c38c8af06edcf32a72e42de36ec72a9djl * If there is no memory, we need the mc-addr property, but
68ac2337c38c8af06edcf32a72e42de36ec72a9djl * it is length 0. The only way to do this using ndi seems
68ac2337c38c8af06edcf32a72e42de36ec72a9djl * to be by creating a boolean property.
68ac2337c38c8af06edcf32a72e42de36ec72a9djl ret = ndi_prop_create_boolean(DDI_DEV_T_NONE, node, "mc-addr");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP_ARRAY(byte, node, "cs0-mc-pa-trans-table",
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP_ARRAY(byte, node, "cs1-mc-pa-trans-table",
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (i = 0, j = 0; i < CS_PER_MEM; i++) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl status[j][0] = i;
68ac2337c38c8af06edcf32a72e42de36ec72a9djl if (j > 0) {
68ac2337c38c8af06edcf32a72e42de36ec72a9djl OPL_UPDATE_PROP_ARRAY(int, node, "cs-status", (int *)status,
68ac2337c38c8af06edcf32a72e42de36ec72a9djl * If there is no memory, we need the cs-status property, but
68ac2337c38c8af06edcf32a72e42de36ec72a9djl * it is length 0. The only way to do this using ndi seems
68ac2337c38c8af06edcf32a72e42de36ec72a9djl * to be by creating a boolean property.
68ac2337c38c8af06edcf32a72e42de36ec72a9djl "cs-status");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Create "pseudo-mc" nodes
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cmn_err(CE_WARN, "IKP: create pseudo-mc (%d) failed", board);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Allocate the fcode ops handle.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_fc_ops_alloc_handle(dev_info_t *parent, dev_info_t *child,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl rp = kmem_zalloc(sizeof (struct fc_resource_list), KM_SLEEP);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl rp->next_handle = fc_ops_alloc_handle(parent, child, fcode, fcode_size,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Add the child's nodeid to our table...
25cf1a301a396c38e8adf52c15f537b80d2483f7jl fc_add_dip_to_phandle(fc_handle_to_phandle_head(rp), rp->child, h);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (rp);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic void
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Release all the resources from the resource list
68ac2337c38c8af06edcf32a72e42de36ec72a9djl * If this is still mapped, we'd better unmap it now,
68ac2337c38c8af06edcf32a72e42de36ec72a9djl * or all our structures that are tracking it will
68ac2337c38c8af06edcf32a72e42de36ec72a9djl * be leaked.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * DMA has to be freed up at exit time.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "opl_fc_ops_free_handle: Unexpected DMA seen!");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "Free claim-memory resource 0x%lx size 0x%x\n",
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_fc_do_op(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * First try the generic fc_ops.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Now try the Jupiter-specific ops.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG1(9, CE_CONT, "opl_fc_do_op: <%s> not serviced\n", service);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * map-in (phys.lo phys.hi size -- virt)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "address 0x%08x.%08x length %x\n", rspec.regspec_bustype,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl error = opl_map_phys(rp->child, &rspec, &virt, &acc, &h);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "address 0x%08x.%08x length %x\n", rspec.regspec_bustype,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG1(3, CE_CONT, "opl_map_in: returning virt %p\n", virt);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Log this resource ...
25cf1a301a396c38e8adf52c15f537b80d2483f7jl resp = kmem_zalloc(sizeof (struct fc_resource), KM_SLEEP);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * map-out (virt size -- )
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG2(1, CE_CONT, "opl_map_out: attempting map out %p %x\n",
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Find if this request matches a mapping resource we set up.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "known mapping"));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * remove the resource from the list and release it.
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_register_fetch(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Determine the access width .. we can switch on the 2nd
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * character of the name which is "rx@", "rl@", "rb@" or "rw@"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Check the alignment ...
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Find if this virt is 'within' a request we know about
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "known mappings"));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl switch (len) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl case sizeof (x):
25cf1a301a396c38e8adf52c15f537b80d2483f7jl else /* RT_CONTIGIOUS */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl case sizeof (l):
25cf1a301a396c38e8adf52c15f537b80d2483f7jl else /* RT_CONTIGIOUS */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl case sizeof (w):
25cf1a301a396c38e8adf52c15f537b80d2483f7jl else /* RT_CONTIGIOUS */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl case sizeof (b):
25cf1a301a396c38e8adf52c15f537b80d2483f7jl else /* RT_CONTIGIOUS */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG2(1, CE_CONT, "opl_register_fetch: access error "
25cf1a301a396c38e8adf52c15f537b80d2483f7jl switch (len) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl case sizeof (l): fc_result(cp, 0) = fc_uint32_t2cell(l); break;
25cf1a301a396c38e8adf52c15f537b80d2483f7jl case sizeof (w): fc_result(cp, 0) = fc_uint16_t2cell(w); break;
25cf1a301a396c38e8adf52c15f537b80d2483f7jl case sizeof (b): fc_result(cp, 0) = fc_uint8_t2cell(b); break;
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_register_store(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Determine the access width .. we can switch on the 2nd
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * character of the name which is "rx!", "rl!", "rb!" or "rw!"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl len = sizeof (x);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl len = sizeof (l);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl len = sizeof (w);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl len = sizeof (b);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Check the alignment ...
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Find if this virt is 'within' a request we know about
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "known mappings"));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl switch (len) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl case sizeof (x):
25cf1a301a396c38e8adf52c15f537b80d2483f7jl case sizeof (l):
25cf1a301a396c38e8adf52c15f537b80d2483f7jl case sizeof (w):
25cf1a301a396c38e8adf52c15f537b80d2483f7jl case sizeof (b):
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG2(1, CE_CONT, "opl_register_store: access error "
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * opl_claim_memory
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * claim-memory (align size vhint -- vaddr)
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_claim_memory(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG3(1, CE_CONT, "opl_claim_memory: align=0x%x size=0x%x "
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (size == 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cmn_err(CE_WARN, "opl_claim_memory - unable to allocate "
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "contiguous memory of size zero\n");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (ndi_ra_alloc(ddi_root_node(), &request, &answer, &alen,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cmn_err(CE_WARN, "opl_claim_memory - unable to allocate "
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "contiguous memory\n");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG2(1, CE_CONT, "opl_claim_memory: address allocated=0x%lx "
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Log this resource ...
25cf1a301a396c38e8adf52c15f537b80d2483f7jl resp = kmem_zalloc(sizeof (struct fc_resource), KM_SLEEP);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * opl_release_memory
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * release-memory (size vaddr -- )
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_release_memory(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG2(1, CE_CONT, "opl_release_memory: vaddr=0x%x size=0x%x\n",
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Find if this request matches a mapping resource we set up.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "known mapping"));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * remove the resource from the list and release it.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * opl_vtop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * vtop (vaddr -- paddr.lo paddr.hi)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (fc_syntax_error(cp, "nresults must be less than 2"));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Find if this request matches a mapping resource we set up.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "known mapping"));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG2(1, CE_CONT, "opl_vtop: vaddr=0x%x paddr=0x%x\n",
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_config_child(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl h = fc_dip_to_phandle(fc_handle_to_phandle_head(rp), rp->child);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_get_fcode(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG2(1, CE_CONT, "get_fcode: %x %d\n", fcode_virt, fcode_len);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (copyinstr(fc_cell2ptr(dropin_name_virt), dropin_name,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if ((status = prom_get_fcode(dropin_name, fcode)) != 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "to copy out fcode image");
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_get_fcode_size(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG1(1, CE_CONT, "opl_get_fcode_size: %s\n", dropin_name);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FC_DEBUG1(1, CE_CONT, "opl_get_fcode_size: fcode_len = %d\n", len);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * cache a copy of the reg spec
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic void
25cf1a301a396c38e8adf52c15f537b80d2483f7jl (void) ddi_map(acc_handlep->ah_dip, &mapreq, acc_handlep->ah_offset,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Free the cached copy
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_get_hwd_va(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Check the argument */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Get the parameters */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Get the ID numbers */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Set the pointer of hwd. */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if ((hwd_h = (hwd_header_t *)opl_boards[lsb].cfg_hwd) == NULL) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Set the pointer of hwd sb. */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if ((hwd_sb = (hwd_sb_t *)((char *)hwd_h + hwd_h->hdr_sb_info_offset))
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Copyout CMU-CH HW Descriptor */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "Unable to copy out cmuch descriptor for %x",
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Copyout PCI-CH HW Descriptor */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (copyout((void *)&hwd_sb->sb_pci_ch[ch].pci_leaf[leaf],
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "Unable to copy out pcich descriptor for %x",
531232457f24de82ba95346b3de302b990fe50f4mv * After Solaris boots, a user can enter OBP using L1A, etc. While in OBP,
531232457f24de82ba95346b3de302b990fe50f4mv * interrupts may be received from PCI devices. These interrupts
531232457f24de82ba95346b3de302b990fe50f4mv * cannot be handled meaningfully since the system is in OBP. These
531232457f24de82ba95346b3de302b990fe50f4mv * interrupts need to be cleared on the CPU side so that the CPU may
531232457f24de82ba95346b3de302b990fe50f4mv * continue with whatever it is doing. Devices that have raised the
531232457f24de82ba95346b3de302b990fe50f4mv * interrupts are expected to reraise the interrupts after sometime
531232457f24de82ba95346b3de302b990fe50f4mv * as they have not been handled. At that time, Solaris will have a
531232457f24de82ba95346b3de302b990fe50f4mv * chance to properly service the interrupts.
531232457f24de82ba95346b3de302b990fe50f4mv * The location of the interrupt registers depends on what is present
531232457f24de82ba95346b3de302b990fe50f4mv * at a port. OPL currently supports the Oberon and the CMU channel.
531232457f24de82ba95346b3de302b990fe50f4mv * The following handler handles both kinds of ports and computes
531232457f24de82ba95346b3de302b990fe50f4mv * interrupt register addresses from the specifications and Jupiter Bus
531232457f24de82ba95346b3de302b990fe50f4mv * device bindings.
531232457f24de82ba95346b3de302b990fe50f4mv * Fcode drivers install their interrupt handler via a "master-interrupt"
531232457f24de82ba95346b3de302b990fe50f4mv * service. For boot time devices, this takes place within OBP. In the case
531232457f24de82ba95346b3de302b990fe50f4mv * of DR, OPL uses IKP. The Fcode drivers that run within the efcode framework
531232457f24de82ba95346b3de302b990fe50f4mv * attempt to install their handler via the "master-interrupt" service.
531232457f24de82ba95346b3de302b990fe50f4mv * However, we cannot meaningfully install the Fcode driver's handler.
531232457f24de82ba95346b3de302b990fe50f4mv * Instead, we install our own handler in OBP which does the same thing.
531232457f24de82ba95346b3de302b990fe50f4mv * Note that the only handling done for interrupts here is to clear it
531232457f24de82ba95346b3de302b990fe50f4mv * on the CPU side. If any device in the future requires more special
531232457f24de82ba95346b3de302b990fe50f4mv * handling, we would have to put in some kind of framework for adding
531232457f24de82ba95346b3de302b990fe50f4mv * device-specific handlers. This is *highly* unlikely, but possible.
531232457f24de82ba95346b3de302b990fe50f4mv * Finally, OBP provides a hook called "unix-interrupt-handler" to install
531232457f24de82ba95346b3de302b990fe50f4mv * a Solaris-defined master-interrupt handler for a port. The default
531232457f24de82ba95346b3de302b990fe50f4mv * definition for this method does nothing. Solaris may override this
531232457f24de82ba95346b3de302b990fe50f4mv * with its own definition. This is the way the following handler gets
531232457f24de82ba95346b3de302b990fe50f4mv * control from OBP when interrupts happen at a port after L1A, etc.
531232457f24de82ba95346b3de302b990fe50f4mv * This method translates an Oberon port id to the base (physical) address
531232457f24de82ba95346b3de302b990fe50f4mv * of the interrupt clear registers for that port id.
531232457f24de82ba95346b3de302b990fe50f4mv": pcich-mid>clear-int-pa ( mid -- pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" dup 1 >> 7 and ( mid ch# ) "
531232457f24de82ba95346b3de302b990fe50f4mv" over 4 >> h# 1f and ( mid ch# lsb# ) "
531232457f24de82ba95346b3de302b990fe50f4mv" 1 d# 46 << ( mid ch# lsb# pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" swap d# 40 << or ( mid ch# pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" swap d# 37 << or ( mid pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" swap 1 and if h# 70.0000 else h# 60.0000 then "
531232457f24de82ba95346b3de302b990fe50f4mv" or h# 1400 or ( pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv * This method translates a CMU channel port id to the base (physical) address
531232457f24de82ba95346b3de302b990fe50f4mv * of the interrupt clear registers for that port id. There are two classes of
531232457f24de82ba95346b3de302b990fe50f4mv * interrupts that need to be handled for a CMU channel:
531232457f24de82ba95346b3de302b990fe50f4mv * - obio interrupts
531232457f24de82ba95346b3de302b990fe50f4mv * - pci interrupts
531232457f24de82ba95346b3de302b990fe50f4mv * So, there are two addresses that need to be computed.
531232457f24de82ba95346b3de302b990fe50f4mv": cmuch-mid>clear-int-pa ( mid -- obio-pa pci-pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" dup 1 >> 7 and ( mid ch# ) "
531232457f24de82ba95346b3de302b990fe50f4mv" over 4 >> h# 1f and ( mid ch# lsb# ) "
531232457f24de82ba95346b3de302b990fe50f4mv" 1 d# 46 << ( mid ch# lsb# pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" swap d# 40 << or ( mid ch# pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" swap d# 37 << or ( mid pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" nip dup h# 1800 + ( pa obio-pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" swap h# 1400 + ( obio-pa pci-pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv * This method checks if a given I/O port ID is valid or not.
531232457f24de82ba95346b3de302b990fe50f4mv * For a given LSB,
531232457f24de82ba95346b3de302b990fe50f4mv * Oberon ports range from 0 - 3
531232457f24de82ba95346b3de302b990fe50f4mv * CMU ch ports range from 4 - 4
531232457f24de82ba95346b3de302b990fe50f4mv * Also, the Oberon supports leaves 0 and 1.
531232457f24de82ba95346b3de302b990fe50f4mv * The CMU ch supports only one leaf, leaf 0.
531232457f24de82ba95346b3de302b990fe50f4mv": valid-io-mid? ( mid -- flag ) "
531232457f24de82ba95346b3de302b990fe50f4mv" dup 1 >> 7 and ( mid ch# ) "
531232457f24de82ba95346b3de302b990fe50f4mv" dup 4 > if 2drop false exit then ( mid ch# ) "
531232457f24de82ba95346b3de302b990fe50f4mv" 4 = swap 1 and 1 = and not "
531232457f24de82ba95346b3de302b990fe50f4mv * This method checks if a given port id is a CMU ch.
531232457f24de82ba95346b3de302b990fe50f4mv": cmuch? ( mid -- flag ) 1 >> 7 and 4 = ; "
531232457f24de82ba95346b3de302b990fe50f4mv * Given the base address of the array of interrupt clear registers for
531232457f24de82ba95346b3de302b990fe50f4mv * a port id, this method iterates over the given interrupt number bitmap
531232457f24de82ba95346b3de302b990fe50f4mv * and resets the interrupt on the CPU side for every interrupt number
531232457f24de82ba95346b3de302b990fe50f4mv * in the bitmap. Note that physical addresses are used to perform the
531232457f24de82ba95346b3de302b990fe50f4mv * writes, not virtual addresses. This allows the handler to work without
531232457f24de82ba95346b3de302b990fe50f4mv * any involvement from Solaris.
531232457f24de82ba95346b3de302b990fe50f4mv": clear-ints ( pa bitmap count -- ) "
531232457f24de82ba95346b3de302b990fe50f4mv" 0 do ( pa bitmap ) "
531232457f24de82ba95346b3de302b990fe50f4mv" dup 0= if 2drop unloop exit then "
531232457f24de82ba95346b3de302b990fe50f4mv" tuck ( bitmap pa bitmap ) "
531232457f24de82ba95346b3de302b990fe50f4mv" 1 and if ( bitmap pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" dup i 8 * + 0 swap ( bitmap pa 0 pa' ) "
531232457f24de82ba95346b3de302b990fe50f4mv" h# 15 spacex! ( bitmap pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" then ( bitmap pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" swap 1 >> ( pa bitmap ) "
531232457f24de82ba95346b3de302b990fe50f4mv * This method replaces the master-interrupt handler in OBP. Once
531232457f24de82ba95346b3de302b990fe50f4mv * this method is plumbed into OBP, OBP transfers control to this
531232457f24de82ba95346b3de302b990fe50f4mv * handler while returning to Solaris from OBP after L1A. This method's
531232457f24de82ba95346b3de302b990fe50f4mv * task is to simply reset received interrupts on the CPU side.
531232457f24de82ba95346b3de302b990fe50f4mv * When the devices reassert the interrupts later, Solaris will
531232457f24de82ba95346b3de302b990fe50f4mv * be able to see them and handle them.
531232457f24de82ba95346b3de302b990fe50f4mv * For each port ID that has interrupts, this method is called
531232457f24de82ba95346b3de302b990fe50f4mv * once by OBP. The input arguments are:
531232457f24de82ba95346b3de302b990fe50f4mv * mid portid
531232457f24de82ba95346b3de302b990fe50f4mv * bitmap bitmap of interrupts that have happened
531232457f24de82ba95346b3de302b990fe50f4mv * This method returns true, if it is able to handle the interrupts.
531232457f24de82ba95346b3de302b990fe50f4mv * OBP does nothing further.
531232457f24de82ba95346b3de302b990fe50f4mv * This method returns false, if it encountered a problem. Currently,
531232457f24de82ba95346b3de302b990fe50f4mv * the only problem could be an invalid port id. OBP needs to do
531232457f24de82ba95346b3de302b990fe50f4mv * its own processing in that case. If this method returns false,
531232457f24de82ba95346b3de302b990fe50f4mv * it preserves the mid and bitmap arguments for OBP.
531232457f24de82ba95346b3de302b990fe50f4mv": unix-resend-mondos ( mid bitmap -- [ mid bitmap false ] | true ) "
531232457f24de82ba95346b3de302b990fe50f4mv * Uncomment the following line if you want to display the input arguments.
531232457f24de82ba95346b3de302b990fe50f4mv * This is meant for debugging.
531232457f24de82ba95346b3de302b990fe50f4mv * " .\" Bitmap=\" dup u. .\" MID=\" over u. cr "
531232457f24de82ba95346b3de302b990fe50f4mv * If the port id is not valid (according to the Oberon and CMU ch
531232457f24de82ba95346b3de302b990fe50f4mv * specifications, then return false to OBP to continue further
531232457f24de82ba95346b3de302b990fe50f4mv * processing.
531232457f24de82ba95346b3de302b990fe50f4mv" over valid-io-mid? not if ( mid bitmap ) "
531232457f24de82ba95346b3de302b990fe50f4mv" false exit "
531232457f24de82ba95346b3de302b990fe50f4mv * If the port is a CMU ch, then the 64-bit bitmap represents
531232457f24de82ba95346b3de302b990fe50f4mv * 2 32-bit bitmaps:
531232457f24de82ba95346b3de302b990fe50f4mv * - obio interrupt bitmap (20 bits)
531232457f24de82ba95346b3de302b990fe50f4mv * - pci interrupt bitmap (32 bits)
531232457f24de82ba95346b3de302b990fe50f4mv * - Split the bitmap into two
531232457f24de82ba95346b3de302b990fe50f4mv * - Compute the base addresses of the interrupt clear registers
531232457f24de82ba95346b3de302b990fe50f4mv * for both pci interrupts and obio interrupts
531232457f24de82ba95346b3de302b990fe50f4mv * - Clear obio interrupts
531232457f24de82ba95346b3de302b990fe50f4mv * - Clear pci interrupts
531232457f24de82ba95346b3de302b990fe50f4mv" over cmuch? if ( mid bitmap ) "
531232457f24de82ba95346b3de302b990fe50f4mv" xlsplit ( mid pci-bit obio-bit ) "
531232457f24de82ba95346b3de302b990fe50f4mv" rot cmuch-mid>clear-int-pa ( pci-bit obio-bit obio-pa pci-pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" >r ( pci-bit obio-bit obio-pa ) ( r: pci-pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" swap d# 20 clear-ints ( pci-bit ) ( r: pci-pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" r> swap d# 32 clear-ints ( ) ( r: ) "
531232457f24de82ba95346b3de302b990fe50f4mv * If the port is an Oberon, then the 64-bit bitmap is used fully.
531232457f24de82ba95346b3de302b990fe50f4mv * - Compute the base address of the interrupt clear registers
531232457f24de82ba95346b3de302b990fe50f4mv * - Clear interrupts
531232457f24de82ba95346b3de302b990fe50f4mv" else ( mid bitmap ) "
531232457f24de82ba95346b3de302b990fe50f4mv" swap pcich-mid>clear-int-pa ( bitmap pa ) "
531232457f24de82ba95346b3de302b990fe50f4mv" swap d# 64 clear-ints ( ) "
531232457f24de82ba95346b3de302b990fe50f4mv * Always return true from here.
531232457f24de82ba95346b3de302b990fe50f4mv" true ( true ) "
531232457f24de82ba95346b3de302b990fe50f4mv "' unix-resend-mondos to unix-interrupt-handler";
531232457f24de82ba95346b3de302b990fe50f4mvstatic char handler_defined[] = "p\" %s\" find nip swap l! ";
531232457f24de82ba95346b3de302b990fe50f4mv/*ARGSUSED*/
531232457f24de82ba95346b3de302b990fe50f4mv return (1);
531232457f24de82ba95346b3de302b990fe50f4mv * Check if the defer word "unix-interrupt-handler" is defined.
531232457f24de82ba95346b3de302b990fe50f4mv * This must be defined for OPL systems. So, this is only a
531232457f24de82ba95346b3de302b990fe50f4mv * sanity check.
531232457f24de82ba95346b3de302b990fe50f4mv if (!defined) {
531232457f24de82ba95346b3de302b990fe50f4mv return (0);
531232457f24de82ba95346b3de302b990fe50f4mv * Install the generic master-interrupt handler. Note that
531232457f24de82ba95346b3de302b990fe50f4mv * this is only done one time on the first DR operation.
531232457f24de82ba95346b3de302b990fe50f4mv * This is because, for OPL, one, single generic handler
531232457f24de82ba95346b3de302b990fe50f4mv * handles all ports (Oberon and CMU channel) and all
531232457f24de82ba95346b3de302b990fe50f4mv * interrupt sources within each port.
531232457f24de82ba95346b3de302b990fe50f4mv * The current support is only for the Oberon and CMU-channel.
531232457f24de82ba95346b3de302b990fe50f4mv * If any others need to be supported, the handler has to be
531232457f24de82ba95346b3de302b990fe50f4mv * modified accordingly.
531232457f24de82ba95346b3de302b990fe50f4mv * Define the OPL master interrupt handler
531232457f24de82ba95346b3de302b990fe50f4mv prom_interpret(define_master_interrupt_handler, 0, 0, 0, 0, 0);
531232457f24de82ba95346b3de302b990fe50f4mv * Take over the master interrupt handler from OBP.
531232457f24de82ba95346b3de302b990fe50f4mv prom_interpret(install_master_interrupt_handler, 0, 0, 0, 0, 0);
531232457f24de82ba95346b3de302b990fe50f4mv * prom_interpret() does not return a status. So, we assume
531232457f24de82ba95346b3de302b990fe50f4mv * that the calls succeeded. In reality, the calls may fail
531232457f24de82ba95346b3de302b990fe50f4mv * if there is a syntax error, etc in the strings.
531232457f24de82ba95346b3de302b990fe50f4mv return (1);
531232457f24de82ba95346b3de302b990fe50f4mv * Install the master-interrupt handler for a device.
531232457f24de82ba95346b3de302b990fe50f4mvopl_master_interrupt(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
531232457f24de82ba95346b3de302b990fe50f4mv /* Check the argument */
531232457f24de82ba95346b3de302b990fe50f4mv /* Get the parameters */
531232457f24de82ba95346b3de302b990fe50f4mv if ((board >= HWD_SBS_PER_DOMAIN) || !OPL_VALID_CHANNEL(channel) ||
531232457f24de82ba95346b3de302b990fe50f4mv (OPL_OBERON_CHANNEL(channel) && !OPL_VALID_LEAF(leaf)) ||
531232457f24de82ba95346b3de302b990fe50f4mv FC_DEBUG1(1, CE_CONT, "opl_master_interrupt: invalid port %x\n",
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Set the properties for a leaf node (Oberon leaf or CMU channel leaf).
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_create_leaf(dev_info_t *node, void *arg, uint_t flags)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP(string, node, "name", OPL_PCI_LEAF_NODE);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic char *
25cf1a301a396c38e8adf52c15f537b80d2483f7jlopl_get_probe_string(opl_probe_t *probe, int channel, int leaf)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cfg_handle = &board_cfg->cfg_pcich_handle[channel][leaf];
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Prevent any changes to leaf_node until we have bound
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * it to the correct driver.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Ideally, fcode would be run from the "sid_branch_create"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * callback (that is the primary purpose of that callback).
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * However, the fcode interpreter was written with the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * assumption that the "new_child" was linked into the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * device tree. The callback is invoked with the devinfo node
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * in the DS_PROTO state. More investigation is needed before
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * we can invoke the interpreter from the callback. For now,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * we create the "new_child" in the BOUND state, invoke the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * fcode interpreter and then rebind the dip to use any
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * compatible properties created by fcode.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The platform DR interfaces created the dip in
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * bound state. Bring devinfo node down to linked
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * state and hold it there until compatible
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * properties are created.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Drop the busy-hold on parent before calling
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * fcode_interpreter to prevent potential deadlocks
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Get the probe string
25cf1a301a396c38e8adf52c15f537b80d2483f7jl probe_string = opl_get_probe_string(probe, channel, leaf);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The fcode pointer specified here is NULL and the fcode
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * size specified here is 0. This causes the user-level
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * fcode interpreter to issue a request to the fcode
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * driver to get the Oberon/cmu-ch fcode.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl error = fcode_interpreter(parent, &opl_fc_do_op, fco_handle);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (error != 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cmn_err(CE_WARN, "IKP: Unable to probe PCI leaf (%d-%d-%d)",
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Compatible properties (if any) have been created,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * so bind driver.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic void
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Hold parent node busy to walk its child list
e98fafb9956429b59c817d4fbd27720c73879203jl for (node = ddi_get_child(parent); (node != NULL); node =
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The property does not exist for this node.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Create "pci" node and hierarchy for the Oberon channels and the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CMU channel.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (HWD_STATUS_OK(probe->pr_sb->sb_cmu.cmu_ch.chan_status)) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (i = 0; i < HWD_PCI_CHANNELS_PER_SB; i++) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (j = 0; j < HWD_LEAVES_PER_PCI_CHANNEL; j++) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Perform the probe in the following order:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * processors
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Each probe function returns 0 on sucess and a non-zero value on failure.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * What is a failure is determined by the implementor of the probe function.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * For example, while probing CPUs, any error encountered during probe
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * is considered a failure and causes the whole probe operation to fail.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * However, for I/O, an error encountered while probing one device
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * should not prevent other devices from being probed. It should not cause
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * the whole probe operation to fail.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * If the previous probe failed and left a partially configured
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * board, we need to unprobe the board and start with a clean slate.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Probe failed. Perform cleanup.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This unprobing also includes CMU-CH.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (i = 0; i < HWD_PCI_CHANNELS_PER_SB; i++) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (j = 0; j < HWD_LEAVES_PER_PCI_CHANNEL; j++) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (ret != 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
e98fafb9956429b59c817d4fbd27720c73879203jl cmn_err(CE_WARN, "IKP: destroy pci (%d-%d-%d) failed", board,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Destroy the "pseudo-mc" node for a board.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cmn_err(CE_WARN, "IKP: destroy pseudo-mc (%d) failed", board);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Destroy the "cmp" nodes for a board. This also destroys the "core"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * and "cpu" nodes below the "cmp" nodes.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl for (i = 0; i < HWD_CPU_CHIPS_PER_CMU; i++) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Perform the unprobe in the following order:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * processors
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Release the memory for the HWD */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * For MAC patrol support, we need to update the PA-related properties
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * when there is a copy-rename event. This should be called after the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * physical copy and rename has been done by DR, and before the MAC
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * patrol is restarted.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if ((OPL_GET_PROP_ARRAY(int, from_node, "sb-mem-ranges", rangef,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* XXX -- bad news */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if ((OPL_GET_PROP_ARRAY(int, to_node, "sb-mem-ranges", ranget,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* XXX -- bad news */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP_ARRAY(int, from_node, "sb-mem-ranges", (int *)ranget,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl OPL_UPDATE_PROP_ARRAY(int, to_node, "sb-mem-ranges", (int *)rangef,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);