c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * CDDL HEADER START
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * The contents of this file are subject to the terms of the
ba2e4443695ee6a6f420a35cd4fc3d3346d22932seb * Common Development and Distribution License (the "License").
ba2e4443695ee6a6f420a35cd4fc3d3346d22932seb * You may not use this file except in compliance with the License.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * or http://www.opensolaris.org/os/licensing.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * See the License for the specific language governing permissions
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * and limitations under the License.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * When distributing Covered Code, include this CDDL HEADER in each
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * If applicable, add the following below this CDDL HEADER, with the
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * fields enclosed by brackets "[]" replaced with your own identifying
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * information: Portions Copyright [yyyy] [name of copyright owner]
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * CDDL HEADER END
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
4bb4f326b9248e14f38bc18d91e54b7c70223f64Li-Zhen You * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Use is subject to license terms.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#include "rge.h"
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#define REG32(rgep, reg) ((uint32_t *)(rgep->io_regs+(reg)))
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#define REG16(rgep, reg) ((uint16_t *)(rgep->io_regs+(reg)))
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#define REG8(rgep, reg) ((uint8_t *)(rgep->io_regs+(reg)))
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#define PIO_ADDR(rgep, offset) ((void *)(rgep->io_regs+(offset)))
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Patchable globals:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * rge_autorecover
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Enables/disables automatic recovery after fault detection
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic uint32_t rge_autorecover = 1;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * globals:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#define RGE_DBG RGE_DBG_REGS /* debug flag for this code */
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen Youstatic uint32_t rge_watchdog_count = 1 << 5;
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing Chinastatic uint32_t rge_rx_watchdog_count = 1 << 3;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Operating register get/set access routines
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic uint32_t rge_reg_get32(rge_t *rgep, uintptr_t regno);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_reg_get32)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic uint32_t
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_reg_get32(rge_t *rgep, uintptr_t regno)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_reg_get32($%p, 0x%lx)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, regno));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (ddi_get32(rgep->io_handle, REG32(rgep, regno)));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_reg_put32(rge_t *rgep, uintptr_t regno, uint32_t data);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_reg_put32)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_reg_put32(rge_t *rgep, uintptr_t regno, uint32_t data)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_reg_put32($%p, 0x%lx, 0x%x)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, regno, data));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ddi_put32(rgep->io_handle, REG32(rgep, regno), data);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_reg_set32(rge_t *rgep, uintptr_t regno, uint32_t bits);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_reg_set32)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_reg_set32(rge_t *rgep, uintptr_t regno, uint32_t bits)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_reg_set32($%p, 0x%lx, 0x%x)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, regno, bits));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = rge_reg_get32(rgep, regno);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval |= bits;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, regno, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_reg_clr32(rge_t *rgep, uintptr_t regno, uint32_t bits);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_reg_clr32)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_reg_clr32(rge_t *rgep, uintptr_t regno, uint32_t bits)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_reg_clr32($%p, 0x%lx, 0x%x)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, regno, bits));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = rge_reg_get32(rgep, regno);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval &= ~bits;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, regno, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic uint16_t rge_reg_get16(rge_t *rgep, uintptr_t regno);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_reg_get16)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic uint16_t
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_reg_get16(rge_t *rgep, uintptr_t regno)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_reg_get16($%p, 0x%lx)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, regno));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (ddi_get16(rgep->io_handle, REG16(rgep, regno)));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_reg_put16(rge_t *rgep, uintptr_t regno, uint16_t data);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_reg_put16)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_reg_put16(rge_t *rgep, uintptr_t regno, uint16_t data)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_reg_put16($%p, 0x%lx, 0x%x)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, regno, data));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ddi_put16(rgep->io_handle, REG16(rgep, regno), data);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic uint8_t rge_reg_get8(rge_t *rgep, uintptr_t regno);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_reg_get8)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic uint8_t
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_reg_get8(rge_t *rgep, uintptr_t regno)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_reg_get8($%p, 0x%lx)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, regno));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (ddi_get8(rgep->io_handle, REG8(rgep, regno)));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_reg_put8(rge_t *rgep, uintptr_t regno, uint8_t data);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_reg_put8)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_reg_put8(rge_t *rgep, uintptr_t regno, uint8_t data)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_reg_put8($%p, 0x%lx, 0x%x)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, regno, data));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ddi_put8(rgep->io_handle, REG8(rgep, regno), data);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_reg_set8(rge_t *rgep, uintptr_t regno, uint8_t bits);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_reg_set8)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_reg_set8(rge_t *rgep, uintptr_t regno, uint8_t bits)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint8_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_reg_set8($%p, 0x%lx, 0x%x)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, regno, bits));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = rge_reg_get8(rgep, regno);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval |= bits;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put8(rgep, regno, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_reg_clr8(rge_t *rgep, uintptr_t regno, uint8_t bits);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_reg_clr8)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_reg_clr8(rge_t *rgep, uintptr_t regno, uint8_t bits)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint8_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_reg_clr8($%p, 0x%lx, 0x%x)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, regno, bits));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = rge_reg_get8(rgep, regno);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval &= ~bits;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put8(rgep, regno, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsuint16_t rge_mii_get16(rge_t *rgep, uintptr_t mii);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_mii_get16)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsuint16_t
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_mii_get16(rge_t *rgep, uintptr_t mii)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t val32;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t i;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = (mii & PHY_REG_MASK) << PHY_REG_SHIFT;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, PHY_ACCESS_REG, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Waiting for PHY reading OK
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs for (i = 0; i < PHY_RESET_LOOP; i++) {
526431940871c58531fcb8622ff47caaac00f6aegs drv_usecwait(1000);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rge_reg_get32(rgep, PHY_ACCESS_REG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (val32 & PHY_ACCESS_WR_FLAG)
aa81749390e332985277568edab1ee6132326b42gs return ((uint16_t)(val32 & 0xffff));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_REPORT((rgep, "rge_mii_get16(0x%x) fail, val = %x", mii, val32));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return ((uint16_t)~0u);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid rge_mii_put16(rge_t *rgep, uintptr_t mii, uint16_t data);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_mii_put16)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_mii_put16(rge_t *rgep, uintptr_t mii, uint16_t data)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t val32;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t i;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = (mii & PHY_REG_MASK) << PHY_REG_SHIFT;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval |= data & PHY_DATA_MASK;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval |= PHY_ACCESS_WR_FLAG;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, PHY_ACCESS_REG, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Waiting for PHY writing OK
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs for (i = 0; i < PHY_RESET_LOOP; i++) {
526431940871c58531fcb8622ff47caaac00f6aegs drv_usecwait(1000);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rge_reg_get32(rgep, PHY_ACCESS_REG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (!(val32 & PHY_ACCESS_WR_FLAG))
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_REPORT((rgep, "rge_mii_put16(0x%lx, 0x%x) fail",
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs mii, data));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
aa81749390e332985277568edab1ee6132326b42gsvoid rge_ephy_put16(rge_t *rgep, uintptr_t emii, uint16_t data);
aa81749390e332985277568edab1ee6132326b42gs#pragma no_inline(rge_ephy_put16)
aa81749390e332985277568edab1ee6132326b42gs
aa81749390e332985277568edab1ee6132326b42gsvoid
aa81749390e332985277568edab1ee6132326b42gsrge_ephy_put16(rge_t *rgep, uintptr_t emii, uint16_t data)
aa81749390e332985277568edab1ee6132326b42gs{
aa81749390e332985277568edab1ee6132326b42gs uint32_t regval;
aa81749390e332985277568edab1ee6132326b42gs uint32_t val32;
aa81749390e332985277568edab1ee6132326b42gs uint32_t i;
aa81749390e332985277568edab1ee6132326b42gs
aa81749390e332985277568edab1ee6132326b42gs regval = (emii & EPHY_REG_MASK) << EPHY_REG_SHIFT;
aa81749390e332985277568edab1ee6132326b42gs regval |= data & EPHY_DATA_MASK;
aa81749390e332985277568edab1ee6132326b42gs regval |= EPHY_ACCESS_WR_FLAG;
aa81749390e332985277568edab1ee6132326b42gs rge_reg_put32(rgep, EPHY_ACCESS_REG, regval);
aa81749390e332985277568edab1ee6132326b42gs
aa81749390e332985277568edab1ee6132326b42gs /*
aa81749390e332985277568edab1ee6132326b42gs * Waiting for PHY writing OK
aa81749390e332985277568edab1ee6132326b42gs */
aa81749390e332985277568edab1ee6132326b42gs for (i = 0; i < PHY_RESET_LOOP; i++) {
526431940871c58531fcb8622ff47caaac00f6aegs drv_usecwait(1000);
aa81749390e332985277568edab1ee6132326b42gs val32 = rge_reg_get32(rgep, EPHY_ACCESS_REG);
aa81749390e332985277568edab1ee6132326b42gs if (!(val32 & EPHY_ACCESS_WR_FLAG))
aa81749390e332985277568edab1ee6132326b42gs return;
aa81749390e332985277568edab1ee6132326b42gs }
aa81749390e332985277568edab1ee6132326b42gs RGE_REPORT((rgep, "rge_ephy_put16(0x%lx, 0x%x) fail",
aa81749390e332985277568edab1ee6132326b42gs emii, data));
aa81749390e332985277568edab1ee6132326b42gs}
aa81749390e332985277568edab1ee6132326b42gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Atomically shift a 32-bit word left, returning
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * the value it had *before* the shift was applied
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic uint32_t rge_atomic_shl32(uint32_t *sp, uint_t count);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_mii_put16)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic uint32_t
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_atomic_shl32(uint32_t *sp, uint_t count)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t oldval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t newval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* ATOMICALLY */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs do {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs oldval = *sp;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs newval = oldval << count;
75d94465dbafa487b716482dc36d5150a4ec9853Josef 'Jeff' Sipek } while (atomic_cas_32(sp, oldval, newval) != oldval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (oldval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * PHY operation routines
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#if RGE_DEBUGGING
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
22eb7cb54d8a6bcf6fe2674cb4b1f0cf2d85cfb6gdvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_phydump(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint16_t regs[32];
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs int i;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ASSERT(mutex_owned(rgep->genlock));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs for (i = 0; i < 32; ++i) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regs[i] = rge_mii_get16(rgep, i);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs for (i = 0; i < 32; i += 8)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge_phydump: "
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx "0x%04x %04x %04x %04x %04x %04x %04x %04x",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx regs[i+0], regs[i+1], regs[i+2], regs[i+3],
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx regs[i+4], regs[i+5], regs[i+6], regs[i+7]));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#endif /* RGE_DEBUGGING */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_phy_check(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint16_t gig_ctl;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (rgep->param_link_up == LINK_STATE_DOWN) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * RTL8169S/8110S PHY has the "PCS bug". Need reset PHY
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * every 15 seconds whin link down & advertise is 1000.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (rgep->chipid.phy_ver == PHY_VER_S) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs gig_ctl = rge_mii_get16(rgep, MII_1000BASE_T_CONTROL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (gig_ctl & MII_1000BT_CTL_ADV_FDX) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->link_down_count++;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (rgep->link_down_count > 15) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs (void) rge_phy_reset(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->stats.phy_reset++;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->link_down_count = 0;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs } else {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->link_down_count = 0;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Basic low-level function to reset the PHY.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Doesn't incorporate any special-case workarounds.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Returns TRUE on success, FALSE if the RESET bit doesn't clear
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsboolean_t
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_phy_reset(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint16_t control;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint_t count;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Set the PHY RESET bit, then wait up to 5 ms for it to self-clear
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs control = rge_mii_get16(rgep, MII_CONTROL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, MII_CONTROL, control | MII_CONTROL_RESET);
526431940871c58531fcb8622ff47caaac00f6aegs for (count = 0; count < 5; count++) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs drv_usecwait(100);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs control = rge_mii_get16(rgep, MII_CONTROL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (BIC(control, MII_CONTROL_RESET))
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (B_TRUE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_REPORT((rgep, "rge_phy_reset: FAILED, control now 0x%x", control));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (B_FALSE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Synchronise the PHY's speed/duplex/autonegotiation capabilities
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * and advertisements with the required settings as specified by the various
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * param_* variables that can be poked via the NDD interface.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * We always reset the PHY and reprogram *all* the relevant registers,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * not just those changed. This should cause the link to go down, and then
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * back up again once the link is stable and autonegotiation (if enabled)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * is complete. We should get a link state change interrupt somewhere along
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * the way ...
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * NOTE: <genlock> must already be held by the caller
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_phy_update(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t adv_autoneg;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t adv_pause;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t adv_asym_pause;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t adv_1000fdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t adv_1000hdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t adv_100fdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t adv_100hdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t adv_10fdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t adv_10hdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint16_t control;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint16_t gigctrl;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint16_t anar;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ASSERT(mutex_owned(rgep->genlock));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge_phy_update: autoneg %d "
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx "pause %d asym_pause %d "
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx "1000fdx %d 1000hdx %d "
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx "100fdx %d 100hdx %d "
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx "10fdx %d 10hdx %d ",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rgep->param_adv_autoneg,
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rgep->param_adv_pause, rgep->param_adv_asym_pause,
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rgep->param_adv_1000fdx, rgep->param_adv_1000hdx,
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rgep->param_adv_100fdx, rgep->param_adv_100hdx,
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rgep->param_adv_10fdx, rgep->param_adv_10hdx));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs control = gigctrl = anar = 0;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * PHY settings are normally based on the param_* variables,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * but if any loopback mode is in effect, that takes precedence.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * RGE supports MAC-internal loopback, PHY-internal loopback,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * and External loopback at a variety of speeds (with a special
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * cable). In all cases, autoneg is turned OFF, full-duplex
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * is turned ON, and the speed/mastership is forced.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (rgep->param_loop_mode) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_LOOP_NONE:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs default:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_autoneg = rgep->param_adv_autoneg;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_pause = rgep->param_adv_pause;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_asym_pause = rgep->param_adv_asym_pause;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_1000fdx = rgep->param_adv_1000fdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_1000hdx = rgep->param_adv_1000hdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_100fdx = rgep->param_adv_100fdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_100hdx = rgep->param_adv_100hdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_10fdx = rgep->param_adv_10fdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_10hdx = rgep->param_adv_10hdx;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_LOOP_INTERNAL_PHY:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_LOOP_INTERNAL_MAC:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_autoneg = adv_pause = adv_asym_pause = B_FALSE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_1000fdx = adv_100fdx = adv_10fdx = B_FALSE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_1000hdx = adv_100hdx = adv_10hdx = B_FALSE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->param_link_duplex = LINK_DUPLEX_FULL;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (rgep->param_loop_mode) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_LOOP_INTERNAL_PHY:
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx if (rgep->chipid.mac_ver != MAC_VER_8101E) {
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rgep->param_link_speed = 1000;
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_1000fdx = B_TRUE;
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx } else {
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rgep->param_link_speed = 100;
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_100fdx = B_TRUE;
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs control = MII_CONTROL_LOOPBACK;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_LOOP_INTERNAL_MAC:
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx if (rgep->chipid.mac_ver != MAC_VER_8101E) {
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rgep->param_link_speed = 1000;
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_1000fdx = B_TRUE;
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx } else {
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rgep->param_link_speed = 100;
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_100fdx = B_TRUE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge_phy_update: autoneg %d "
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx "pause %d asym_pause %d "
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx "1000fdx %d 1000hdx %d "
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx "100fdx %d 100hdx %d "
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx "10fdx %d 10hdx %d ",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_autoneg,
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_pause, adv_asym_pause,
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_1000fdx, adv_1000hdx,
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_100fdx, adv_100hdx,
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_10fdx, adv_10hdx));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * We should have at least one technology capability set;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * if not, we select a default of 1000Mb/s full-duplex
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (!adv_1000fdx && !adv_100fdx && !adv_10fdx &&
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx !adv_1000hdx && !adv_100hdx && !adv_10hdx) {
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx if (rgep->chipid.mac_ver != MAC_VER_8101E)
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_1000fdx = B_TRUE;
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx } else {
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_1000fdx = B_FALSE;
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx adv_100fdx = B_TRUE;
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx }
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Now transform the adv_* variables into the proper settings
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * of the PHY registers ...
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * If autonegotiation is (now) enabled, we want to trigger
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * a new autonegotiation cycle once the PHY has been
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * programmed with the capabilities to be advertised.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * RTL8169/8110 doesn't support 1000Mb/s half-duplex.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (adv_autoneg)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs control |= MII_CONTROL_ANE|MII_CONTROL_RSAN;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (adv_1000fdx)
bdb9230ac765cb7af3fc1f4119caf2c5720dceb3Garrett D'Amore control |= MII_CONTROL_1GB|MII_CONTROL_FDUPLEX;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs else if (adv_1000hdx)
bdb9230ac765cb7af3fc1f4119caf2c5720dceb3Garrett D'Amore control |= MII_CONTROL_1GB;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs else if (adv_100fdx)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs control |= MII_CONTROL_100MB|MII_CONTROL_FDUPLEX;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs else if (adv_100hdx)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs control |= MII_CONTROL_100MB;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs else if (adv_10fdx)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs control |= MII_CONTROL_FDUPLEX;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs else if (adv_10hdx)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs control |= 0;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs else
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs { _NOTE(EMPTY); } /* Can't get here anyway ... */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (adv_1000fdx) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs gigctrl |= MII_1000BT_CTL_ADV_FDX;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Chipset limitation: need set other capabilities to true
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
aa81749390e332985277568edab1ee6132326b42gs if (rgep->chipid.is_pcie)
aa81749390e332985277568edab1ee6132326b42gs adv_1000hdx = B_TRUE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_100fdx = B_TRUE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_100hdx = B_TRUE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_10fdx = B_TRUE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs adv_10hdx = B_TRUE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (adv_1000hdx)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs gigctrl |= MII_1000BT_CTL_ADV_HDX;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (adv_100fdx)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs anar |= MII_ABILITY_100BASE_TX_FD;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (adv_100hdx)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs anar |= MII_ABILITY_100BASE_TX;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (adv_10fdx)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs anar |= MII_ABILITY_10BASE_T_FD;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (adv_10hdx)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs anar |= MII_ABILITY_10BASE_T;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (adv_pause)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs anar |= MII_ABILITY_PAUSE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (adv_asym_pause)
bdb9230ac765cb7af3fc1f4119caf2c5720dceb3Garrett D'Amore anar |= MII_ABILITY_ASMPAUSE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Munge in any other fixed bits we require ...
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs anar |= MII_AN_SELECTOR_8023;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Restart the PHY and write the new values. Note the
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * time, so that we can say whether subsequent link state
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * changes can be attributed to our reprogramming the PHY
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_phy_init(rgep);
7f58d67b25a99a419dffb16c0ec6fb0537568c24gs if (rgep->chipid.mac_ver == MAC_VER_8168B_B ||
7f58d67b25a99a419dffb16c0ec6fb0537568c24gs rgep->chipid.mac_ver == MAC_VER_8168B_C) {
7f58d67b25a99a419dffb16c0ec6fb0537568c24gs /* power up PHY for RTL8168B chipset */
7f58d67b25a99a419dffb16c0ec6fb0537568c24gs rge_mii_put16(rgep, PHY_1F_REG, 0x0000);
7f58d67b25a99a419dffb16c0ec6fb0537568c24gs rge_mii_put16(rgep, PHY_0E_REG, 0x0000);
7f58d67b25a99a419dffb16c0ec6fb0537568c24gs rge_mii_put16(rgep, PHY_1F_REG, 0x0000);
7f58d67b25a99a419dffb16c0ec6fb0537568c24gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, MII_AN_ADVERT, anar);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, MII_1000BASE_T_CONTROL, gigctrl);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, MII_CONTROL, control);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge_phy_update: anar <- 0x%x", anar));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge_phy_update: control <- 0x%x", control));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge_phy_update: gigctrl <- 0x%x", gigctrl));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid rge_phy_init(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_phy_init)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_phy_init(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->phy_mii_addr = 1;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Below phy config steps are copied from the Programming Guide
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * (there's no detail comments for these steps.)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
aa81749390e332985277568edab1ee6132326b42gs switch (rgep->chipid.mac_ver) {
aa81749390e332985277568edab1ee6132326b42gs case MAC_VER_8169S_D:
aa81749390e332985277568edab1ee6132326b42gs case MAC_VER_8169S_E :
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_1F_REG, 0x0001);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_15_REG, 0x1000);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_18_REG, 0x65c7);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0x0000);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_ID_REG_2, 0x00a1);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_ID_REG_1, 0x0008);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_BMSR_REG, 0x1020);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_BMCR_REG, 0x1000);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0x0800);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0x0000);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0x7000);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_ID_REG_2, 0xff41);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_ID_REG_1, 0xde60);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_BMSR_REG, 0x0140);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_BMCR_REG, 0x0077);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0x7800);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0x7000);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0xa000);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_ID_REG_2, 0xdf01);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_ID_REG_1, 0xdf20);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_BMSR_REG, 0xff95);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_BMCR_REG, 0xfa00);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0xa800);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0xa000);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0xb000);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_ID_REG_2, 0xff41);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_ID_REG_1, 0xde20);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_BMSR_REG, 0x0140);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_BMCR_REG, 0x00bb);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0xb800);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0xb000);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0xf000);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_ID_REG_2, 0xdf01);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_ID_REG_1, 0xdf20);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_BMSR_REG, 0xff95);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_BMCR_REG, 0xbf00);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0xf800);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0xf000);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANAR_REG, 0x0000);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_1F_REG, 0x0000);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_0B_REG, 0x0000);
aa81749390e332985277568edab1ee6132326b42gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
aa81749390e332985277568edab1ee6132326b42gs case MAC_VER_8169SB:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_1F_REG, 0x0001);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_1B_REG, 0xD41E);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_0E_REG, 0x7bff);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_GBCR_REG, GBCR_DEFAULT);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_1F_REG, 0x0002);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_BMSR_REG, 0x90D0);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, PHY_1F_REG, 0x0000);
aa81749390e332985277568edab1ee6132326b42gs break;
aa81749390e332985277568edab1ee6132326b42gs
526431940871c58531fcb8622ff47caaac00f6aegs case MAC_VER_8169SC:
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_1F_REG, 0x0001);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_ANER_REG, 0x0078);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_ANNPRR_REG, 0x05dc);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_GBCR_REG, 0x2672);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_GBSR_REG, 0x6a14);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_0B_REG, 0x7cb0);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_0C_REG, 0xdb80);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_1B_REG, 0xc414);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_1C_REG, 0xef03);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_1D_REG, 0x3dc8);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_1F_REG, 0x0003);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_13_REG, 0x0600);
526431940871c58531fcb8622ff47caaac00f6aegs rge_mii_put16(rgep, PHY_1F_REG, 0x0000);
526431940871c58531fcb8622ff47caaac00f6aegs break;
526431940871c58531fcb8622ff47caaac00f6aegs
aa81749390e332985277568edab1ee6132326b42gs case MAC_VER_8168:
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_1F_REG, 0x0001);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANER_REG, 0x00aa);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANNPTR_REG, 0x3173);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANNPRR_REG, 0x08fc);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_GBCR_REG, 0xe2d0);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_0B_REG, 0x941a);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_18_REG, 0x65fe);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_1C_REG, 0x1e02);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_1F_REG, 0x0002);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_ANNPTR_REG, 0x103e);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_1F_REG, 0x0000);
aa81749390e332985277568edab1ee6132326b42gs break;
aa81749390e332985277568edab1ee6132326b42gs
aa81749390e332985277568edab1ee6132326b42gs case MAC_VER_8168B_B:
aa81749390e332985277568edab1ee6132326b42gs case MAC_VER_8168B_C:
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_1F_REG, 0x0001);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_0B_REG, 0x94b0);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_1B_REG, 0xc416);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_1F_REG, 0x0003);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_12_REG, 0x6096);
aa81749390e332985277568edab1ee6132326b42gs rge_mii_put16(rgep, PHY_1F_REG, 0x0000);
aa81749390e332985277568edab1ee6132326b42gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid rge_chip_ident(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_ident)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_ident(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs chip_id_t *chip = &rgep->chipid;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t val32;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint16_t val16;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
aa81749390e332985277568edab1ee6132326b42gs /*
aa81749390e332985277568edab1ee6132326b42gs * Read and record MAC version
aa81749390e332985277568edab1ee6132326b42gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rge_reg_get32(rgep, TX_CONFIG_REG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 &= HW_VERSION_ID_0 | HW_VERSION_ID_1;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs chip->mac_ver = val32;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China chip->is_pcie = pci_lcap_locate(rgep->cfg_handle,
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China PCI_CAP_ID_PCI_E, &val16) == DDI_SUCCESS;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
5ca61e50c68a7a60dc35cd76831471faa4974d71Li-Zhen You /*
5ca61e50c68a7a60dc35cd76831471faa4974d71Li-Zhen You * Workaround for 8101E_C
5ca61e50c68a7a60dc35cd76831471faa4974d71Li-Zhen You */
0b758ccb089b0acb5d2aaef246c2f29285db8c13Alexander Eremin chip->enable_mac_first = !chip->is_pcie;
5ca61e50c68a7a60dc35cd76831471faa4974d71Li-Zhen You if (chip->mac_ver == MAC_VER_8101E_C) {
5ca61e50c68a7a60dc35cd76831471faa4974d71Li-Zhen You chip->is_pcie = B_FALSE;
5ca61e50c68a7a60dc35cd76831471faa4974d71Li-Zhen You }
5ca61e50c68a7a60dc35cd76831471faa4974d71Li-Zhen You
aa81749390e332985277568edab1ee6132326b42gs /*
aa81749390e332985277568edab1ee6132326b42gs * Read and record PHY version
aa81749390e332985277568edab1ee6132326b42gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val16 = rge_mii_get16(rgep, PHY_ID_REG_2);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val16 &= PHY_VER_MASK;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs chip->phy_ver = val16;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
aa81749390e332985277568edab1ee6132326b42gs /* set pci latency timer */
aa81749390e332985277568edab1ee6132326b42gs if (chip->mac_ver == MAC_VER_8169 ||
526431940871c58531fcb8622ff47caaac00f6aegs chip->mac_ver == MAC_VER_8169S_D ||
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China chip->mac_ver == MAC_VER_8169S_E ||
526431940871c58531fcb8622ff47caaac00f6aegs chip->mac_ver == MAC_VER_8169SC)
aa81749390e332985277568edab1ee6132326b42gs pci_config_put8(rgep->cfg_handle, PCI_CONF_LATENCY_TIMER, 0x40);
aa81749390e332985277568edab1ee6132326b42gs
526431940871c58531fcb8622ff47caaac00f6aegs if (chip->mac_ver == MAC_VER_8169SC) {
526431940871c58531fcb8622ff47caaac00f6aegs val16 = rge_reg_get16(rgep, RT_CONFIG_1_REG);
526431940871c58531fcb8622ff47caaac00f6aegs val16 &= 0x0300;
526431940871c58531fcb8622ff47caaac00f6aegs if (val16 == 0x1) /* 66Mhz PCI */
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China rge_reg_put32(rgep, 0x7c, 0x000700ff);
526431940871c58531fcb8622ff47caaac00f6aegs else if (val16 == 0x0) /* 33Mhz PCI */
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China rge_reg_put32(rgep, 0x7c, 0x0007ff00);
526431940871c58531fcb8622ff47caaac00f6aegs }
526431940871c58531fcb8622ff47caaac00f6aegs
aa81749390e332985277568edab1ee6132326b42gs /*
aa81749390e332985277568edab1ee6132326b42gs * PCIE chipset require the Rx buffer start address must be
aa81749390e332985277568edab1ee6132326b42gs * 8-byte alignment and the Rx buffer size must be multiple of 8.
aa81749390e332985277568edab1ee6132326b42gs * We'll just use bcopy in receive procedure for the PCIE chipset.
aa81749390e332985277568edab1ee6132326b42gs */
aa81749390e332985277568edab1ee6132326b42gs if (chip->is_pcie) {
aa81749390e332985277568edab1ee6132326b42gs rgep->chip_flags |= CHIP_FLAG_FORCE_BCOPY;
aa81749390e332985277568edab1ee6132326b42gs if (rgep->default_mtu > ETHERMTU) {
aa81749390e332985277568edab1ee6132326b42gs rge_notice(rgep, "Jumbo packets not supported "
aa81749390e332985277568edab1ee6132326b42gs "for this PCIE chipset");
aa81749390e332985277568edab1ee6132326b42gs rgep->default_mtu = ETHERMTU;
aa81749390e332985277568edab1ee6132326b42gs }
aa81749390e332985277568edab1ee6132326b42gs }
aa81749390e332985277568edab1ee6132326b42gs if (rgep->chip_flags & CHIP_FLAG_FORCE_BCOPY)
aa81749390e332985277568edab1ee6132326b42gs rgep->head_room = 0;
aa81749390e332985277568edab1ee6132326b42gs else
aa81749390e332985277568edab1ee6132326b42gs rgep->head_room = RGE_HEADROOM;
aa81749390e332985277568edab1ee6132326b42gs
aa81749390e332985277568edab1ee6132326b42gs /*
aa81749390e332985277568edab1ee6132326b42gs * Initialize other variables.
aa81749390e332985277568edab1ee6132326b42gs */
aa81749390e332985277568edab1ee6132326b42gs if (rgep->default_mtu < ETHERMTU || rgep->default_mtu > RGE_JUMBO_MTU)
aa81749390e332985277568edab1ee6132326b42gs rgep->default_mtu = ETHERMTU;
aa81749390e332985277568edab1ee6132326b42gs if (rgep->default_mtu > ETHERMTU) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->rxbuf_size = RGE_BUFF_SIZE_JUMBO;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->txbuf_size = RGE_BUFF_SIZE_JUMBO;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->ethmax_size = RGE_JUMBO_SIZE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs } else {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->rxbuf_size = RGE_BUFF_SIZE_STD;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->txbuf_size = RGE_BUFF_SIZE_STD;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->ethmax_size = ETHERMAX;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs chip->rxconfig = RX_CONFIG_DEFAULT;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs chip->txconfig = TX_CONFIG_DEFAULT;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /* interval to update statistics for polling mode */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->tick_delta = drv_usectohz(1000*1000/CLK_TICK);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /* ensure we are not in polling mode */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->curr_tick = ddi_get_lbolt() - 2*rgep->tick_delta;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("%s: MAC version = %x, PHY version = %x",
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->ifname, chip->mac_ver, chip->phy_ver));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Perform first-stage chip (re-)initialisation, using only config-space
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * accesses:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * + Read the vendor/device/revision/subsystem/cache-line-size registers,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * returning the data in the structure pointed to by <idp>.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * + Enable Memory Space accesses.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * + Enable Bus Mastering according.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid rge_chip_cfg_init(rge_t *rgep, chip_id_t *cidp);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_cfg_init)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_cfg_init(rge_t *rgep, chip_id_t *cidp)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ddi_acc_handle_t handle;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint16_t commd;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs handle = rgep->cfg_handle;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Save PCI cache line size and subsystem vendor ID
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs cidp->command = pci_config_get16(handle, PCI_CONF_COMM);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs cidp->vendor = pci_config_get16(handle, PCI_CONF_VENID);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs cidp->device = pci_config_get16(handle, PCI_CONF_DEVID);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs cidp->subven = pci_config_get16(handle, PCI_CONF_SUBVENID);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs cidp->subdev = pci_config_get16(handle, PCI_CONF_SUBSYSID);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs cidp->revision = pci_config_get8(handle, PCI_CONF_REVID);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs cidp->clsize = pci_config_get8(handle, PCI_CONF_CACHE_LINESZ);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs cidp->latency = pci_config_get8(handle, PCI_CONF_LATENCY_TIMER);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Turn on Master Enable (DMA) and IO Enable bits.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Enable PCI Memory Space accesses
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs commd = cidp->command;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs commd |= PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_IO;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs pci_config_put16(handle, PCI_CONF_COMM, commd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge_chip_cfg_init: vendor 0x%x device 0x%x revision 0x%x",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx cidp->vendor, cidp->device, cidp->revision));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge_chip_cfg_init: subven 0x%x subdev 0x%x",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx cidp->subven, cidp->subdev));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge_chip_cfg_init: clsize %d latency %d command 0x%x",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx cidp->clsize, cidp->latency, cidp->command));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsint rge_chip_reset(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_reset)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsint
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_reset(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs int i;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint8_t val8;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Chip should be in STOP state
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_clr8(rgep, RT_COMMAND_REG,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RT_COMMAND_RX_ENABLE | RT_COMMAND_TX_ENABLE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Disable interrupt
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->int_mask = INT_MASK_NONE;
aa81749390e332985277568edab1ee6132326b42gs rge_reg_put16(rgep, INT_MASK_REG, rgep->int_mask);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Clear pended interrupt
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put16(rgep, INT_STATUS_REG, INT_MASK_ALL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Reset chip
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_set8(rgep, RT_COMMAND_REG, RT_COMMAND_RESET);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Wait for reset success
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs for (i = 0; i < CHIP_RESET_LOOP; i++) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs drv_usecwait(10);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val8 = rge_reg_get8(rgep, RT_COMMAND_REG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (!(val8 & RT_COMMAND_RESET)) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->rge_chip_state = RGE_CHIP_RESET;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (0);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_REPORT((rgep, "rge_chip_reset fail."));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (-1);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid rge_chip_init(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_init)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_init(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t val32;
aa81749390e332985277568edab1ee6132326b42gs uint32_t val16;
aa81749390e332985277568edab1ee6132326b42gs uint32_t *hashp;
aa81749390e332985277568edab1ee6132326b42gs chip_id_t *chip = &rgep->chipid;
aa81749390e332985277568edab1ee6132326b42gs
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /*
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China * Increase the threshold voltage of RX sensitivity
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (chip->mac_ver == MAC_VER_8168B_B ||
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China chip->mac_ver == MAC_VER_8168B_C ||
5ca61e50c68a7a60dc35cd76831471faa4974d71Li-Zhen You chip->mac_ver == MAC_VER_8101E) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_ephy_put16(rgep, 0x01, 0x1bd3);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
aa81749390e332985277568edab1ee6132326b42gs
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (chip->mac_ver == MAC_VER_8168 ||
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China chip->mac_ver == MAC_VER_8168B_B) {
aa81749390e332985277568edab1ee6132326b42gs val16 = rge_reg_get8(rgep, PHY_STATUS_REG);
aa81749390e332985277568edab1ee6132326b42gs val16 = 0x12<<8 | val16;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_reg_put16(rgep, PHY_STATUS_REG, val16);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_reg_put32(rgep, RT_CSI_DATA_REG, 0x00021c01);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_reg_put32(rgep, RT_CSI_ACCESS_REG, 0x8000f088);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_reg_put32(rgep, RT_CSI_DATA_REG, 0x00004000);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_reg_put32(rgep, RT_CSI_ACCESS_REG, 0x8000f0b0);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_reg_put32(rgep, RT_CSI_ACCESS_REG, 0x0000f068);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China val32 = rge_reg_get32(rgep, RT_CSI_DATA_REG);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China val32 |= 0x7000;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China val32 &= 0xffff5fff;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_reg_put32(rgep, RT_CSI_DATA_REG, val32);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_reg_put32(rgep, RT_CSI_ACCESS_REG, 0x8000f068);
aa81749390e332985277568edab1ee6132326b42gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Config MII register
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->param_link_up = LINK_STATE_DOWN;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_phy_update(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Enable Rx checksum offload.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Then for vlan support, we must enable receive vlan de-tagging.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Otherwise, there'll be checksum error.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
aa81749390e332985277568edab1ee6132326b42gs val16 = rge_reg_get16(rgep, CPLUS_COMMAND_REG);
aa81749390e332985277568edab1ee6132326b42gs val16 |= RX_CKSM_OFFLOAD | RX_VLAN_DETAG;
aa81749390e332985277568edab1ee6132326b42gs if (chip->mac_ver == MAC_VER_8169S_D) {
aa81749390e332985277568edab1ee6132326b42gs val16 |= CPLUS_BIT14 | MUL_PCI_RW_ENABLE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put8(rgep, RESV_82_REG, 0x01);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China if (chip->mac_ver == MAC_VER_8169S_E ||
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China chip->mac_ver == MAC_VER_8169SC) {
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China val16 |= MUL_PCI_RW_ENABLE;
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China }
aa81749390e332985277568edab1ee6132326b42gs rge_reg_put16(rgep, CPLUS_COMMAND_REG, val16 & (~0x03));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Start transmit/receive before set tx/rx configuration register
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
0b758ccb089b0acb5d2aaef246c2f29285db8c13Alexander Eremin if (chip->enable_mac_first)
aa81749390e332985277568edab1ee6132326b42gs rge_reg_set8(rgep, RT_COMMAND_REG,
aa81749390e332985277568edab1ee6132326b42gs RT_COMMAND_RX_ENABLE | RT_COMMAND_TX_ENABLE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Set dump tally counter register
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rgep->dma_area_stats.cookie.dmac_laddress >> 32;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, DUMP_COUNTER_REG_1, val32);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rge_reg_get32(rgep, DUMP_COUNTER_REG_0);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 &= DUMP_COUNTER_REG_RESV;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 |= rgep->dma_area_stats.cookie.dmac_laddress;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, DUMP_COUNTER_REG_0, val32);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Change to config register write enable mode
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_set8(rgep, RT_93c46_COMMOND_REG, RT_93c46_MODE_CONFIG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Set Tx/Rx maximum packet size
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
aa81749390e332985277568edab1ee6132326b42gs if (rgep->default_mtu > ETHERMTU) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put8(rgep, TX_MAX_PKTSIZE_REG, TX_PKTSIZE_JUMBO);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put16(rgep, RX_MAX_PKTSIZE_REG, RX_PKTSIZE_JUMBO);
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx } else if (rgep->chipid.mac_ver != MAC_VER_8101E) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put8(rgep, TX_MAX_PKTSIZE_REG, TX_PKTSIZE_STD);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put16(rgep, RX_MAX_PKTSIZE_REG, RX_PKTSIZE_STD);
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx } else {
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rge_reg_put8(rgep, TX_MAX_PKTSIZE_REG, TX_PKTSIZE_STD_8101E);
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rge_reg_put16(rgep, RX_MAX_PKTSIZE_REG, RX_PKTSIZE_STD_8101E);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Set receive configuration register
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rge_reg_get32(rgep, RX_CONFIG_REG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 &= RX_CONFIG_REG_RESV;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (rgep->promisc)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 |= RX_ACCEPT_ALL_PKT;
aa81749390e332985277568edab1ee6132326b42gs rge_reg_put32(rgep, RX_CONFIG_REG, val32 | chip->rxconfig);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Set transmit configuration register
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rge_reg_get32(rgep, TX_CONFIG_REG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 &= TX_CONFIG_REG_RESV;
aa81749390e332985277568edab1ee6132326b42gs rge_reg_put32(rgep, TX_CONFIG_REG, val32 | chip->txconfig);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Set Tx/Rx descriptor register
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rgep->tx_desc.cookie.dmac_laddress;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, NORMAL_TX_RING_ADDR_LO_REG, val32);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rgep->tx_desc.cookie.dmac_laddress >> 32;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, NORMAL_TX_RING_ADDR_HI_REG, val32);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, HIGH_TX_RING_ADDR_LO_REG, 0);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, HIGH_TX_RING_ADDR_HI_REG, 0);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rgep->rx_desc.cookie.dmac_laddress;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, RX_RING_ADDR_LO_REG, val32);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rgep->rx_desc.cookie.dmac_laddress >> 32;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, RX_RING_ADDR_HI_REG, val32);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Suggested setting from Realtek
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx if (rgep->chipid.mac_ver != MAC_VER_8101E)
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rge_reg_put16(rgep, RESV_E2_REG, 0x282a);
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx else
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx rge_reg_put16(rgep, RESV_E2_REG, 0x0000);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Set multicast register
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
aa81749390e332985277568edab1ee6132326b42gs hashp = (uint32_t *)rgep->mcast_hash;
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF if (rgep->promisc) {
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF rge_reg_put32(rgep, MULTICAST_0_REG, ~0U);
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF rge_reg_put32(rgep, MULTICAST_4_REG, ~0U);
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF } else {
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF rge_reg_put32(rgep, MULTICAST_0_REG, RGE_BSWAP_32(hashp[0]));
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF rge_reg_put32(rgep, MULTICAST_4_REG, RGE_BSWAP_32(hashp[1]));
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Msic register setting:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * -- Missed packet counter: clear it
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * -- TimerInt Register
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * -- Timer count register
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, RX_PKT_MISS_COUNT_REG, 0);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, TIMER_INT_REG, TIMER_INT_NONE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, TIMER_COUNT_REG, 0);
526431940871c58531fcb8622ff47caaac00f6aegs
368a5ef88e8811b10e03b912242c0faef12ce713Miles Xu, Sun Microsystems /*
368a5ef88e8811b10e03b912242c0faef12ce713Miles Xu, Sun Microsystems * disable the Unicast Wakeup Frame capability
368a5ef88e8811b10e03b912242c0faef12ce713Miles Xu, Sun Microsystems */
368a5ef88e8811b10e03b912242c0faef12ce713Miles Xu, Sun Microsystems rge_reg_clr8(rgep, RT_CONFIG_5_REG, RT_UNI_WAKE_FRAME);
368a5ef88e8811b10e03b912242c0faef12ce713Miles Xu, Sun Microsystems
526431940871c58531fcb8622ff47caaac00f6aegs /*
526431940871c58531fcb8622ff47caaac00f6aegs * Return to normal network/host communication mode
526431940871c58531fcb8622ff47caaac00f6aegs */
526431940871c58531fcb8622ff47caaac00f6aegs rge_reg_clr8(rgep, RT_93c46_COMMOND_REG, RT_93c46_MODE_CONFIG);
526431940871c58531fcb8622ff47caaac00f6aegs drv_usecwait(20);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * rge_chip_start() -- start the chip transmitting and/or receiving,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * including enabling interrupts
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid rge_chip_start(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_start)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_start(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Clear statistics
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs bzero(&rgep->stats, sizeof (rge_stats_t));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs DMA_ZERO(rgep->dma_area_stats);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Start transmit/receive
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_set8(rgep, RT_COMMAND_REG,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RT_COMMAND_RX_ENABLE | RT_COMMAND_TX_ENABLE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Enable interrupt
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->int_mask = RGE_INT_MASK;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (rgep->chipid.is_pcie) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->int_mask |= NO_TXDESC_INT;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China rgep->rx_fifo_ovf = 0;
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China rgep->int_mask |= RX_FIFO_OVERFLOW_INT;
aa81749390e332985277568edab1ee6132326b42gs rge_reg_put16(rgep, INT_MASK_REG, rgep->int_mask);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * All done!
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->rge_chip_state = RGE_CHIP_RUNNING;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * rge_chip_stop() -- stop board receiving
193974072f41a843678abf5f61979c748687e66bSherry Moore *
193974072f41a843678abf5f61979c748687e66bSherry Moore * Since this function is also invoked by rge_quiesce(), it
193974072f41a843678abf5f61979c748687e66bSherry Moore * must not block; also, no tracing or logging takes place
193974072f41a843678abf5f61979c748687e66bSherry Moore * when invoked by rge_quiesce().
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid rge_chip_stop(rge_t *rgep, boolean_t fault);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_stop)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_stop(rge_t *rgep, boolean_t fault)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Disable interrupt
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->int_mask = INT_MASK_NONE;
aa81749390e332985277568edab1ee6132326b42gs rge_reg_put16(rgep, INT_MASK_REG, rgep->int_mask);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Clear pended interrupt
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
343c26163d86b7f3b861ae03b20226fecee1ab99mx if (!rgep->suspended) {
343c26163d86b7f3b861ae03b20226fecee1ab99mx rge_reg_put16(rgep, INT_STATUS_REG, INT_MASK_ALL);
343c26163d86b7f3b861ae03b20226fecee1ab99mx }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Stop the board and disable transmit/receive
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_clr8(rgep, RT_COMMAND_REG,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RT_COMMAND_RX_ENABLE | RT_COMMAND_TX_ENABLE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (fault)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->rge_chip_state = RGE_CHIP_FAULT;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs else
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->rge_chip_state = RGE_CHIP_STOPPED;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * rge_get_mac_addr() -- get the MAC address on NIC
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_get_mac_addr(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_get_mac_addr)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_get_mac_addr(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint8_t *macaddr = rgep->netaddr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t val32;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Read first 4-byte of mac address
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rge_reg_get32(rgep, ID_0_REG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs macaddr[0] = val32 & 0xff;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = val32 >> 8;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs macaddr[1] = val32 & 0xff;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = val32 >> 8;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs macaddr[2] = val32 & 0xff;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = val32 >> 8;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs macaddr[3] = val32 & 0xff;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Read last 2-byte of mac address
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = rge_reg_get32(rgep, ID_4_REG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs macaddr[4] = val32 & 0xff;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = val32 >> 8;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs macaddr[5] = val32 & 0xff;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_set_mac_addr(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_set_mac_addr)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_set_mac_addr(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint8_t *p = rgep->netaddr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t val32;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Change to config register write enable mode
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_set8(rgep, RT_93c46_COMMOND_REG, RT_93c46_MODE_CONFIG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Get first 4 bytes of mac address
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = p[3];
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = val32 << 8;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 |= p[2];
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = val32 << 8;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 |= p[1];
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = val32 << 8;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 |= p[0];
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Set first 4 bytes of mac address
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, ID_0_REG, val32);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Get last 2 bytes of mac address
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = p[5];
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 = val32 << 8;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 |= p[4];
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Set last 2 bytes of mac address
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs val32 |= rge_reg_get32(rgep, ID_4_REG) & ~0xffff;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put32(rgep, ID_4_REG, val32);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Return to normal network/host communication mode
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_clr8(rgep, RT_93c46_COMMOND_REG, RT_93c46_MODE_CONFIG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_set_multi_addr(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_set_multi_addr)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_set_multi_addr(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t *hashp;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
aa81749390e332985277568edab1ee6132326b42gs hashp = (uint32_t *)rgep->mcast_hash;
526431940871c58531fcb8622ff47caaac00f6aegs
526431940871c58531fcb8622ff47caaac00f6aegs /*
526431940871c58531fcb8622ff47caaac00f6aegs * Change to config register write enable mode
526431940871c58531fcb8622ff47caaac00f6aegs */
368a5ef88e8811b10e03b912242c0faef12ce713Miles Xu, Sun Microsystems if (rgep->chipid.mac_ver == MAC_VER_8169SC) {
526431940871c58531fcb8622ff47caaac00f6aegs rge_reg_set8(rgep, RT_93c46_COMMOND_REG, RT_93c46_MODE_CONFIG);
368a5ef88e8811b10e03b912242c0faef12ce713Miles Xu, Sun Microsystems }
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF if (rgep->promisc) {
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF rge_reg_put32(rgep, MULTICAST_0_REG, ~0U);
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF rge_reg_put32(rgep, MULTICAST_4_REG, ~0U);
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF } else {
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF rge_reg_put32(rgep, MULTICAST_0_REG, RGE_BSWAP_32(hashp[0]));
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF rge_reg_put32(rgep, MULTICAST_4_REG, RGE_BSWAP_32(hashp[1]));
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF }
526431940871c58531fcb8622ff47caaac00f6aegs
526431940871c58531fcb8622ff47caaac00f6aegs /*
526431940871c58531fcb8622ff47caaac00f6aegs * Return to normal network/host communication mode
526431940871c58531fcb8622ff47caaac00f6aegs */
368a5ef88e8811b10e03b912242c0faef12ce713Miles Xu, Sun Microsystems if (rgep->chipid.mac_ver == MAC_VER_8169SC) {
526431940871c58531fcb8622ff47caaac00f6aegs rge_reg_clr8(rgep, RT_93c46_COMMOND_REG, RT_93c46_MODE_CONFIG);
368a5ef88e8811b10e03b912242c0faef12ce713Miles Xu, Sun Microsystems }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_set_promisc(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_set_promisc)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_set_promisc(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (rgep->promisc)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_set32(rgep, RX_CONFIG_REG, RX_ACCEPT_ALL_PKT);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs else
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_clr32(rgep, RX_CONFIG_REG, RX_ACCEPT_ALL_PKT);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * rge_chip_sync() -- program the chip with the unicast MAC address,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * the multicast hash table, the required level of promiscuity, and
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * the current loopback mode ...
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid rge_chip_sync(rge_t *rgep, enum rge_sync_op todo);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_sync)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_sync(rge_t *rgep, enum rge_sync_op todo)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (todo) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_GET_MAC:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_get_mac_addr(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_SET_MAC:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* Reprogram the unicast MAC address(es) ... */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_set_mac_addr(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_SET_MUL:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* Reprogram the hashed multicast address table ... */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_set_multi_addr(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_SET_PROMISC:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* Set or clear the PROMISCUOUS mode bit */
5927ab2b3c9b313d37a3417c6a5571fdf191b693KHF rge_set_multi_addr(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_set_promisc(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs default:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
da14cebe459d3275048785f25bd869cb09b5307fEric Chengvoid rge_chip_blank(void *arg, time_t ticks, uint_t count, int flag);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_blank)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng/* ARGSUSED */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
da14cebe459d3275048785f25bd869cb09b5307fEric Chengrge_chip_blank(void *arg, time_t ticks, uint_t count, int flag)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs _NOTE(ARGUNUSED(arg, ticks, count));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid rge_tx_trigger(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_tx_trigger)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_tx_trigger(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_reg_put8(rgep, TX_RINGS_POLL_REG, NORMAL_TX_RING_POLL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid rge_hw_stats_dump(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_tx_trigger)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_hw_stats_dump(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs int i = 0;
4bb4f326b9248e14f38bc18d91e54b7c70223f64Li-Zhen You uint32_t regval = 0;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
4bb4f326b9248e14f38bc18d91e54b7c70223f64Li-Zhen You if (rgep->rge_mac_state == RGE_MAC_STOPPED)
4bb4f326b9248e14f38bc18d91e54b7c70223f64Li-Zhen You return;
4bb4f326b9248e14f38bc18d91e54b7c70223f64Li-Zhen You
4bb4f326b9248e14f38bc18d91e54b7c70223f64Li-Zhen You regval = rge_reg_get32(rgep, DUMP_COUNTER_REG_0);
4bb4f326b9248e14f38bc18d91e54b7c70223f64Li-Zhen You while (regval & DUMP_START) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs drv_usecwait(100);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (++i > STATS_DUMP_LOOP) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge h/w statistics dump fail!"));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->rge_chip_state = RGE_CHIP_ERROR;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
4bb4f326b9248e14f38bc18d91e54b7c70223f64Li-Zhen You regval = rge_reg_get32(rgep, DUMP_COUNTER_REG_0);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs DMA_SYNC(rgep->dma_area_stats, DDI_DMA_SYNC_FORKERNEL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Start H/W statistics dump for RTL8169 chip
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_set32(rgep, DUMP_COUNTER_REG_0, DUMP_START);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * ========== Hardware interrupt handler ==========
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#undef RGE_DBG
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#define RGE_DBG RGE_DBG_INT /* debug flag for this code */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_wake_factotum(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma inline(rge_wake_factotum)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_wake_factotum(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (rgep->factotum_flag == 0) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->factotum_flag = 1;
aa81749390e332985277568edab1ee6132326b42gs (void) ddi_intr_trigger_softint(rgep->factotum_hdl, NULL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * rge_intr() -- handle chip interrupts
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
aa81749390e332985277568edab1ee6132326b42gsuint_t rge_intr(caddr_t arg1, caddr_t arg2);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_intr)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsuint_t
aa81749390e332985277568edab1ee6132326b42gsrge_intr(caddr_t arg1, caddr_t arg2)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
aa81749390e332985277568edab1ee6132326b42gs rge_t *rgep = (rge_t *)arg1;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint16_t int_status;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China clock_t now;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China uint32_t tx_pkts;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China uint32_t rx_pkts;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China uint32_t poll_rate;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China uint32_t opt_pkts;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China uint32_t opt_intrs;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China boolean_t update_int_mask = B_FALSE;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China uint32_t itimer;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
aa81749390e332985277568edab1ee6132326b42gs _NOTE(ARGUNUSED(arg2))
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
aa81749390e332985277568edab1ee6132326b42gs mutex_enter(rgep->genlock);
343c26163d86b7f3b861ae03b20226fecee1ab99mx
343c26163d86b7f3b861ae03b20226fecee1ab99mx if (rgep->suspended) {
343c26163d86b7f3b861ae03b20226fecee1ab99mx mutex_exit(rgep->genlock);
343c26163d86b7f3b861ae03b20226fecee1ab99mx return (DDI_INTR_UNCLAIMED);
343c26163d86b7f3b861ae03b20226fecee1ab99mx }
343c26163d86b7f3b861ae03b20226fecee1ab99mx
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Was this interrupt caused by our device...
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs int_status = rge_reg_get16(rgep, INT_STATUS_REG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (!(int_status & rgep->int_mask)) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs mutex_exit(rgep->genlock);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (DDI_INTR_UNCLAIMED);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* indicate it wasn't our interrupt */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->stats.intr++;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Clear interrupt
aa81749390e332985277568edab1ee6132326b42gs * For PCIE chipset, we need disable interrupt first.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (rgep->chipid.is_pcie) {
aa81749390e332985277568edab1ee6132326b42gs rge_reg_put16(rgep, INT_MASK_REG, INT_MASK_NONE);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China update_int_mask = B_TRUE;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_reg_put16(rgep, INT_STATUS_REG, int_status);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /*
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China * Calculate optimal polling interval
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China now = ddi_get_lbolt();
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (now - rgep->curr_tick >= rgep->tick_delta &&
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China (rgep->param_link_speed == RGE_SPEED_1000M ||
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->param_link_speed == RGE_SPEED_100M)) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /* number of rx and tx packets in the last tick */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China tx_pkts = rgep->stats.opackets - rgep->last_opackets;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rx_pkts = rgep->stats.rpackets - rgep->last_rpackets;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->last_opackets = rgep->stats.opackets;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->last_rpackets = rgep->stats.rpackets;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /* restore interrupt mask */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->int_mask |= TX_OK_INT | RX_OK_INT;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (rgep->chipid.is_pcie) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->int_mask |= NO_TXDESC_INT;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /* optimal number of packets in a tick */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (rgep->param_link_speed == RGE_SPEED_1000M) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China opt_pkts = (1000*1000*1000/8)/ETHERMTU/CLK_TICK;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China } else {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China opt_pkts = (100*1000*1000/8)/ETHERMTU/CLK_TICK;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /*
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China * calculate polling interval based on rx and tx packets
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China * in the last tick
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China poll_rate = 0;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (now - rgep->curr_tick < 2*rgep->tick_delta) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China opt_intrs = opt_pkts/TX_COALESC;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (tx_pkts > opt_intrs) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China poll_rate = max(tx_pkts/TX_COALESC, opt_intrs);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->int_mask &= ~(TX_OK_INT | NO_TXDESC_INT);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China opt_intrs = opt_pkts/RX_COALESC;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (rx_pkts > opt_intrs) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China opt_intrs = max(rx_pkts/RX_COALESC, opt_intrs);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China poll_rate = max(opt_intrs, poll_rate);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->int_mask &= ~RX_OK_INT;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /* ensure poll_rate reasonable */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China poll_rate = min(poll_rate, opt_pkts*4);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (poll_rate) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /* move to polling mode */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (rgep->chipid.is_pcie) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China itimer = (TIMER_CLK_PCIE/CLK_TICK)/poll_rate;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China } else {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China itimer = (TIMER_CLK_PCI/CLK_TICK)/poll_rate;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China } else {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /* move to normal mode */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China itimer = 0;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China RGE_DEBUG(("%s: poll: itimer:%d int_mask:0x%x",
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China __func__, itimer, rgep->int_mask));
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_reg_put32(rgep, TIMER_INT_REG, itimer);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /* update timestamp for statistics */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->curr_tick = now;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /* reset timer */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China int_status |= TIME_OUT_INT;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China update_int_mask = B_TRUE;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (int_status & TIME_OUT_INT) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rge_reg_put32(rgep, TIMER_COUNT_REG, 0);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /* flush post writes */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China (void) rge_reg_get16(rgep, INT_STATUS_REG);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Cable link change interrupt
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (int_status & LINK_CHANGE_INT) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_chip_cyclic(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
aa81749390e332985277568edab1ee6132326b42gs
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China if (int_status & RX_FIFO_OVERFLOW_INT) {
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China /* start rx watchdog timeout detection */
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China rgep->rx_fifo_ovf = 1;
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China if (rgep->int_mask & RX_FIFO_OVERFLOW_INT) {
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China rgep->int_mask &= ~RX_FIFO_OVERFLOW_INT;
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China update_int_mask = B_TRUE;
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China }
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China } else if (int_status & RGE_RX_INT) {
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China /* stop rx watchdog timeout detection */
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China rgep->rx_fifo_ovf = 0;
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China if ((rgep->int_mask & RX_FIFO_OVERFLOW_INT) == 0) {
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China rgep->int_mask |= RX_FIFO_OVERFLOW_INT;
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China update_int_mask = B_TRUE;
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China }
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China }
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs mutex_exit(rgep->genlock);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Receive interrupt
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
aa81749390e332985277568edab1ee6132326b42gs if (int_status & RGE_RX_INT)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_receive(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
aa81749390e332985277568edab1ee6132326b42gs /*
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China * Transmit interrupt
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (int_status & TX_ERR_INT) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China RGE_REPORT((rgep, "tx error happened, resetting the chip "));
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China mutex_enter(rgep->genlock);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China rgep->rge_chip_state = RGE_CHIP_ERROR;
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China mutex_exit(rgep->genlock);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China } else if ((rgep->chipid.is_pcie && (int_status & NO_TXDESC_INT)) ||
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China ((int_status & TX_OK_INT) && rgep->tx_free < RGE_SEND_SLOTS/8)) {
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China (void) ddi_intr_trigger_softint(rgep->resched_hdl, NULL);
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China }
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You /*
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You * System error interrupt
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You */
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You if (int_status & SYS_ERR_INT) {
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You RGE_REPORT((rgep, "sys error happened, resetting the chip "));
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You mutex_enter(rgep->genlock);
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You rgep->rge_chip_state = RGE_CHIP_ERROR;
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You mutex_exit(rgep->genlock);
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You }
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China /*
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China * Re-enable interrupt for PCIE chipset or install new int_mask
aa81749390e332985277568edab1ee6132326b42gs */
3a84c50f71e0942a55e90913f6b44878d5062621Winson Wang - Sun Microsystems - Beijing China if (update_int_mask)
aa81749390e332985277568edab1ee6132326b42gs rge_reg_put16(rgep, INT_MASK_REG, rgep->int_mask);
aa81749390e332985277568edab1ee6132326b42gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (DDI_INTR_CLAIMED); /* indicate it was our interrupt */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * ========== Factotum, implemented as a softint handler ==========
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#undef RGE_DBG
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#define RGE_DBG RGE_DBG_FACT /* debug flag for this code */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic boolean_t rge_factotum_link_check(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_factotum_link_check)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic boolean_t
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_factotum_link_check(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint8_t media_status;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs int32_t link;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs media_status = rge_reg_get8(rgep, PHY_STATUS_REG);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs link = (media_status & PHY_STATUS_LINK_UP) ?
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs LINK_STATE_UP : LINK_STATE_DOWN;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (rgep->param_link_up != link) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
0d2a8e5eea8ac6ea0f5c517f0c481329b57d5459gd * Link change.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->param_link_up = link;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (link == LINK_STATE_UP) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (media_status & PHY_STATUS_1000MF) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->param_link_speed = RGE_SPEED_1000M;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->param_link_duplex = LINK_DUPLEX_FULL;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs } else {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->param_link_speed =
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs (media_status & PHY_STATUS_100M) ?
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_SPEED_100M : RGE_SPEED_10M;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->param_link_duplex =
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs (media_status & PHY_STATUS_DUPLEX_FULL) ?
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs LINK_DUPLEX_FULL : LINK_DUPLEX_HALF;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (B_TRUE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (B_FALSE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Factotum routine to check for Tx stall, using the 'watchdog' counter
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic boolean_t rge_factotum_stall_check(rge_t *rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_factotum_stall_check)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic boolean_t
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_factotum_stall_check(rge_t *rgep)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint32_t dogval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ASSERT(mutex_owned(rgep->genlock));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China /*
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China * Specific check for RX stall ...
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China */
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China rgep->rx_fifo_ovf <<= 1;
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China if (rgep->rx_fifo_ovf > rge_rx_watchdog_count) {
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China RGE_REPORT((rgep, "rx_hang detected"));
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China return (B_TRUE);
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China }
7b114c4b72aa312e481641f6d76a0f0194877786Winson Wang - Sun Microsystems - Beijing China
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Specific check for Tx stall ...
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * The 'watchdog' counter is incremented whenever a packet
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * is queued, reset to 1 when some (but not all) buffers
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * are reclaimed, reset to 0 (disabled) when all buffers
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * are reclaimed, and shifted left here. If it exceeds the
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * threshold value, the chip is assumed to have stalled and
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * is put into the ERROR state. The factotum will then reset
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * it on the next pass.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * All of which should ensure that we don't get into a state
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * where packets are left pending indefinitely!
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
aa81749390e332985277568edab1ee6132326b42gs if (rgep->resched_needed)
aa81749390e332985277568edab1ee6132326b42gs (void) ddi_intr_trigger_softint(rgep->resched_hdl, NULL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs dogval = rge_atomic_shl32(&rgep->watchdog, 1);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (dogval < rge_watchdog_count)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (B_FALSE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_REPORT((rgep, "Tx stall detected, watchdog code 0x%x", dogval));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (B_TRUE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * The factotum is woken up when there's something to do that we'd rather
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * not do from inside a hardware interrupt handler or high-level cyclic.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Its two main tasks are:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * reset & restart the chip after an error
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * check the link status whenever necessary
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
aa81749390e332985277568edab1ee6132326b42gsuint_t rge_chip_factotum(caddr_t arg1, caddr_t arg2);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_factotum)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsuint_t
aa81749390e332985277568edab1ee6132326b42gsrge_chip_factotum(caddr_t arg1, caddr_t arg2)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_t *rgep;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint_t result;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t error;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t linkchg;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
aa81749390e332985277568edab1ee6132326b42gs rgep = (rge_t *)arg1;
aa81749390e332985277568edab1ee6132326b42gs _NOTE(ARGUNUSED(arg2))
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (rgep->factotum_flag == 0)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (DDI_INTR_UNCLAIMED);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep->factotum_flag = 0;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs result = DDI_INTR_CLAIMED;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs error = B_FALSE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs linkchg = B_FALSE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs mutex_enter(rgep->genlock);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (rgep->rge_chip_state) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs default:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_CHIP_RUNNING:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs linkchg = rge_factotum_link_check(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs error = rge_factotum_stall_check(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_CHIP_ERROR:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs error = B_TRUE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_CHIP_FAULT:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Fault detected, time to reset ...
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (rge_autorecover) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_REPORT((rgep, "automatic recovery activated"));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_restart(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * If an error is detected, stop the chip now, marking it as
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * faulty, so that it will be reset next time through ...
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (error)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_chip_stop(rgep, B_TRUE);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs mutex_exit(rgep->genlock);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * If the link state changed, tell the world about it.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Note: can't do this while still holding the mutex.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (linkchg)
ba2e4443695ee6a6f420a35cd4fc3d3346d22932seb mac_link_update(rgep->mh, rgep->param_link_up);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (result);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * High-level cyclic handler
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * This routine schedules a (low-level) softint callback to the
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * factotum, and prods the chip to update the status block (which
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * will cause a hardware interrupt when complete).
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid rge_chip_cyclic(void *arg);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_cyclic)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsvoid
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_cyclic(void *arg)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_t *rgep;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rgep = arg;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (rgep->rge_chip_state) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs default:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_CHIP_RUNNING:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_phy_check(rgep);
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You if (rgep->tx_free < RGE_SEND_SLOTS)
9e1a9180bec2232328687ae8e96007921a6ed05dLi-Zhen You rge_send_recycle(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_CHIP_FAULT:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_CHIP_ERROR:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_wake_factotum(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs/*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * ========== Ioctl subfunctions ==========
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#undef RGE_DBG
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#define RGE_DBG RGE_DBG_PPIO /* debug flag for this code */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#if RGE_DEBUGGING || RGE_DO_PPIO
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_chip_peek_cfg(rge_t *rgep, rge_peekpoke_t *ppd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_peek_cfg)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_peek_cfg(rge_t *rgep, rge_peekpoke_t *ppd)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint64_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint64_t regno;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_chip_peek_cfg($%p, $%p)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, (void *)ppd));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regno = ppd->pp_acc_offset;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (ppd->pp_acc_size) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 1:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = pci_config_get8(rgep->cfg_handle, regno);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 2:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = pci_config_get16(rgep->cfg_handle, regno);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 4:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = pci_config_get32(rgep->cfg_handle, regno);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 8:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = pci_config_get64(rgep->cfg_handle, regno);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppd->pp_acc_data = regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_chip_poke_cfg(rge_t *rgep, rge_peekpoke_t *ppd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_poke_cfg)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_poke_cfg(rge_t *rgep, rge_peekpoke_t *ppd)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint64_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint64_t regno;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_chip_poke_cfg($%p, $%p)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, (void *)ppd));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regno = ppd->pp_acc_offset;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = ppd->pp_acc_data;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (ppd->pp_acc_size) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 1:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs pci_config_put8(rgep->cfg_handle, regno, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 2:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs pci_config_put16(rgep->cfg_handle, regno, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 4:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs pci_config_put32(rgep->cfg_handle, regno, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 8:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs pci_config_put64(rgep->cfg_handle, regno, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_chip_peek_reg(rge_t *rgep, rge_peekpoke_t *ppd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_peek_reg)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_peek_reg(rge_t *rgep, rge_peekpoke_t *ppd)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint64_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs void *regaddr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_chip_peek_reg($%p, $%p)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, (void *)ppd));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regaddr = PIO_ADDR(rgep, ppd->pp_acc_offset);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (ppd->pp_acc_size) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 1:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = ddi_get8(rgep->io_handle, regaddr);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 2:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = ddi_get16(rgep->io_handle, regaddr);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 4:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = ddi_get32(rgep->io_handle, regaddr);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 8:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = ddi_get64(rgep->io_handle, regaddr);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppd->pp_acc_data = regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_chip_poke_reg(rge_t *rgep, rge_peekpoke_t *ppd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_peek_reg)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_poke_reg(rge_t *rgep, rge_peekpoke_t *ppd)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint64_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs void *regaddr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_chip_poke_reg($%p, $%p)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, (void *)ppd));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regaddr = PIO_ADDR(rgep, ppd->pp_acc_offset);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = ppd->pp_acc_data;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (ppd->pp_acc_size) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 1:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ddi_put8(rgep->io_handle, regaddr, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 2:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ddi_put16(rgep->io_handle, regaddr, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 4:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ddi_put32(rgep->io_handle, regaddr, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 8:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ddi_put64(rgep->io_handle, regaddr, regval);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_chip_peek_mii(rge_t *rgep, rge_peekpoke_t *ppd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_peek_mii)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_peek_mii(rge_t *rgep, rge_peekpoke_t *ppd)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_chip_peek_mii($%p, $%p)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, (void *)ppd));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppd->pp_acc_data = rge_mii_get16(rgep, ppd->pp_acc_offset/2);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_chip_poke_mii(rge_t *rgep, rge_peekpoke_t *ppd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_poke_mii)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_poke_mii(rge_t *rgep, rge_peekpoke_t *ppd)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_chip_poke_mii($%p, $%p)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, (void *)ppd));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, ppd->pp_acc_offset/2, ppd->pp_acc_data);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_chip_peek_mem(rge_t *rgep, rge_peekpoke_t *ppd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_peek_mem)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_peek_mem(rge_t *rgep, rge_peekpoke_t *ppd)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint64_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs void *vaddr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_chip_peek_rge($%p, $%p)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, (void *)ppd));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs vaddr = (void *)(uintptr_t)ppd->pp_acc_offset;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (ppd->pp_acc_size) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 1:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = *(uint8_t *)vaddr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 2:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = *(uint16_t *)vaddr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 4:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = *(uint32_t *)vaddr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 8:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = *(uint64_t *)vaddr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge_chip_peek_mem($%p, $%p) peeked 0x%llx from $%p",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, (void *)ppd, regval, vaddr));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppd->pp_acc_data = regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void rge_chip_poke_mem(rge_t *rgep, rge_peekpoke_t *ppd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_poke_mem)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic void
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_poke_mem(rge_t *rgep, rge_peekpoke_t *ppd)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint64_t regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs void *vaddr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_chip_poke_mem($%p, $%p)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, (void *)ppd));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs vaddr = (void *)(uintptr_t)ppd->pp_acc_offset;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs regval = ppd->pp_acc_data;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_DEBUG(("rge_chip_poke_mem($%p, $%p) poking 0x%llx at $%p",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, (void *)ppd, regval, vaddr));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (ppd->pp_acc_size) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 1:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *(uint8_t *)vaddr = (uint8_t)regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 2:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *(uint16_t *)vaddr = (uint16_t)regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 4:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *(uint32_t *)vaddr = (uint32_t)regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 8:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs *(uint64_t *)vaddr = (uint64_t)regval;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic enum ioc_reply rge_pp_ioctl(rge_t *rgep, int cmd, mblk_t *mp,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs struct iocblk *iocp);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_pp_ioctl)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic enum ioc_reply
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_pp_ioctl(rge_t *rgep, int cmd, mblk_t *mp, struct iocblk *iocp)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs void (*ppfn)(rge_t *rgep, rge_peekpoke_t *ppd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_peekpoke_t *ppd;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs dma_area_t *areap;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint64_t sizemask;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint64_t mem_va;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs uint64_t maxoff;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs boolean_t peek;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (cmd) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs default:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* NOTREACHED */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_error(rgep, "rge_pp_ioctl: invalid cmd 0x%x", cmd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PEEK:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs peek = B_TRUE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_POKE:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs peek = B_FALSE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Validate format of ioctl
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (iocp->ioc_count != sizeof (rge_peekpoke_t))
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (mp->b_cont == NULL)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppd = (rge_peekpoke_t *)mp->b_cont->b_rptr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Validate request parameters
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (ppd->pp_acc_space) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs default:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_CFG:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Config space
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs sizemask = 8|4|2|1;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs mem_va = 0;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs maxoff = PCI_CONF_HDR_SIZE;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppfn = peek ? rge_chip_peek_cfg : rge_chip_poke_cfg;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_REG:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Memory-mapped I/O space
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs sizemask = 8|4|2|1;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs mem_va = 0;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs maxoff = RGE_REGISTER_MAX;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppfn = peek ? rge_chip_peek_reg : rge_chip_poke_reg;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_MII:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * PHY's MII registers
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * NB: all PHY registers are two bytes, but the
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * addresses increment in ones (word addressing).
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * So we scale the address here, then undo the
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * transformation inside the peek/poke functions.
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppd->pp_acc_offset *= 2;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs sizemask = 2;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs mem_va = 0;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs maxoff = (MII_MAXREG+1)*2;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppfn = peek ? rge_chip_peek_mii : rge_chip_poke_mii;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_RGE:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * RGE data structure!
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs sizemask = 8|4|2|1;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs mem_va = (uintptr_t)rgep;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs maxoff = sizeof (*rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppfn = peek ? rge_chip_peek_mem : rge_chip_poke_mem;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_STATISTICS:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_TXDESC:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_TXBUFF:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_RXDESC:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_RXBUFF:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Various DMA_AREAs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (ppd->pp_acc_space) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_TXDESC:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs areap = &rgep->dma_area_txdesc;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_RXDESC:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs areap = &rgep->dma_area_rxdesc;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PP_SPACE_STATISTICS:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs areap = &rgep->dma_area_stats;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs sizemask = 8|4|2|1;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs mem_va = (uintptr_t)areap->mem_va;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs maxoff = areap->alength;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppfn = peek ? rge_chip_peek_mem : rge_chip_poke_mem;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (ppd->pp_acc_size) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs default:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 8:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 4:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 2:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case 1:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if ((ppd->pp_acc_size & sizemask) == 0)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs break;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if ((ppd->pp_acc_offset % ppd->pp_acc_size) != 0)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (ppd->pp_acc_offset >= maxoff)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (ppd->pp_acc_offset+ppd->pp_acc_size > maxoff)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * All OK - go do it!
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ppd->pp_acc_offset += mem_va;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs (*ppfn)(rgep, ppd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (peek ? IOC_REPLY : IOC_ACK);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic enum ioc_reply rge_diag_ioctl(rge_t *rgep, int cmd, mblk_t *mp,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs struct iocblk *iocp);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_diag_ioctl)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic enum ioc_reply
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_diag_ioctl(rge_t *rgep, int cmd, mblk_t *mp, struct iocblk *iocp)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ASSERT(mutex_owned(rgep->genlock));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (cmd) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs default:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* NOTREACHED */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_error(rgep, "rge_diag_ioctl: invalid cmd 0x%x", cmd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_DIAG:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Currently a no-op
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_ACK);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PEEK:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_POKE:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (rge_pp_ioctl(rgep, cmd, mp, iocp));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PHY_RESET:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_RESTART_ACK);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_SOFT_RESET:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_HARD_RESET:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Reset and reinitialise the 570x hardware
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_restart(rgep);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_ACK);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* NOTREACHED */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#endif /* RGE_DEBUGGING || RGE_DO_PPIO */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic enum ioc_reply rge_mii_ioctl(rge_t *rgep, int cmd, mblk_t *mp,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs struct iocblk *iocp);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_mii_ioctl)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsstatic enum ioc_reply
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_mii_ioctl(rge_t *rgep, int cmd, mblk_t *mp, struct iocblk *iocp)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs struct rge_mii_rw *miirwp;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Validate format of ioctl
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (iocp->ioc_count != sizeof (struct rge_mii_rw))
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (mp->b_cont == NULL)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs miirwp = (struct rge_mii_rw *)mp->b_cont->b_rptr;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /*
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs * Validate request parameters ...
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs if (miirwp->mii_reg > MII_MAXREG)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (cmd) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs default:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* NOTREACHED */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_error(rgep, "rge_mii_ioctl: invalid cmd 0x%x", cmd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_MII_READ:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs miirwp->mii_data = rge_mii_get16(rgep, miirwp->mii_reg);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_REPLY);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_MII_WRITE:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_mii_put16(rgep, miirwp->mii_reg, miirwp->mii_data);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_ACK);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* NOTREACHED */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsenum ioc_reply rge_chip_ioctl(rge_t *rgep, queue_t *wq, mblk_t *mp,
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs struct iocblk *iocp);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#pragma no_inline(rge_chip_ioctl)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsenum ioc_reply
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gsrge_chip_ioctl(rge_t *rgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp)
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs{
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs int cmd;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs RGE_TRACE(("rge_chip_ioctl($%p, $%p, $%p, $%p)",
dfc2d53e07384b9eaca5466a2328c88a1ed96f32mx (void *)rgep, (void *)wq, (void *)mp, (void *)iocp));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs ASSERT(mutex_owned(rgep->genlock));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs cmd = iocp->ioc_cmd;
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs switch (cmd) {
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs default:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* NOTREACHED */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs rge_error(rgep, "rge_chip_ioctl: invalid cmd 0x%x", cmd);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_DIAG:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PEEK:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_POKE:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_PHY_RESET:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_SOFT_RESET:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_HARD_RESET:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#if RGE_DEBUGGING || RGE_DO_PPIO
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (rge_diag_ioctl(rgep, cmd, mp, iocp));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#else
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (IOC_INVAL);
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs#endif /* RGE_DEBUGGING || RGE_DO_PPIO */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_MII_READ:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs case RGE_MII_WRITE:
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs return (rge_mii_ioctl(rgep, cmd, mp, iocp));
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs }
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs /* NOTREACHED */
c7fd2ed091e4e4beb47e1da3a6197a2c38f29c02gs}