f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

d67944fbe3fa0b31893a7116a09b0718eecf6078Scott Rotondo#pragma weak inb

d67944fbe3fa0b31893a7116a09b0718eecf6078Scott Rotondo#pragma weak outb

d67944fbe3fa0b31893a7116a09b0718eecf6078Scott Rotondo

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include <sys/types.h>

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include <sys/conf.h>

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include <sys/debug.h>

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include <sys/kmem.h>

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include <sys/modctl.h>

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include <sys/errno.h>

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include <sys/ddi.h>

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include <sys/sunddi.h>

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include <sys/byteorder.h>

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include <sys/ethernet.h>

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include <sys/pci.h>

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include "sfe_mii.h"

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include "sfe_util.h"

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#include "sfereg.h"

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moorechar ident[] = "sis900/dp83815 driver v" "2.6.1t30os";

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#ifdef DEBUG_LEVEL

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_debug = DEBUG_LEVEL;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#if DEBUG_LEVEL > 4

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define CONS "^"

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#else

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define CONS "!"

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define DPRINTF(n, args) if (sfe_debug > (n)) cmn_err args

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#else

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define CONS "!"

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define DPRINTF(n, args)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define ONESEC (drv_usectohz(1*1000000))

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define ROUNDUP2(x, a) (((x) + (a) - 1) & ~((a) - 1))

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define MAXTXFRAGS 1

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define MAXRXFRAGS 1

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#ifndef TX_BUF_SIZE

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define TX_BUF_SIZE 64

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#ifndef TX_RING_SIZE

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#if MAXTXFRAGS == 1

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define TX_RING_SIZE TX_BUF_SIZE

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#else

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define TX_RING_SIZE (TX_BUF_SIZE * 4)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#ifndef RX_BUF_SIZE

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define RX_BUF_SIZE 256

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#ifndef RX_RING_SIZE

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define RX_RING_SIZE RX_BUF_SIZE

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define OUR_INTR_BITS \

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (ISR_DPERR | ISR_SSERR | ISR_RMABT | ISR_RTABT | ISR_RXSOVR | \

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ISR_TXURN | ISR_TXDESC | ISR_TXERR | \

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ISR_RXORN | ISR_RXIDLE | ISR_RXOK | ISR_RXERR)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define USE_MULTICAST_HASHTBL

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_tx_copy_thresh = 256;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_rx_copy_thresh = 256;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define MII_CONFIG1 0x0010

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define MII_CONFIG2 0x0011

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define MII_MASK 0x0013

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define MII_RESV 0x0014

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define PHY_MASK 0xfffffff0

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define PHY_SIS900_INTERNAL 0x001d8000

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define PHY_ICS1893 0x0015f440

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define SFE_DESC_SIZE 16 /* including pads rounding up to power of 2 */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstruct chip_info {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint16_t venid;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint16_t devid;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff char *chip_name;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int chip_type;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define CHIPTYPE_DP83815 0

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define CHIPTYPE_SIS900 1

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff};

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstruct sfe_dev {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* misc HW information */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct chip_info *chip;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t our_intr_bits;

23d366e350386ec109bfa9b2cf91225729a1a26bduboff uint32_t isr_pended;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t cr;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint_t tx_drain_threshold;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint_t tx_fill_threshold;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint_t rx_drain_threshold;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint_t rx_fill_threshold;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint8_t revid; /* revision from PCI configuration */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff boolean_t (*get_mac_addr)(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint8_t mac_addr[ETHERADDRL];

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint8_t bridge_revid;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff};

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstruct chip_info sfe_chiptbl[] = {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff { 0x1039, 0x0900, "SiS900", CHIPTYPE_SIS900, },

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff { 0x100b, 0x0020, "DP83815/83816", CHIPTYPE_DP83815, },

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff { 0x1039, 0x7016, "SiS7016", CHIPTYPE_SIS900, },

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff};

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define CHIPTABLESIZE (sizeof (sfe_chiptbl)/sizeof (struct chip_info))

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void sfe_mii_sync_dp83815(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void sfe_mii_sync_sis900(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic uint16_t sfe_mii_read_dp83815(struct gem_dev *, uint_t);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic uint16_t sfe_mii_read_sis900(struct gem_dev *, uint_t);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void sfe_mii_write_dp83815(struct gem_dev *, uint_t, uint16_t);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void sfe_mii_write_sis900(struct gem_dev *, uint_t, uint16_t);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void sfe_set_eq_sis630(struct gem_dev *dp);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_reset_chip_sis900(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_reset_chip_dp83815(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_init_chip(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_start_chip(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_stop_chip(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_set_media(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_set_rx_filter_dp83815(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_set_rx_filter_sis900(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_get_stats(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_attach_chip(struct gem_dev *);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int sfe_tx_desc_write(struct gem_dev *dp, int slot,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ddi_dma_cookie_t *dmacookie, int frags, uint64_t flags);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void sfe_tx_start(struct gem_dev *dp, int startslot, int nslot);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void sfe_rx_desc_write(struct gem_dev *dp, int slot,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ddi_dma_cookie_t *dmacookie, int frags);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic uint_t sfe_tx_desc_stat(struct gem_dev *dp, int slot, int ndesc);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic uint64_t sfe_rx_desc_stat(struct gem_dev *dp, int slot, int ndesc);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void sfe_tx_desc_init(struct gem_dev *dp, int slot);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void sfe_rx_desc_init(struct gem_dev *dp, int slot);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void sfe_tx_desc_clean(struct gem_dev *dp, int slot);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void sfe_rx_desc_clean(struct gem_dev *dp, int slot);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic uint_t sfe_interrupt(struct gem_dev *dp);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic struct ddi_device_acc_attr sfe_dev_attr = {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DDI_DEVICE_ATTR_V0,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DDI_STRUCTURE_LE_ACC,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DDI_STRICTORDER_ACC

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff};

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic struct ddi_device_acc_attr sfe_buf_attr = {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DDI_DEVICE_ATTR_V0,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DDI_NEVERSWAP_ACC, /* native endianness */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DDI_STRICTORDER_ACC

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff};

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic ddi_dma_attr_t sfe_dma_attr_buf = {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DMA_ATTR_V0, /* dma_attr_version */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0, /* dma_attr_addr_lo */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0xffffffffull, /* dma_attr_addr_hi */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0x00000fffull, /* dma_attr_count_max */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0, /* patched later */ /* dma_attr_align */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0x000003fc, /* dma_attr_burstsizes */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 1, /* dma_attr_minxfer */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0x00000fffull, /* dma_attr_maxxfer */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0xffffffffull, /* dma_attr_seg */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0, /* patched later */ /* dma_attr_sgllen */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 1, /* dma_attr_granular */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0 /* dma_attr_flags */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff};

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic ddi_dma_attr_t sfe_dma_attr_desc = {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DMA_ATTR_V0, /* dma_attr_version */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 16, /* dma_attr_addr_lo */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0xffffffffull, /* dma_attr_addr_hi */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0xffffffffull, /* dma_attr_count_max */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 16, /* dma_attr_align */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0x000003fc, /* dma_attr_burstsizes */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 1, /* dma_attr_minxfer */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0xffffffffull, /* dma_attr_maxxfer */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0xffffffffull, /* dma_attr_seg */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 1, /* dma_attr_sgllen */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 1, /* dma_attr_granular */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 0 /* dma_attr_flags */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff};

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffuint32_t sfe_use_pcimemspace = 0;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define SFE_EEPROM_DELAY(dp) \

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff { (void) INL(dp, EROMAR); (void) INL(dp, EROMAR); }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define EE_CMD_READ 6

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define EE_CMD_SHIFT 6

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic uint16_t

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_read_eeprom(struct gem_dev *dp, uint_t offset)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int eedi;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint16_t ret;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* ensure de-assert chip select */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, EROMAR, 0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff SFE_EEPROM_DELAY(dp);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, EROMAR, EROMAR_EESK);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff SFE_EEPROM_DELAY(dp);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* assert chip select */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff offset |= EE_CMD_READ << EE_CMD_SHIFT;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 8; i >= 0; i--) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* make command */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff eedi = ((offset >> i) & 1) << EROMAR_EEDI_SHIFT;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* send 1 bit */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, EROMAR, EROMAR_EECS | eedi);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff SFE_EEPROM_DELAY(dp);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, EROMAR, EROMAR_EECS | eedi | EROMAR_EESK);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff SFE_EEPROM_DELAY(dp);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, EROMAR, EROMAR_EECS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ret = 0;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < 16; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Get 1 bit */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, EROMAR, EROMAR_EECS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff SFE_EEPROM_DELAY(dp);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, EROMAR, EROMAR_EECS | EROMAR_EESK);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff SFE_EEPROM_DELAY(dp);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ret = (ret << 1) | ((INL(dp, EROMAR) >> EROMAR_EEDO_SHIFT) & 1);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, EROMAR, 0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff SFE_EEPROM_DELAY(dp);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (ret);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#undef SFE_EEPROM_DELAY

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic boolean_t

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_get_mac_addr_dp83815(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint8_t *mac;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint_t val;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define BITSET(p, ix, v) (p)[(ix)/8] |= ((v) ? 1 : 0) << ((ix) & 0x7)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(4, (CE_CONT, CONS "%s: %s: called", dp->name, __func__));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mac = dp->dev_addr.ether_addr_octet;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* first of all, clear MAC address buffer */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff bzero(mac, ETHERADDRL);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* get bit 0 */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = sfe_read_eeprom(dp, 0x6);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff BITSET(mac, 0, val & 1);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* get bit 1 - 16 */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = sfe_read_eeprom(dp, 0x7);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < 16; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff BITSET(mac, 1 + i, val & (1 << (15 - i)));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* get bit 17 - 32 */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = sfe_read_eeprom(dp, 0x8);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < 16; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff BITSET(mac, 17 + i, val & (1 << (15 - i)));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* get bit 33 - 47 */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = sfe_read_eeprom(dp, 0x9);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < 15; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff BITSET(mac, 33 + i, val & (1 << (15 - i)));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (B_TRUE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#undef BITSET

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic boolean_t

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_get_mac_addr_sis900(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint_t val;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint8_t *mac;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mac = dp->dev_addr.ether_addr_octet;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < ETHERADDRL/2; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = sfe_read_eeprom(dp, 0x8 + i);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff *mac++ = (uint8_t)val;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff *mac++ = (uint8_t)(val >> 8);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (B_TRUE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic dev_info_t *

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_search_pci_dev_subr(dev_info_t *cur_node, int vendor_id, int device_id)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dev_info_t *child_id;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dev_info_t *ret;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int vid, did;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (cur_node == NULL) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (NULL);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* check brothers */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff do {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff vid = ddi_prop_get_int(DDI_DEV_T_ANY, cur_node,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DDI_PROP_DONTPASS, "vendor-id", -1);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff did = ddi_prop_get_int(DDI_DEV_T_ANY, cur_node,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DDI_PROP_DONTPASS, "device-id", -1);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (vid == vendor_id && did == device_id) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* found */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (cur_node);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* check children */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((child_id = ddi_get_child(cur_node)) != NULL) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((ret = sfe_search_pci_dev_subr(child_id,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff vendor_id, device_id)) != NULL) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (ret);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff } while ((cur_node = ddi_get_next_sibling(cur_node)) != NULL);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* not found */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (NULL);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic dev_info_t *

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_search_pci_dev(int vendor_id, int device_id)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (sfe_search_pci_dev_subr(ddi_root_node(), vendor_id, device_id));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic boolean_t

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_get_mac_addr_sis630e(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dev_info_t *isa_bridge;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ddi_acc_handle_t isa_handle;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int reg;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (inb == NULL || outb == NULL) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* this is not IA architecture */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (B_FALSE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((isa_bridge = sfe_search_pci_dev(0x1039, 0x8)) == NULL) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_WARN, "%s: failed to find isa-bridge pci1039,8",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (B_FALSE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (pci_config_setup(isa_bridge, &isa_handle) != DDI_SUCCESS) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_WARN, "%s: ddi_regs_map_setup failed",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (B_FALSE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* enable to access CMOS RAM */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff reg = pci_config_get8(isa_handle, 0x48);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff pci_config_put8(isa_handle, 0x48, reg | 0x40);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < ETHERADDRL; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff outb(0x70, 0x09 + i);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->dev_addr.ether_addr_octet[i] = inb(0x71);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* disable to access CMOS RAM */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff pci_config_put8(isa_handle, 0x48, reg);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff pci_config_teardown(&isa_handle);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (B_TRUE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic boolean_t

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_get_mac_addr_sis635(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t rfcr;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint16_t v;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_dev *lp = dp->private;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, CONS "%s: %s: called", dp->name, __func__));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff rfcr = INL(dp, RFCR);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, CR, lp->cr | CR_RELOAD);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, CR, lp->cr);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* disable packet filtering before reading filter */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR, rfcr & ~RFCR_RFEN);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* load MAC addr from filter data register */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < ETHERADDRL; i += 2) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (RFADDR_MAC_SIS900 + (i/2)) << RFCR_RFADDR_SHIFT_SIS900);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff v = INL(dp, RFDR);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->dev_addr.ether_addr_octet[i] = (uint8_t)v;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->dev_addr.ether_addr_octet[i+1] = (uint8_t)(v >> 8);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* re-enable packet filtering */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR, rfcr | RFCR_RFEN);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (B_TRUE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic boolean_t

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_get_mac_addr_sis962(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff boolean_t ret;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ret = B_FALSE;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* rise request signal to access EEPROM */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, MEAR, EROMAR_EEREQ);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; (INL(dp, MEAR) & EROMAR_EEGNT) == 0; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (i > 200) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* failed to acquire eeprom */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_NOTE,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff CONS "%s: failed to access eeprom", dp->name);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff goto x;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff drv_usecwait(10);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ret = sfe_get_mac_addr_sis900(dp);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffx:

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* release EEPROM */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, MEAR, EROMAR_EEDONE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (ret);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_reset_chip_sis900(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t done;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t val;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_dev *lp = dp->private;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(4, (CE_CONT, CONS "%s: %s called", dp->name, __func__));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* invalidate mac addr cache */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff bzero(lp->mac_addr, sizeof (lp->mac_addr));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->cr = 0;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* inhibit interrupt */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, IMR, 0);

23d366e350386ec109bfa9b2cf91225729a1a26bduboff lp->isr_pended |= INL(dp, ISR) & lp->our_intr_bits;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

915ebf8da9f4ef3e7b2e34dd367f64d358a628d9Alan Duboff OUTLINL(dp, RFCR, 0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, CR, CR_RST | CR_TXR | CR_RXR);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff drv_usecwait(10);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff done = 0;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; done != (ISR_TXRCMP | ISR_RXRCMP); i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (i > 1000) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_WARN, "%s: chip reset timeout", dp->name);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_FAILURE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff done |= INL(dp, ISR) & (ISR_TXRCMP | ISR_RXRCMP);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff drv_usecwait(10);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (lp->revid == SIS630ET_900_REV) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->cr |= CR_ACCESSMODE;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, CR, lp->cr | INL(dp, CR));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Configuration register: enable PCI parity */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, CONS "%s: cfg:%b",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, INL(dp, CFG), CFG_BITS_SIS900));

23d366e350386ec109bfa9b2cf91225729a1a26bduboff val = 0;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (lp->revid >= SIS635A_900_REV ||

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->revid == SIS900B_900_REV) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* what is this ? */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val |= CFG_RND_CNT;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, CFG, val);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, CONS "%s: cfg:%b", dp->name,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff INL(dp, CFG), CFG_BITS_SIS900));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_SUCCESS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_reset_chip_dp83815(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

23d366e350386ec109bfa9b2cf91225729a1a26bduboff uint32_t val;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_dev *lp = dp->private;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(4, (CE_CONT, CONS "%s: %s called", dp->name, __func__));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* invalidate mac addr cache */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff bzero(lp->mac_addr, sizeof (lp->mac_addr));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->cr = 0;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* inhibit interrupts */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, IMR, 0);

23d366e350386ec109bfa9b2cf91225729a1a26bduboff lp->isr_pended |= INL(dp, ISR) & lp->our_intr_bits;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR, 0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, CR, CR_RST);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff drv_usecwait(10);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; INL(dp, CR) & CR_RST; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (i > 100) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_WARN, "!%s: chip reset timeout", dp->name);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_FAILURE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff drv_usecwait(10);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: chip reset in %duS", dp->name, i*10));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, CCSR, CCSR_PMESTS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, CCSR, 0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Configuration register: enable PCI parity */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, CONS "%s: cfg:%b",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, INL(dp, CFG), CFG_BITS_DP83815));

23d366e350386ec109bfa9b2cf91225729a1a26bduboff val = INL(dp, CFG) & (CFG_ANEG_SEL | CFG_PHY_CFG);

23d366e350386ec109bfa9b2cf91225729a1a26bduboff OUTL(dp, CFG, val | CFG_PAUSE_ADV);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, CONS "%s: cfg:%b", dp->name,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff INL(dp, CFG), CFG_BITS_DP83815));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_SUCCESS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_init_chip(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Configuration register: have been set up in sfe_chip_reset */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* PCI test control register: do nothing */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Interrupt status register : do nothing */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Interrupt mask register: clear, but leave lp->our_intr_bits */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, IMR, 0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Enhanced PHY Access register (sis900): do nothing */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Transmit Descriptor Pointer register: base addr of TX ring */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, TXDP, dp->tx_ring_dma);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Receive descriptor pointer register: base addr of RX ring */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RXDP, dp->rx_ring_dma);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_SUCCESS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic uint_t

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_mcast_hash(struct gem_dev *dp, uint8_t *addr)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (gem_ether_crc_be(addr, ETHERADDRL));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#ifdef DEBUG_LEVEL

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_rxfilter_dump(struct gem_dev *dp, int start, int end)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int j;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint16_t ram[0x10];

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT, "!%s: rx filter ram dump:", dp->name);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define WORDS_PER_LINE 4

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = start; i < end; i += WORDS_PER_LINE*2) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (j = 0; j < WORDS_PER_LINE; j++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR, RFADDR_MAC_DP83815 + i + j*2);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ram[j] = INL(dp, RFDR);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT, "!0x%02x: 0x%04x 0x%04x 0x%04x 0x%04x",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff i, ram[0], ram[1], ram[2], ram[3]);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#undef WORDS_PER_LINE

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic uint_t sfe_rf_perfect_base_dp83815[] = {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff RFADDR_PMATCH0_DP83815,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff RFADDR_PMATCH1_DP83815,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff RFADDR_PMATCH2_DP83815,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff RFADDR_PMATCH3_DP83815,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff};

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_set_rx_filter_dp83815(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int j;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t mode;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint8_t *mac = dp->cur_addr.ether_addr_octet;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint16_t hash_tbl[32];

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_dev *lp = dp->private;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, CONS "%s: %s: called, mc_count:%d, mode:0x%b",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, __func__, dp->mc_count, dp->rxmode, RXMODE_BITS));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#if DEBUG_LEVEL > 0

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < dp->mc_count; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: adding mcast(%d) %02x:%02x:%02x:%02x:%02x:%02x",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, i,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->mc_list[i].addr.ether_addr_octet[0],

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->mc_list[i].addr.ether_addr_octet[1],

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->mc_list[i].addr.ether_addr_octet[2],

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->mc_list[i].addr.ether_addr_octet[3],

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->mc_list[i].addr.ether_addr_octet[4],

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->mc_list[i].addr.ether_addr_octet[5]);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((dp->rxmode & RXMODE_ENABLE) == 0) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* disable rx filter */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR, 0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_SUCCESS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (dp->rxmode & RXMODE_PROMISC) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* all broadcast, all multicast, all physical */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mode = RFCR_AAB | RFCR_AAM | RFCR_AAP;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff } else if ((dp->rxmode & RXMODE_ALLMULTI) || dp->mc_count > 16*32/2) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* all broadcast, all multicast, physical for the chip */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mode = RFCR_AAB | RFCR_AAM | RFCR_APM_DP83815;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff } else if (dp->mc_count > 4) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mode = RFCR_AAB | RFCR_MHEN_DP83815 | RFCR_APM_DP83815;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff bzero(hash_tbl, sizeof (hash_tbl));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < dp->mc_count; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff j = dp->mc_list[i].hash >> (32 - 9);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff hash_tbl[j / 16] |= 1 << (j % 16);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff } else {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* need to enable corresponding pattern registers */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mode = RFCR_AAB | RFCR_APM_DP83815 |

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (((1 << dp->mc_count) - 1) << RFCR_APAT_SHIFT);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#if DEBUG_LEVEL > 1

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: mac %02x:%02x:%02x:%02x:%02x:%02x"

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff " cache %02x:%02x:%02x:%02x:%02x:%02x",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->mac_addr[0], lp->mac_addr[1],

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->mac_addr[2], lp->mac_addr[3],

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->mac_addr[4], lp->mac_addr[5]);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (bcmp(mac, lp->mac_addr, ETHERADDRL) != 0) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* setup perfect match register for my station address */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < ETHERADDRL; i += 2) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR, RFADDR_MAC_DP83815 + i);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFDR, (mac[i+1] << 8) | mac[i]);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff bcopy(mac, lp->mac_addr, ETHERADDRL);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#if DEBUG_LEVEL > 3

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* clear pattern ram */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (j = 0x200; j < 0x380; j += 2) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR, j);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFDR, 0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (mode & RFCR_APAT_DP83815) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* setup multicast address into pattern match registers */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (j = 0; j < dp->mc_count; j++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mac = &dp->mc_list[j].addr.ether_addr_octet[0];

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < ETHERADDRL; i += 2) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff sfe_rf_perfect_base_dp83815[j] + i*2);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFDR, (mac[i+1] << 8) | mac[i]);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* setup pattern count registers */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR, RFADDR_PCOUNT01_DP83815);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFDR, (ETHERADDRL << 8) | ETHERADDRL);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR, RFADDR_PCOUNT23_DP83815);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFDR, (ETHERADDRL << 8) | ETHERADDRL);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (mode & RFCR_MHEN_DP83815) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Load Multicast hash table */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < 32; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* for DP83815, index is in byte */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR, RFADDR_MULTICAST_DP83815 + i*2);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFDR, hash_tbl[i]);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#if DEBUG_LEVEL > 2

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff sfe_rxfilter_dump(dp, 0, 0x10);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff sfe_rxfilter_dump(dp, 0x200, 0x380);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Set rx filter mode and enable rx filter */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RFCR, RFCR_RFEN | mode);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_SUCCESS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_set_rx_filter_sis900(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t mode;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint16_t hash_tbl[16];

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint8_t *mac = dp->cur_addr.ether_addr_octet;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int hash_size;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int hash_shift;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_dev *lp = dp->private;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(4, (CE_CONT, CONS "%s: %s: called", dp->name, __func__));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((dp->rxmode & RXMODE_ENABLE) == 0) {

915ebf8da9f4ef3e7b2e34dd367f64d358a628d9Alan Duboff /* disable rx filter */

915ebf8da9f4ef3e7b2e34dd367f64d358a628d9Alan Duboff OUTLINL(dp, RFCR, 0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_SUCCESS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff hash_shift = 25;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (lp->revid >= SIS635A_900_REV || lp->revid == SIS900B_900_REV) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff hash_shift = 24;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff hash_size = (1 << (32 - hash_shift)) / 16;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff bzero(hash_tbl, sizeof (hash_tbl));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Set Receive filter control register */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (dp->rxmode & RXMODE_PROMISC) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* all broadcast, all multicast, all physical */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mode = RFCR_AAB | RFCR_AAM | RFCR_AAP;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff } else if ((dp->rxmode & RXMODE_ALLMULTI) ||

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->mc_count > hash_size*16/2) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* all broadcast, all multicast, physical for the chip */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mode = RFCR_AAB | RFCR_AAM;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff } else {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* all broadcast, physical for the chip */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mode = RFCR_AAB;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* make hash table */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < dp->mc_count; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint_t h;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff h = dp->mc_list[i].hash >> hash_shift;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff hash_tbl[h / 16] |= 1 << (h % 16);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (bcmp(mac, lp->mac_addr, ETHERADDRL) != 0) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Disable Rx filter and load mac address */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < ETHERADDRL/2; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* For sis900, index is in word */

915ebf8da9f4ef3e7b2e34dd367f64d358a628d9Alan Duboff OUTLINL(dp, RFCR,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (RFADDR_MAC_SIS900+i) << RFCR_RFADDR_SHIFT_SIS900);

915ebf8da9f4ef3e7b2e34dd367f64d358a628d9Alan Duboff OUTLINL(dp, RFDR, (mac[i*2+1] << 8) | mac[i*2]);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff bcopy(mac, lp->mac_addr, ETHERADDRL);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Load Multicast hash table */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < hash_size; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* For sis900, index is in word */

915ebf8da9f4ef3e7b2e34dd367f64d358a628d9Alan Duboff OUTLINL(dp, RFCR,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (RFADDR_MULTICAST_SIS900 + i) << RFCR_RFADDR_SHIFT_SIS900);

915ebf8da9f4ef3e7b2e34dd367f64d358a628d9Alan Duboff OUTLINL(dp, RFDR, hash_tbl[i]);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Load rx filter mode and enable rx filter */

915ebf8da9f4ef3e7b2e34dd367f64d358a628d9Alan Duboff OUTLINL(dp, RFCR, RFCR_RFEN | mode);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_SUCCESS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_start_chip(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_dev *lp = dp->private;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(4, (CE_CONT, CONS "%s: %s: called", dp->name, __func__));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->our_intr_bits = OUR_INTR_BITS;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* enable interrupt */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((dp->misc_flag & GEM_NOINTR) == 0) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, IER, 1);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, IMR, lp->our_intr_bits);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Kick RX */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, CR, lp->cr | CR_RXE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_SUCCESS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_stop_chip(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_dev *lp = dp->private;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t done;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

23d366e350386ec109bfa9b2cf91225729a1a26bduboff uint32_t val;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(4, (CE_CONT, CONS "%s: %s: called", dp->name, __func__));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, IMR, 0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* stop TX and RX immediately */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, CR, lp->cr | CR_TXR | CR_RXR);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff done = 0;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; done != (ISR_RXRCMP | ISR_TXRCMP); i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (i > 1000) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_NOTE, "!%s: %s: Tx/Rx reset timeout",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, __func__);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_FAILURE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

23d366e350386ec109bfa9b2cf91225729a1a26bduboff val = INL(dp, ISR);

23d366e350386ec109bfa9b2cf91225729a1a26bduboff done |= val & (ISR_RXRCMP | ISR_TXRCMP);

23d366e350386ec109bfa9b2cf91225729a1a26bduboff lp->isr_pended |= val & lp->our_intr_bits;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff drv_usecwait(10);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_SUCCESS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore#ifndef __sparc

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moorestatic int

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Mooresfe_stop_chip_quiesce(struct gem_dev *dp)

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore{

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore struct sfe_dev *lp = dp->private;

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore uint32_t done;

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore int i;

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore uint32_t val;

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore /*

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore OUTL(dp, IMR, 0);

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore /* stop TX and RX immediately */

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore OUTL(dp, CR, CR_TXR | CR_RXR);

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore done = 0;

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore for (i = 0; done != (ISR_RXRCMP | ISR_TXRCMP); i++) {

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore if (i > 1000) {

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore /*

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore return (DDI_FAILURE);

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore }

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore val = INL(dp, ISR);

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore done |= val & (ISR_RXRCMP | ISR_TXRCMP);

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore lp->isr_pended |= val & lp->our_intr_bits;

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore drv_usecwait(10);

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore }

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore return (DDI_SUCCESS);

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore}

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore#endif

53560dfa94d868e9016a1b90f971fb538dc2009aSherry Moore

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic uint_t

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_mxdma_value[] = { 512, 4, 8, 16, 32, 64, 128, 256, };

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic uint_t

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_encode_mxdma(uint_t burstsize)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (burstsize > 256) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* choose 512 */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 1; i < 8; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (burstsize <= sfe_mxdma_value[i]) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff break;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (i);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_set_media(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t txcfg;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t rxcfg;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t pcr;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t val;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t txmxdma;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t rxmxdma;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_dev *lp = dp->private;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#ifdef DEBUG_LEVEL

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff extern int gem_speed_value[];

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, CONS "%s: %s: %s duplex, %d Mbps",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, __func__,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->full_duplex ? "full" : "half", gem_speed_value[dp->speed]));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* initialize txcfg and rxcfg */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff txcfg = TXCFG_ATP;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (dp->full_duplex) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff txcfg |= (TXCFG_CSI | TXCFG_HBI);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

23d366e350386ec109bfa9b2cf91225729a1a26bduboff rxcfg = RXCFG_AEP | RXCFG_ARP;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (dp->full_duplex) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff rxcfg |= RXCFG_ATX;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* select txmxdma and rxmxdma, maxmum burst length */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (lp->chip->chip_type == CHIPTYPE_SIS900) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#ifdef DEBUG_SIS900_EDB

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = CFG_EDB_MASTER;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#else

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = INL(dp, CFG) & CFG_EDB_MASTER;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (val) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff txmxdma = 64;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff rxmxdma = 64;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff } else {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff txmxdma = 512;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff rxmxdma = 512;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff } else {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff txmxdma = max(dp->txmaxdma, 256);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff rxmxdma = max(dp->rxmaxdma, 256);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* tx high water mark */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->tx_drain_threshold = ROUNDUP2(dp->txthr, TXCFG_FIFO_UNIT);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* determine tx_fill_threshold accroding drain threshold */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->tx_fill_threshold =

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff TXFIFOSIZE - lp->tx_drain_threshold - TXCFG_FIFO_UNIT;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* tune txmxdma not to exceed tx_fill_threshold */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (; ; ) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* normalize txmxdma requested */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = sfe_encode_mxdma(txmxdma);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff txmxdma = sfe_mxdma_value[val];

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (txmxdma <= lp->tx_fill_threshold) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff break;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* select new txmxdma */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff txmxdma = txmxdma / 2;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff txcfg |= val << TXCFG_MXDMA_SHIFT;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* encode rxmxdma, maxmum burst length for rx */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = sfe_encode_mxdma(rxmxdma);

23d366e350386ec109bfa9b2cf91225729a1a26bduboff rxcfg |= val << RXCFG_MXDMA_SHIFT;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff rxmxdma = sfe_mxdma_value[val];

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* receive starting threshold - it have only 5bit-wide field */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = ROUNDUP2(max(dp->rxthr, ETHERMIN), RXCFG_FIFO_UNIT);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->rx_drain_threshold =

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff min(val, (RXCFG_DRTH >> RXCFG_DRTH_SHIFT) * RXCFG_FIFO_UNIT);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "%s: %s: tx: drain:%d(rest %d) fill:%d mxdma:%d,"

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff " rx: drain:%d mxdma:%d",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, __func__,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->tx_drain_threshold, TXFIFOSIZE - lp->tx_drain_threshold,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->tx_fill_threshold, txmxdma,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff lp->rx_drain_threshold, rxmxdma));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ASSERT(lp->tx_drain_threshold < 64*TXCFG_FIFO_UNIT);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ASSERT(lp->tx_fill_threshold < 64*TXCFG_FIFO_UNIT);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ASSERT(lp->rx_drain_threshold < 32*RXCFG_FIFO_UNIT);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff txcfg |= ((lp->tx_fill_threshold/TXCFG_FIFO_UNIT) << TXCFG_FLTH_SHIFT)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff | (lp->tx_drain_threshold/TXCFG_FIFO_UNIT);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, TXCFG, txcfg);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff rxcfg |= ((lp->rx_drain_threshold/RXCFG_FIFO_UNIT) << RXCFG_DRTH_SHIFT);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (lp->chip->chip_type == CHIPTYPE_DP83815) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff rxcfg |= RXCFG_ALP_DP83815;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, RXCFG, rxcfg);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, CONS "%s: %s: txcfg:%b rxcfg:%b",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, __func__,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff txcfg, TXCFG_BITS, rxcfg, RXCFG_BITS));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Flow control */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (lp->chip->chip_type == CHIPTYPE_DP83815) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff pcr = INL(dp, PCR);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff switch (dp->flow_control) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff case FLOW_CONTROL_SYMMETRIC:

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff case FLOW_CONTROL_RX_PAUSE:

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, PCR, pcr | PCR_PSEN | PCR_PS_MCAST);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff break;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff default:

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, PCR,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff pcr & ~(PCR_PSEN | PCR_PS_MCAST | PCR_PS_DA));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff break;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, CONS "%s: PCR: %b", dp->name,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff INL(dp, PCR), PCR_BITS));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff } else if (lp->chip->chip_type == CHIPTYPE_SIS900) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff switch (dp->flow_control) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff case FLOW_CONTROL_SYMMETRIC:

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff case FLOW_CONTROL_RX_PAUSE:

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, FLOWCTL, FLOWCTL_FLOWEN);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff break;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff default:

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, FLOWCTL, 0);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff break;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, CONS "%s: FLOWCTL: %b",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, INL(dp, FLOWCTL), FLOWCTL_BITS));

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_SUCCESS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_get_stats(struct gem_dev *dp)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* do nothing */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (GEM_SUCCESS);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_tx_desc_write(struct gem_dev *dp, int slot,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ddi_dma_cookie_t *dmacookie, int frags, uint64_t flags)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff uint32_t mark;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_desc *tdp;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ddi_dma_cookie_t *dcp;

23d366e350386ec109bfa9b2cf91225729a1a26bduboff uint32_t tmp0;

23d366e350386ec109bfa9b2cf91225729a1a26bduboff#if DEBUG_LEVEL > 2

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff CONS "%s: time:%d %s seqnum: %d, slot %d, frags: %d flags: %llx",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, ddi_get_lbolt(), __func__,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->tx_desc_tail, slot, frags, flags);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < frags; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT, CONS "%d: addr: 0x%x, len: 0x%x",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff i, dmacookie[i].dmac_address, dmacookie[i].dmac_size);

23d366e350386ec109bfa9b2cf91225729a1a26bduboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#if DEBUG_LEVEL > 3

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff flags |= GEM_TXFLAG_INTR;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mark = (flags & GEM_TXFLAG_INTR)

23d366e350386ec109bfa9b2cf91225729a1a26bduboff ? (CMDSTS_OWN | CMDSTS_INTR) : CMDSTS_OWN;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ASSERT(frags == 1);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dcp = &dmacookie[0];

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (flags & GEM_TXFLAG_HEAD) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mark &= ~CMDSTS_OWN;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff tdp = (void *)&dp->tx_ring[SFE_DESC_SIZE * slot];

23d366e350386ec109bfa9b2cf91225729a1a26bduboff tmp0 = (uint32_t)dcp->dmac_address;

23d366e350386ec109bfa9b2cf91225729a1a26bduboff mark |= (uint32_t)dcp->dmac_size;

23d366e350386ec109bfa9b2cf91225729a1a26bduboff tdp->d_bufptr = LE_32(tmp0);

23d366e350386ec109bfa9b2cf91225729a1a26bduboff tdp->d_cmdsts = LE_32(mark);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (frags);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_tx_start(struct gem_dev *dp, int start_slot, int nslot)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

23d366e350386ec109bfa9b2cf91225729a1a26bduboff uint_t tx_ring_size = dp->gc.gc_tx_ring_size;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_desc *tdp;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_dev *lp = dp->private;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (nslot > 1) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff gem_tx_desc_dma_sync(dp,

23d366e350386ec109bfa9b2cf91225729a1a26bduboff SLOT(start_slot + 1, tx_ring_size),

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff nslot - 1, DDI_DMA_SYNC_FORDEV);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff tdp = (void *)&dp->tx_ring[SFE_DESC_SIZE * start_slot];

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff tdp->d_cmdsts |= LE_32(CMDSTS_OWN);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff gem_tx_desc_dma_sync(dp, start_slot, 1, DDI_DMA_SYNC_FORDEV);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /*

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (dp->mac_active) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff OUTL(dp, CR, lp->cr | CR_TXE);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff}

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffsfe_rx_desc_write(struct gem_dev *dp, int slot,

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ddi_dma_cookie_t *dmacookie, int frags)

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff{

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct sfe_desc *rdp;

23d366e350386ec109bfa9b2cf91225729a1a26bduboff uint32_t tmp0;

23d366e350386ec109bfa9b2cf91225729a1a26bduboff uint32_t tmp1;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#if DEBUG_LEVEL > 2

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int i;

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ASSERT(frags == 1);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT, CONS

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "%s: %s seqnum: %d, slot %d, frags: %d",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, __func__, dp->rx_active_tail, slot, frags);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < frags; i++) {

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT, CONS " frag: %d addr: 0x%llx, len: 0x%lx",

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff i, dmacookie[i].dmac_address, dmacookie[i].dmac_size);

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff }

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#endif

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* for the last slot of the packet */

f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff rdp = (void *)&dp->rx_ring[SFE_DESC_SIZE * slot];