/illumos-gate/usr/src/uts/sun4u/sys/ |
H A D | upa64s.h | 59 #define UPA64S_IMR_TO_CPUID(imr) (((imr) & IMR_TID) >> IMR_TID_BIT) 60 #define UPA64S_IMR_TO_MONDO(imr) ((imr) & IMR_MONDO) 62 #define UPA64S_GET_MAP_REG(mondo, imr) ((mondo) | (imr) | IMR_VALID) 91 uint64_t *imr[UPA64S_PORTS]; /* Intr mapping reg; treat */ member in struct:upa64s_devstate 94 uint64_t imr_data[UPA64S_PORTS]; /* imr save/restore area */
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/illumos-gate/usr/src/uts/sun4u/opl/sys/pcicmu/ |
H A D | pcmu_ib.h | 121 #define PCMU_IB_INO_INTR_ISON(imr) ((imr) >> 31) 123 #define PCMU_IB_IMR2MONDO(imr) ((imr) & \
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/illumos-gate/usr/src/uts/sun4u/io/ |
H A D | upa64s.c | 261 if (ddi_regs_map_setup(dip, 1, (caddr_t *)&upa64s_p->imr[0], 268 if (ddi_regs_map_setup(dip, 2, (caddr_t *)&upa64s_p->imr[1], 651 upaport, upa64s_p->imr[upaport], HI32(imr_data), LO32(imr_data)); 653 ddi_put64(upa64s_p->imr_ah[upaport], upa64s_p->imr[upaport], imr_data); 655 imr_data = ddi_get64(upa64s_p->imr_ah[upaport], upa64s_p->imr[upaport]); 697 ddi_put64(upa64s_p->imr_ah[upaport], upa64s_p->imr[upaport], 0); 700 tmp = ddi_get64(upa64s_p->imr_ah[upaport], upa64s_p->imr[upaport]); 878 upa64s_p->imr[0]); 880 upa64s_p->imr[1]); 897 ddi_put64(upa64s_p->imr_ah[0], upa64s_p->imr[ 1179 volatile uint64_t *imr; local [all...] |
/illumos-gate/usr/src/uts/sun4u/sys/pci/ |
H A D | pci_ib.h | 175 #define IB_INO_INTR_ISON(imr) ((imr) >> 31) 176 #define IB_IMR2MONDO(imr) \ 177 ((imr) & (COMMON_INTR_MAP_REG_IGN | COMMON_INTR_MAP_REG_INO))
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/illumos-gate/usr/src/uts/sun4u/io/pci/ |
H A D | pci_cb.c | 194 volatile uint64_t imr; local 203 imr = lddphysio(mr_pa); 204 if (!IB_INO_INTR_ISON(imr)) 213 if (ib_map_reg_get_cpu(imr) == cpu_id)
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H A D | pci_ib.c | 226 volatile uint64_t imr = *imr_p; local 229 if (!IB_INO_INTR_ISON(imr)) 244 *imr_p = ib_get_map_reg(IB_IMR2MONDO(imr), cpu_id); 245 imr = *imr_p; /* flush previous write */ 282 volatile uint64_t imr, *imr_p, *state_reg; local 306 imr = *imr_p; /* flush previous write */ 320 *imr_p = ib_get_map_reg(IB_IMR2MONDO(imr), cpu_id); 321 imr = *imr_p; /* flush previous write */
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/illumos-gate/usr/src/uts/sun4u/opl/io/pcicmu/ |
H A D | pcmu_ib.c | 215 volatile uint64_t imr = *imr_p; local 218 if (!PCMU_IB_INO_INTR_ISON(imr)) 230 *imr_p = ib_get_map_reg(PCMU_IB_IMR2MONDO(imr), cpu_id); 231 imr = *imr_p; /* flush previous write */ 239 volatile uint64_t imr, *imr_p, *state_reg; local 250 imr = *imr_p; /* flush previous write */ 281 *imr_p = ib_get_map_reg(PCMU_IB_IMR2MONDO(imr), cpu_id); 282 imr = *imr_p; /* flush previous write */
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H A D | pcmu_cb.c | 218 volatile uint64_t imr; local 229 imr = lddphysio(mr_pa); 230 if (!PCMU_IB_INO_INTR_ISON(imr))
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/illumos-gate/usr/src/uts/common/io/cpqary3/ |
H A D | cpqary3_talk2ctlr.c | 372 intr = ddi_get32(cpqary3p->imr_handle, (uint32_t *)cpqary3p->imr); 377 (uint32_t *)cpqary3p->imr, intr & ~(intr_mask)); 380 (uint32_t *)cpqary3p->imr, (intr | intr_mask)); 409 intr = ddi_get32(cpqary3p->imr_handle, (uint32_t *)cpqary3p->imr); 414 (uint32_t *)cpqary3p->imr, intr & ~(intr_lockup_mask)); 417 (uint32_t *)cpqary3p->imr, (intr | intr_lockup_mask));
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H A D | cpqary3.h | 356 uint32_t *imr; member in struct:cpqary3_per_controller
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H A D | cpqary3.c | 963 (caddr_t *)&cpqary3p->imr, (offset_t)I2O_INT_MASK, map_len,
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/illumos-gate/usr/src/grub/grub-0.97/netboot/ |
H A D | sis900.h | 25 imr=0x14, /* Interrupt Mask Register */ enumerator in enum:sis900_registers
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H A D | sis900.c | 632 outl(0, ioaddr + imr); 1130 outl(0, ioaddr + imr); 1209 outl(0, ioaddr + imr);
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/illumos-gate/usr/src/cmd/cmd-inet/usr.lib/mdnsd/ |
H A D | mDNSPosix.c | 682 struct ip_mreq imr; local 716 imr.imr_multiaddr.s_addr = AllDNSLinkGroup_v4.ip.v4.NotAnInteger; 717 imr.imr_interface = ((struct sockaddr_in*)intfAddr)->sin_addr; 718 err = setsockopt(*sktPtr, IPPROTO_IP, IP_ADD_MEMBERSHIP, &imr, sizeof(imr));
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