Searched refs:gmbus (Results 1 - 2 of 2) sorted by relevance

/solaris-x11-s11/open-src/kernel/i915/src/
H A Dintel_i2c.c208 /* -1 to map pin pair to gmbus index */
229 * gmbus on gen4 seems to be able to generate legacy interrupts even when in MSI
364 * The gmbus controller can combine a 1 or 2 byte write with a read that
449 /* Generate a STOP condition on the bus. Note that gmbus can't generata
451 * unconditionally generate the STOP condition with an additional gmbus
478 * from retrying. So return -ENXIO only when gmbus properly quiescents -
549 struct intel_gmbus *bus = &dev_priv->gmbus[i];
550 u32 port = i + 1; /* +1 to map gmbus index to pin pair */
554 "i915 gmbus %s",
565 /* gmbus seem
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H A Di915_drv.h1027 struct intel_gmbus gmbus[GMBUS_NUM_PORTS]; member in struct:drm_i915_private
1029 /** gmbus_mutex protects against concurrent usage of the single hw gmbus
1034 * Base address of the gmbus and gpio block.

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