Searched refs:RESET_FLAGS (Results 1 - 18 of 18) sorted by relevance

/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/include/
H A Dutils.h57 #define RESET_FLAGS(flags,bits) ((flags) &= ~(bits)) macro
63 #define RESET_BIT( _bits, _val ) RESET_FLAGS( _bits, (0x1ULL << _val) )
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/l4/
H A Dlm_l4fp.c50 RESET_FLAGS(con->db_data.rx->flags, TOE_RX_DB_DATA_PARTIAL_FILLED_BUF);
117 RESET_FLAGS(tcp_buf->flags, TCP_BUF_FLAG_L4_SPLIT);
171 RESET_FLAGS(tcp_buf->flags ,TCP_BUF_FLAG_L4_SPLIT); /* this is everest internal, don't want miniport looking at this... */
H A Dlm_l4rx.c252 RESET_FLAGS(tcp->rx_con->db_data.rx->flags, TOE_RX_DB_DATA_IGNORE_WND_UPDATES);
350 RESET_FLAGS(con->flags, TCP_POST_COMPLETE_SPLIT);
1139 // RESET_FLAGS(con->dpc_info.dpc_flags, LM_TCP_DPC_NDC);
1153 RESET_FLAGS(con->flags, TCP_POST_DELAYED);
1780 RESET_FLAGS(rx_con->flags, TCP_INDICATE_REJECTED);
1950 RESET_FLAGS(tcp_buf->flags, TCP_BUF_FLAG_L4_PARTIAL_FILLED);
H A Dlm_l4sp.c4540 RESET_FLAGS(((struct toe_context *)tcp->ctx_virt)->timers_context.flags, __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS);
4637 RESET_FLAGS(rx_flags, TCP_REMOTE_FIN_RECEIVED);
4638 RESET_FLAGS(tx_flags, TCP_FIN_REQ_COMPLETED);
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_er.c113 close_g8? RESET_FLAGS(val, IGU_BLOCK_CONFIGURATION_REG_BLOCK_ENABLE) :
170 RESET_FLAGS(reset_mask2, MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_CMN_CPU);
171 RESET_FLAGS(reset_mask2, MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_CMN_CORE);
H A Dlm_phy.c980 RESET_FLAGS( pdev->params.link.multi_phy_config, PORT_HW_CFG_PHY_SELECTION_MASK );
996 RESET_FLAGS( pdev->params.link.multi_phy_config, PORT_HW_CFG_PHY_SELECTION_MASK );
1019 RESET_FLAGS( pdev->params.link.multi_phy_config, PORT_HW_CFG_PHY_SELECTION_MASK );
1054 RESET_FLAGS( pdev->params.link.multi_phy_config, PORT_HW_CFG_PHY_SELECTION_MASK );
1339 RESET_FLAGS(pdev->params.link.feature_config_flags, ELINK_FEATURE_CONFIG_AUTOGREEEN_ENABLED );
1341 RESET_FLAGS(pdev->params.link.eee_mode, // no EEE
1351 RESET_FLAGS(pdev->params.link.eee_mode, ELINK_EEE_MODE_OVERRIDE_NVRAM);
1352 RESET_FLAGS(pdev->params.link.eee_mode, ELINK_EEE_MODE_NVRAM_MASK);
H A Dlm_sb.c1135 RESET_FLAGS(val, HC_CONFIG_0_REG_INT_LINE_EN_0);
1139 RESET_FLAGS(val, (HC_CONFIG_0_REG_INT_LINE_EN_0 |
1209 RESET_FLAGS(val, IGU_PF_CONF_MSI_MSIX_EN);
1213 RESET_FLAGS(val, IGU_PF_CONF_INT_LINE_EN);
1217 RESET_FLAGS(val, (IGU_PF_CONF_INT_LINE_EN | IGU_PF_CONF_SINGLE_ISR_EN));
1279 RESET_FLAGS(val, (HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 |
1316 RESET_FLAGS(val, (IGU_PF_CONF_MSI_MSIX_EN |
H A Dlm_dcbx.c292 RESET_FLAGS(pdev->params.link.feature_config_flags, ELINK_FEATURE_CONFIG_PFC_ENABLED);
4192 RESET_FLAGS(admin_mib.ver_cfg_flags,willing_flags);
4311 RESET_FLAGS(admin_mib.ver_cfg_flags,DCBX_DCBX_ENABLED);
4322 RESET_FLAGS(admin_mib.ver_cfg_flags,DCBX_CEE_VERSION_MASK);
4341 RESET_FLAGS(admin_mib.ver_cfg_flags,DCBX_ETS_CONFIG_TX_ENABLED);
4351 RESET_FLAGS(admin_mib.ver_cfg_flags,DCBX_PFC_CONFIG_TX_ENABLED);
4360 RESET_FLAGS(admin_mib.ver_cfg_flags,DCBX_APP_CONFIG_TX_ENABLED);
4370 RESET_FLAGS(admin_mib.ver_cfg_flags,DCBX_ETS_WILLING);
4379 RESET_FLAGS(admin_mib.ver_cfg_flags,DCBX_PFC_WILLING);
4388 RESET_FLAGS(admin_mi
[all...]
H A Dlm_recv.c823 RESET_FLAGS(pkt->l2pkt_rx_info->flags, LM_RX_FLAG_IP_CKSUM_IS_GOOD);
900 RESET_FLAGS(pkt->l2pkt_rx_info->flags, LM_RX_FLAG_TCP_CKSUM_IS_BAD);
905 RESET_FLAGS(pkt->l2pkt_rx_info->flags, LM_RX_FLAG_TCP_CKSUM_IS_GOOD);
H A Dlm_send.c189 RESET_FLAGS(start_bd->general_data, ETH_TX_START_BD_HDR_NBDS);
977 RESET_FLAGS(parse_bd_e1x->global_data, ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE);
983 RESET_FLAGS(parse_bd_e2->parsing_data, ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE);
H A Dlm_hw_attn.c1068 RESET_FLAGS(val, AEU_INPUTS_ATTN_BITS_SPIO5 ) ;
1078 RESET_FLAGS(ext_phy_config, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_MASK ) ;
1209 RESET_FLAGS( dcc_event, event_val_current );
1222 RESET_FLAGS( dcc_event, event_val_current );
1654 RESET_FLAGS(pdev->vars.link.periodic_flags, ELINK_PERIODIC_FLAGS_LINK_EVENT);
H A Dlm_power.c482 RESET_FLAGS(pf0_pcie_status_control, PCICFG_DEVICE_CONTROL_MPS_MASK);
H A Dlm_hw_access.c1677 RESET_FLAGS( val, PCICFG_COMMAND_BUS_MASTER );
1743 RESET_FLAGS( pci_devctl, PCICFG_DEVICE_STATUS_NON_FATAL_ERR_DET );
H A Dlm_mcp.c1174 RESET_FLAGS( drv_cap_shmem, drv_cap_client );
H A Dlm_devinfo.c116 RESET_FLAGS(iscsi_info_block_hdr_ptr->boot_flags, BOOT_INFO_FLAGS_UEFI_BOOT );
1977 RESET_FLAGS(pdev->params.link.feature_config_flags,ELINK_FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED);
2040 RESET_FLAGS( pdev->params.link.feature_config_flags, ELINK_FEATURE_CONFIG_AUTOGREEEN_ENABLED);
H A Dlm_hw_init_reset.c148 RESET_FLAGS( g_lm_chip_global[bus_num].flags, flags) ;
658 RESET_FLAGS( g_lm_chip_global[bus_num].flags, flags) ;
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/basic_vf/
H A Dlm_vf.c577 RESET_FLAGS(val, (IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN | IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK));
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/
H A Dlm_vf.c2994 RESET_FLAGS(val, (IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN | IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK));

Completed in 201 milliseconds