d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * CDDL HEADER START
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * The contents of this file are subject to the terms of the
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Common Development and Distribution License (the "License").
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * You may not use this file except in compliance with the License.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * or http://www.opensolaris.org/os/licensing.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * See the License for the specific language governing permissions
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * and limitations under the License.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * When distributing Covered Code, include this CDDL HEADER in each
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * If applicable, add the following below this CDDL HEADER, with the
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * fields enclosed by brackets "[]" replaced with your own identifying
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * information: Portions Copyright [yyyy] [name of copyright owner]
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * CDDL HEADER END
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Copyright 2014 QLogic Corporation
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * The contents of this file are subject to the terms of the
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * QLogic End User License (the "License").
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * You may not use this file except in compliance with the License.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * You can obtain a copy of the License at
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * http://www.qlogic.com/Resources/Documents/DriverDownloadHelp/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * See the License for the specific language governing permissions
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * and limitations under the License.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Module Description:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This file contains functions having to do with Device info, licensing
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * and Bandwidth Allocation
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiunsigned long log2_align(unsigned long n);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu64_t lm_get_timestamp_of_recent_cid_recycling(struct _lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi return pdev->vars.last_recycling_timestamp;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu32_t lm_get_max_supported_toe_cons(struct _lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi return pdev->params.max_supported_toe_cons;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu8_t lm_get_toe_rss_possibility(struct _lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi return (pdev->params.l4_rss_is_possible != L4_RSS_DISABLED);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Description:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * reads iscsi_boot info block from shmem
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_get_iscsi_boot_info_block( struct _lm_device_t *pdev, struct _iscsi_info_block_hdr_t* iscsi_info_block_hdr_ptr )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi const u8_t func_mb_id = FUNC_MAILBOX_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // dummy variables so we have convenience way to know the shmem offsets
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // This is a pointer so it doesn't load the stack.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // If we delete these lines we won't have shmem_region_t symbols
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi shmem2_region_t* shmem2_region_dummy = NULL;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi shared_hw_cfg_t* shared_hw_cfg_dummy = NULL;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi shared_feat_cfg_t* shared_feat_cfg_dummy = NULL;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi port_feat_cfg_t* port_feat_cfg_dummy = NULL;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi UNREFERENCED_PARAMETER_(shmem_region_dummy);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi UNREFERENCED_PARAMETER_(shmem2_region_dummy);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi UNREFERENCED_PARAMETER_(shared_hw_cfg_dummy);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi UNREFERENCED_PARAMETER_(port_hw_cfg_dummy);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi UNREFERENCED_PARAMETER_(shared_feat_cfg_dummy);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi UNREFERENCED_PARAMETER_(port_feat_cfg_dummy);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ( CHK_NULL( iscsi_info_block_hdr_ptr ) )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(shmem_region_t,func_mb[func_mb_id].iscsi_boot_signature);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi iscsi_info_block_hdr_ptr->signature = val ;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // only for debugging
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(shmem_region_t,func_mb[func_mb_id].iscsi_boot_block_offset);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS(iscsi_info_block_hdr_ptr->boot_flags, BOOT_INFO_FLAGS_UEFI_BOOT );
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi RESET_FLAGS(iscsi_info_block_hdr_ptr->boot_flags, BOOT_INFO_FLAGS_UEFI_BOOT );
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // If mcp is detected the shmenm is not initialized and
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi struct _lm_device_t *pdev, u32_t *phy_hi, u32_t *phy_lo
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi const u8_t func_mb_id = FUNC_MAILBOX_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(shmem_region_t,func_mb[func_mb_id].iscsi_boot_signature);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi //iscsi_info_block_hdr_ptr->signature = val ;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // only for debugging
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(shmem_region_t,func_mb[func_mb_id].iscsi_boot_block_offset);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(shmem2_region_t,ibft_host_addr);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* get bars... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi rc = mm_get_sriov_info(pdev, &pdev->hw_info.sriov_info);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_set_virt_mode(pdev, DEVICE_TYPE_PF, (pdev->hw_info.sriov_info.total_vfs? VT_BASIC_VF : VT_NONE));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_set_virt_mode(pdev, DEVICE_TYPE_PF, (pdev->hw_info.sriov_info.total_vfs? VT_CHANNEL_VF : VT_NONE));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Since registers from 0x000-0x7ff are spilt across functions, each PF will have the same location for the same 4 bits*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = REG_RD(pdev, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.sriov_info.first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK) * 8) - E2_MAX_NUM_OF_VFS*PATH_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "First VF in PF = %d\n", pdev->hw_info.sriov_info.first_vf_in_pf);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_print_func_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "lm_get_shmem_info: FUNC_ID: %d\n", FUNC_ID(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "lm_get_shmem_info: PCI_FUNC_ID: %d\n", ABS_FUNC_ID(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "lm_get_shmem_info: PORT_ID: %d\n", PORT_ID(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (CHIP_PORT_MODE(pdev) == LM_CHIP_PORT_MODE_4)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "lm_get_shmem_info: ETH_PORT_ID: %d\n", PATH_ID(pdev) + 2*PORT_ID(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "lm_get_shmem_info: ETH_PORT_ID: %d\n", PATH_ID(pdev) + PORT_ID(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "lm_get_shmem_info: PATH_ID: %d\n", PATH_ID(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "lm_get_shmem_info: VNIC_ID: %d\n", VNIC_ID(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "lm_get_shmem_info: FUNC_MAILBOX_ID: %d\n", FUNC_MAILBOX_ID(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Description:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* read the me register to get function number. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Me register: holds the relative-function num + absolute-function num,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * absolute-function-num appears only from E2 and above. Before that these bits
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * always contained zero, therefore we can't take as is. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.pfunc_rel = (u8_t)((val & ME_REG_PF_NUM) >> ME_REG_PF_NUM_SHIFT);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.path_id = (u8_t)((val & ME_REG_ABS_PF_NUM) >> ME_REG_ABS_PF_NUM_SHIFT) & 1;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (CHIP_PORT_MODE(pdev) == LM_CHIP_PORT_MODE_4)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.pfunc_abs = (pdev->params.pfunc_rel << 1) | pdev->params.path_id;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.pfunc_abs = pdev->params.pfunc_rel | pdev->params.path_id;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.pfunc_mb_id = FUNC_MAILBOX_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORM , "relative function %d absolute function %d\n", pdev->params.pfunc_rel, pdev->params.pfunc_abs);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// reads max_payload_size & max_read_req_size from pci config space
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_get_pcicfg_mps_mrrs(lm_device_t * pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* get max payload size and max read size we need it for pxp configuration
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi in the real chip it should be done by the MCP.*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_read_pci(pdev, PCICFG_DEVICE_CONTROL, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_payload_size = (val & 0xe0)>>5;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_read_req_size = (val & 0x7000)>>12;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "reg 0xd8 0x%x \n max_payload %d max_read_req %d \n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val,pdev->hw_info.max_payload_size,pdev->hw_info.max_read_req_size);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_get_pcicfg_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get PCI device and vendor id. (need to be read from parent */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (IS_PFDEV(pdev) || IS_CHANNEL_VFDEV(pdev))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_read_pci(pdev, PCICFG_VENDOR_ID_OFFSET, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "vid 0x%x\n", pdev->hw_info.vid);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "did 0x%x\n", pdev->hw_info.did);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "vid&did for VBD VF will be known later\n"); /*Must be known earlier*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get subsystem and subvendor id. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_read_pci(pdev, PCICFG_SUBSYSTEM_VENDOR_ID_OFFSET, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "svid 0x%x\n", pdev->hw_info.svid);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "ssid 0x%x\n", pdev->hw_info.ssid);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get IRQ, and interrupt pin. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_read_pci(pdev, PCICFG_INT_LINE, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "IRQ 0x%x\n", pdev->hw_info.irq);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "Int pin 0x%x\n", pdev->hw_info.int_pin);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get cache line size. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_read_pci(pdev, PCICFG_CACHE_LINE_SIZE, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.cache_line_size = (u8_t) val;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "Cache line size 0x%x\n", (u8_t) val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.latency_timer = (u8_t) (val >> 8);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "Latency timer 0x%x\n", (u8_t) (val >> 8));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get PCI revision id. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_read_pci(pdev, PCICFG_REVISION_ID_OFFSET, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "Revision id 0x%x\n", pdev->hw_info.rev_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get PCI-E speed*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* only for PF */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_read_pci(pdev, PCICFG_LINK_CONTROL, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* bit 20-25 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.pcie_lane_width = (val & 0x3f00000) >> 20;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "pcie_lane_width 0x%x\n", pdev->hw_info.pcie_lane_width);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* bit 16 - 19 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.pcie_lane_speed = (val & 0xf0000) >> 16;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "pcie_lane_speed 0x%x\n", pdev->hw_info.pcie_lane_speed);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // CQ61532 - Fan Failure test fails when stop the fan for more than 10 seconds and reboot.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Actually most chances we won't get until here if the value is error = we might read other registers before that will hang the machine in Windows
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Hopefully this read will help with other LM drivers
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // anyway, we'll fail the bind for that...
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (GET_FLAGS(pdev->hw_info.rev_id,PCICFG_REVESION_ID_MASK) == PCICFG_REVESION_ID_ERROR_VAL)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This function reads bar offset from PCI configuration
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param _pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param bar_num Bar index: BAR_0 or BAR_1 or BAR_2
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param bar_addr Output value (bar offset).
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return LM_STATUS_SUCCESS if bar offset has been read
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * successfully.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic __inline lm_status_t lm_get_bar_offset_direct(
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi IN u8_t bar_num, /* Bar index: BAR_0 or BAR_1 or BAR_2 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get BARs addresses. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Unsupported bar index: %d\n", bar_num);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_read_pci(pdev, pci_reg, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "BAR %d low 0x%x\n", bar_num,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pci_reg += 4; /* sizeof configuration space bar address register */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_read_pci(pdev, pci_reg, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "BAR %d high 0x%x\n", bar_num,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic __inline lm_status_t lm_get_bar_size_direct (
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Invalid Bar Num\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_reg_rd_ind(pdev,PCICFG_OFFSET + bar_address,&bar_size);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /*extract only bar size*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(PCI_CONFIG_2_BAR1_SIZE == PCI_CONFIG_2_BAR2_SIZE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(PCI_CONFIG_2_BAR2_SIZE == PCI_CONFIG_2_BAR3_SIZE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi bar_size = (bar_size & PCI_CONFIG_2_BAR1_SIZE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /*bar size disabled*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /*bit 1 stand for 64K each bit multiply it by two */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* init pdev->hw_info with data from pcicfg */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_get_bars_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get BARs addresses. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (i = 0; i < ARRSIZE(pdev->hw_info.mem_base); i++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_get_bar_offset(pdev, i, &pdev->hw_info.mem_base[i]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "Bar_Offset=0x%x\n", pdev->hw_info.mem_base[i]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "BAR %d IS NOT PRESENT\n", i);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* TBA: review two intializations done in Teton here (are they needed? are they part of "get_bars_info"):
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi - Enable PCI bus master....
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi - Configure byte swap and enable write to the reg_window registers
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (i = 0; i < MAX_NUM_BAR; i++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* get bar i size*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_get_bar_size(pdev, i, &(pdev->hw_info.bar_size[i]));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "bar %d size 0x%x\n", i, pdev->hw_info.bar_size[i]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Change in BAR1
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * The function will map in case of BAR1 only the ETH cid doorbell space to a virtual address.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * (Map from BAR1 base address, to BAR1 base address plus MAX_ETH_CONS* LM_PAGE_SIZE).
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { //TODO Revise it
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi bar_map_size = LM_DQ_CID_SIZE * MAX_ETH_CONS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakIf(bar_map_size >= pdev->hw_info.bar_size[i]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Map bar i to system address space. If not mapped already. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->vars.mapped_bar_addr[i] = mm_map_io_base(
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "bar %d map io failed\n", i);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "mem_base[%d]=%p size=0x%x\n", i, pdev->vars.mapped_bar_addr[i], pdev->hw_info.bar_size[i]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Now that the bars are mapped, we need to enable target read + write and master-enable,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * we can't do this before bars are mapped, but we need to do this before we start any chip
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * initializations... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.pcie_caps_offset = mm_get_cap_offset(pdev, PCI_CAP_PCIE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->hw_info.pcie_caps_offset != 0 && pdev->hw_info.pcie_caps_offset != 0xFFFFFFFF)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mm_read_pci(pdev, pdev->hw_info.pcie_caps_offset + PCIE_DEV_CAPS, &pdev->hw_info.pcie_dev_capabilities);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN,"Device Capability of PCIe caps is %x\n",pdev->hw_info.pcie_dev_capabilities);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->hw_info.pcie_dev_capabilities & PCIE_DEV_CAPS_FLR_CAPABILITY)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.flr_capable = FALSE; /*Not trusted for PCI_CFG accesible via hypervisor*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.pci_cfg_trust = PCI_CFG_NOT_TRUSTED;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.pci_cfg_trust = PCI_CFG_NOT_TRUSTED;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.grc_didvid = REG_RD(pdev, (PCICFG_OFFSET + PCICFG_VENDOR_ID_OFFSET));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = mm_read_pci(pdev, PCICFG_VENDOR_ID_OFFSET, &pdev->hw_info.pci_cfg_didvid);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->hw_info.grc_didvid != pdev->hw_info.pci_cfg_didvid)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi REG_WR(pdev, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 1);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (i_cycles = 0; i_cycles < 1000; i_cycles++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi tr_e = REG_RD(pdev, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi tw_e = REG_RD(pdev, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi m_e = REG_RD(pdev, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORM, "M:0x%x, TR:0x%x, TW:0x%x\n",m_e,tr_e,tw_e);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_get_chip_id_and_mode(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get the chip revision id and number. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* If OTP process was done on the device, change chip number to 57811 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val=REG_RD(PFDEV(pdev),MISC_REG_CHIP_TYPE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Un-supported chip id for OTP: %d\n", pdev->hw_info.chip_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // the chip rev is realy ASIC when it < 5
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // when it > 5 odd mean FPGA even EMUL.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "FPGA: forcing MPS from %d to 0.\n", pdev->hw_info.max_payload_size);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val=REG_RD(PFDEV(pdev),MISC_REG_CHIP_METAL);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.chip_id |= (val & 0xff) << 4;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi , "chip id 0x%x\n", pdev->hw_info.chip_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Read silent revision */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val=REG_RD(PFDEV(pdev),MISC_REG_CHIP_TEST_REG);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.silent_chip_rev = (val & 0xff);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi , "silent chip rev 0x%x\n", pdev->hw_info.silent_chip_rev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Determine whether we are 2 port or 4 port mode */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* read port4mode_en_ovwr[0];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * b) if 0 read port4mode_en (0 2-port; 1 4-port);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * c) if 1 read port4mode_en_ovwr[1] (0 2-port; 1 4-port);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = REG_RD(PFDEV(pdev), MISC_REG_PORT4MODE_EN_OVWR);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "MISC_REG_PORT4MODE_EN_OVWR = %d\n", val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = REG_RD(PFDEV(pdev), MISC_REG_PORT4MODE_EN);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.chip_port_mode = val? LM_CHIP_PORT_MODE_4 : LM_CHIP_PORT_MODE_2;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "chip_port_mode %s\n", (pdev->hw_info.chip_port_mode == LM_CHIP_PORT_MODE_4 )? "4_PORT" : "2_PORT");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.chip_port_mode = LM_CHIP_PORT_MODE_NONE; /* N/A */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "chip_port_mode NONE\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_get_igu_cam_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_intr_blk_info_t *blk_info = &pdev->hw_info.intr_blk_info;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define IGU_CAM_VFID_MATCH(pdev, igu_fid) (!(igu_fid & IGU_FID_ENCODE_IS_PF) && ((igu_fid & IGU_FID_VF_NUM_MASK) == ABS_VFID(pdev)))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define IGU_CAM_PFID_MATCH(pdev, igu_fid) ((igu_fid & IGU_FID_ENCODE_IS_PF) && ((igu_fid & IGU_FID_PF_NUM_MASK) == FUNC_ID(pdev)))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (INTR_BLK_MODE(pdev) == INTR_BLK_MODE_BC)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.igu_sb_cnt = MAX_RSS_CHAINS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (CHIP_PORT_MODE(pdev) == LM_CHIP_PORT_MODE_2)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.igu_base_sb = VNIC_ID(pdev) * MAX_RSS_CHAINS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.igu_dsb_id = MAX_VNIC_NUM * MAX_RSS_CHAINS + VNIC_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.igu_base_sb = FUNC_ID(pdev) * MAX_RSS_CHAINS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.igu_dsb_id = MAX_VNIC_NUM * MAX_RSS_CHAINS + FUNC_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (vf_id = 0; vf_id < E2_MAX_NUM_OF_VFS; vf_id++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.vf_igu_info[vf_id].igu_base_sb = 0xFF;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.vf_igu_info[vf_id].igu_sb_cnt = 0;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.vf_igu_info[vf_id].igu_test_sb_cnt = 0;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.vf_igu_info[vf_id].igu_test_mode = FALSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (igu_sb_id = 0; igu_sb_id < IGU_REG_MAPPING_MEMORY_SIZE; igu_sb_id++ )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // mapping CAM; relevant for E2 operating mode only.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // [0] - valid.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // [6:1] - vector number;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // [13:7] - FID (if VF - [13] = 0; [12:7] = VF number; if PF - [13] = 1; [12:9] = 0; [8:7] = PF number);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_igu_block_t * lm_igu_sb = &IGU_SB(pdev,igu_sb_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_igu_sb->block_dump = val = REG_RD(PFDEV(pdev), IGU_REG_MAPPING_MEMORY + 4*igu_sb_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "addr:0x%x IGU_CAM[%d]=%x\n",IGU_REG_MAPPING_MEMORY + 4*igu_sb_id, igu_sb_id, val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (!IS_MULTI_VNIC(pdev) && (CHIP_PORT_MODE(pdev) == LM_CHIP_PORT_MODE_2))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_igu_sb->status = LM_IGU_STATUS_AVAILABLE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_igu_sb->status = LM_IGU_STATUS_AVAILABLE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi fid = (val & IGU_REG_MAPPING_MEMORY_FID_MASK) >> IGU_REG_MAPPING_MEMORY_FID_SHIFT;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi current_pf_id = lm_igu_sb->pf_number = fid & IGU_FID_PF_NUM_MASK;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_igu_sb->status |= (LM_IGU_STATUS_AVAILABLE | LM_IGU_STATUS_PF);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_igu_sb->vf_number = fid & IGU_FID_VF_NUM_MASK;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((lm_igu_sb->vf_number >= pdev->hw_info.sriov_info.first_vf_in_pf)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi && (lm_igu_sb->vf_number < (pdev->hw_info.sriov_info.first_vf_in_pf + pdev->hw_info.sriov_info.total_vfs)))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_igu_sb->status |= LM_IGU_STATUS_AVAILABLE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_igu_sb->vector_number = (val & IGU_REG_MAPPING_MEMORY_VECTOR_MASK) >> IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, VERBOSEi, "FID[%d]=%d\n", igu_sb_id, fid);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((IS_PFDEV(pdev) && IGU_CAM_PFID_MATCH(pdev, fid)) ||
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi (IS_VFDEV(pdev) && IGU_CAM_VFID_MATCH(pdev, fid)))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi vec = (val & IGU_REG_MAPPING_MEMORY_VECTOR_MASK) >> IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "VEC[%d]=%d\n", igu_sb_id, vec);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* default status block for default segment + attn segment */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (blk_info->igu_info.igu_base_sb == 0xff)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.igu_base_sb = igu_sb_id;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* we don't count the default */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (!blk_info->igu_info.vf_igu_info[recent_vf_id].igu_test_mode)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "Consecutiveness of IGU for VF%d is broken. My be it's IGU test mode\n",recent_vf_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.vf_igu_info[recent_vf_id].igu_test_mode = TRUE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi else if (IS_CHANNEL_VIRT_MODE_MASTER_PFDEV(pdev))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (blk_info->igu_info.vf_igu_info[vf_id].igu_base_sb == 0xff)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.vf_igu_info[vf_id].igu_base_sb = igu_sb_id;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* we don't count the default */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (!blk_info->igu_info.vf_igu_info[recent_vf_id].igu_test_mode)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "Consecutiveness of IGU for VF%d is broken. My be it's IGU test mode\n",recent_vf_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.vf_igu_info[recent_vf_id].igu_test_mode = TRUE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (blk_info->igu_info.vf_igu_info[vf_id].igu_test_mode)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.vf_igu_info[vf_id].igu_test_sb_cnt++;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.vf_igu_info[vf_id].igu_sb_cnt++;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (!blk_info->igu_info.vf_igu_info[recent_vf_id].igu_test_mode)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "Consecutiveness of IGU for VF%d is broken. My be it's IGU test mode\n",recent_vf_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.vf_igu_info[recent_vf_id].igu_test_mode = TRUE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (blk_info->igu_info.igu_base_sb != 0xff)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* We've already found our base... but now we don't match... these are now igu-test-vectors */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "Consecutiveness of IGU is broken. My be it's IGU test mode\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi igu_test_vectors = TRUE; //TODO Michals: take care of this!!!e2 igu_test will fail.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* No Match - belongs to someone else, check if breaks consecutiveness, if so, break at this point
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * driver doesn't support non-consecutive vectors (EXCEPT Def sb...) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (blk_info->igu_info.igu_base_sb != 0xff)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* We've already found our base... but now we don't match... these are now igu-test-vectors */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "Consecutiveness of IGU is broken. My be it's IGU test mode\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi igu_test_vectors = TRUE; //TODO Michals: take care of this!!!e2 igu_test will fail.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // TODO check cam is valid...
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.igu_sb_cnt = min(blk_info->igu_info.igu_sb_cnt, (u8_t)16);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* E2 TODO: if we don't want to separate u/c/ producers in IGU, this line needs to
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * be removed, and igu_u_offset needs to be set to 'zero'
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.igu_u_sb_offset = blk_info->igu_info.igu_sb_cnt / 2;*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "igu_sb_cnt=%d igu_dsb_id=%d igu_base_sb = %d igu_us_sb_offset = %d igu_test_cnt=%d\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.igu_sb_cnt, blk_info->igu_info.igu_dsb_id, blk_info->igu_info.igu_base_sb, blk_info->igu_info.igu_u_sb_offset,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* CQ61438 - do not show this error message in case of mf mode changed to SF and func >= 2*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((FUNC_ID(pdev) < 2) && (pdev->hw_info.mf_info.mf_mode != SINGLE_FUNCTION))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Igu sb cnt is not valid value=%d\n", blk_info->igu_info.igu_sb_cnt);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (blk_info->igu_info.igu_base_sb == 0xff)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Igu base sb is not valid value=%d\n", blk_info->igu_info.igu_base_sb);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi In case we are in INTA mode, we limit the igu count to 31 as we can't handle more than that */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->params.b_inta_mode_prvided_by_os && (blk_info->igu_info.igu_sb_cnt > IGU_MAX_INTA_SB_CNT ))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.igu_sb_cnt = IGU_MAX_INTA_SB_CNT ;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "IGU CAM INFO: BASE_SB: %d DSB: %d IGU_SB_CNT: %d\n", blk_info->igu_info.igu_base_sb, blk_info->igu_info.igu_dsb_id, blk_info->igu_info.igu_sb_cnt);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Assumptions:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * - the following are initialized before call to this function:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * chip-id, func-rel,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_get_intr_blk_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_intr_blk_info_t *blk_info = &pdev->hw_info.intr_blk_info;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->access_type = INTR_BLK_ACCESS_GRC;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->simd_addr_womask = HC_REG_COMMAND_REG + PORT_ID(pdev)*32 + COMMAND_REG_SIMD_NOMASK;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* The next part is tricky... and has to do with an emulation work-around for handling interrupts, in which
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * we want to read without mask - always... so we take care of it here, instead of changing different ums to
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * call approriate function */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->simd_addr_wmask = HC_REG_COMMAND_REG + PORT_ID(pdev)*32 + COMMAND_REG_SIMD_NOMASK;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->simd_addr_wmask = HC_REG_COMMAND_REG + PORT_ID(pdev)*32 + COMMAND_REG_SIMD_MASK;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* If we have more than 32 status blocks we'll need to read from IGU_REG_SISR_MDPC_WMASK_UPPER */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.intr_blk_info.blk_type = INTR_BLK_IGU;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (REG_RD(PFDEV(pdev), IGU_REG_BLOCK_CONFIGURATION) & IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "IGU Backward Compatible Mode\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "IGU Normal Mode\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* read CAM to get igu info (must be called after we know if we're in backward compatible mode or not )*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi igu_func_id = (1 << IGU_FID_ENCODE_IS_PF_SHIFT) | FUNC_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->igu_info.igu_func_id = igu_func_id;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->params.igu_access_mode == INTR_BLK_ACCESS_GRC)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("VF Can't work in GRC Access mode!\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->access_type = INTR_BLK_ACCESS_GRC;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* [18:12] - FID (if VF - [18] = 0; [17:12] = VF number; if PF - [18] = 1; [17:14] = 0; [13:12] = PF number) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ((IGU_REG_SISR_MDPC_WOMASK_UPPER << IGU_CTRL_REG_ADDRESS_SHIFT) |
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi (IGU_CTRL_CMD_TYPE_RD << IGU_CTRL_REG_TYPE_SHIFT));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->simd_addr_womask = IGU_REG_COMMAND_REG_32LSB_DATA; /* this is where data will be after writing ctrol reg... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* The next part is tricky... and has to do with an emulation work-around for handling interrupts, in which
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * we want to read without mask - always... so we take care of it here, instead of changing different ums to
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * call approriate function */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ((IGU_REG_SISR_MDPC_WOMASK_UPPER << IGU_CTRL_REG_ADDRESS_SHIFT) |
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi (IGU_CTRL_CMD_TYPE_RD << IGU_CTRL_REG_TYPE_SHIFT));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ((IGU_REG_SISR_MDPC_WMASK_LSB_UPPER << IGU_CTRL_REG_ADDRESS_SHIFT) |
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi (IGU_CTRL_CMD_TYPE_RD << IGU_CTRL_REG_TYPE_SHIFT));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->simd_addr_wmask = IGU_REG_COMMAND_REG_32LSB_DATA; /* this is where data will be after writing ctrol reg... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->access_type = INTR_BLK_ACCESS_IGUMEM;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi bar_base = IS_PFDEV(pdev)? BAR_IGU_INTMEM : VF_BAR0_IGU_OFFSET;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->simd_addr_womask = bar_base + IGU_REG_SISR_MDPC_WOMASK_UPPER*8;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* The next part is tricky... and has to do with an emulation work-around for handling interrupts, in which
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * we want to read without mask - always... so we take care of it here, instead of changing different ums to
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * call approriate function */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->simd_addr_wmask = bar_base + IGU_REG_SISR_MDPC_WOMASK_UPPER*8;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi blk_info->simd_addr_wmask = bar_base + IGU_REG_SISR_MDPC_WMASK_LSB_UPPER*8;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_get_nvm_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t val = REG_RD(pdev,MCP_REG_MCPR_NVM_CFG4);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.flash_spec.total_size = NVRAM_1MB_SIZE << (val & MCPR_NVM_CFG4_FLASH_SIZE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.flash_spec.page_size = NVRAM_PAGE_SIZE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* for ediag + lediat we don't really care about licensing!... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define MAX_CONNECTIONS 2048 /* Max 32K Connections per port / vnic-per-port (rounded to power2)*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define MAX_CONNECTIONS (min(16384,(32768 / (log2_align(pdev->hw_info.mf_info.vnics_per_port))))) /* Max 32K Connections per port / vnic-per-port (rounded to power2)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi but no more 16K to limit ilt client page size by 64KB*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define MAX_CONNECTIONS_VF (1 << (LM_VF_MAX_RVFID_SIZE + LM_MAX_VF_CID_WND_SIZE + 1))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define MAX_CONNECTIONS_TOE (min(8192,MAX_CONNECTIONS - MAX_CONNECTIONS_ISCSI - MAX_CONNECTIONS_RDMA - MAX_CONNECTIONS_FCOE - MAX_ETH_CONS - MAX_CONNECTIONS_VF))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic u32_t lm_parse_license_info(u32 val, u8_t is_high)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic u32_t lm_parse_license_info_bounded(u32 val, u32_t max_cons, u8_t is_high)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi license_from_shmem = lm_parse_license_info(val, is_high);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* No special MCP handling for a specific E1H configuration */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* WARNING: Do Not Change these defines!!! They are used in an external tcl script that assumes their values!!! */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define NO_MCP_WA_CFG_SET_MAGIC (0x88AA55FF)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define NO_MCP_WA_VNICS_PER_PORT(port) (0xA0008 + 4*(port))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define NO_MCP_WA_OVLAN(func) (0xA0010 + 4*(func)) // --> 0xA0030
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define NO_MCP_WA_VALID_LIC_MAGIC (0xCCAAFFEE)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_get_shmem_license_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t max_eth_cons[PORT_MAX] = {0,0}; /* Includes VF connections */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t max_bar_supported_cons[PORT_MAX] = {0};
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Even though only one port actually does the initialization, ALL functions need to know the maximum number of connections
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * because that's how they know what the page-size-is, and based on that do per-function initializations as well. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* get values for relevant ports. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, OFFSETOF(shmem_region_t, validity_map[port]),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // check that licensing is enabled
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if(GET_FLAGS(val, SHR_MEM_VALIDITY_LIC_MANUF_KEY_IN_EFFECT | SHR_MEM_VALIDITY_LIC_UPGRADE_KEY_IN_EFFECT))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // align to 32 bit
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(shmem_region_t, drv_lic_key[port].max_toe_conn) & 0xfffffffc;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_toe_cons[port] = lm_parse_license_info_bounded(val, MAX_CONNECTIONS_TOE,FALSE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "max_toe_conn from shmem %d for port %d\n",val, port);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(shmem_region_t, drv_lic_key[port].max_um_rdma_conn) & 0xfffffffc;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_rdma_cons[port] = lm_parse_license_info_bounded(val, MAX_CONNECTIONS_RDMA,FALSE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "max_rdma_conn from shmem %d for port %d\n",val, port);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(shmem_region_t, drv_lic_key[port].max_iscsi_trgt_conn) & 0xfffffffc;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_iscsi_cons[port] = lm_parse_license_info_bounded(val, MAX_CONNECTIONS_ISCSI,TRUE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "max_iscsi_conn from shmem %d for port %d\n",val, port);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(shmem_region_t, drv_lic_key[port].max_fcoe_init_conn) & 0xfffffffc;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_fcoe_cons[port] = MAX_CONNECTIONS_FCOE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "max_fcoe_conn from shmem %d for port %d\n",val, port);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // In case MCP is enabled and there is no licence => there should be no offload connection.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_toe_cons[port] = MAX_CONNECTIONS_TOE_NO_LICENSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_rdma_cons[port] = MAX_CONNECTIONS_ISCSI_NO_LICENSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_iscsi_cons[port] = MAX_CONNECTIONS_RDMA_NO_LICENSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_fcoe_cons[port] = MAX_CONNECTIONS_FCOE_NO_LICENSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* get the bar size... unless it's current port and then we have it. otherwise, read from shmem W.C which
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * is what the other ports asked for, they could have gotten less, but we're looking into the worst case. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_bar_supported_cons[port] = pdev->hw_info.bar_size[BAR_1] / LM_DQ_CID_SIZE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, OFFSETOF(shmem_region_t, dev_info.port_feature_config[port].config), &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = (val & PORT_FEAT_CFG_BAR2_SIZE_MASK) >> PORT_FEAT_CFG_BAR2_SIZE_SHIFT;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* bit 1 stand for 64K each bit multiply it by two */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_bar_supported_cons[port] = val / LM_DQ_CID_SIZE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, NO_MCP_WA_VALID_LIC_ADDR+4*port, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, NO_MCP_WA_TOE_LIC+4*port, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, NO_MCP_WA_ISCSI_LIC+4*port, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, NO_MCP_WA_RDMA_LIC+4*port, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // For backward compatibility, same value if it will be required we can add NO_MCP_WA_FCOE_LIC
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_fcoe_cons[port] = MAX_CONNECTIONS_FCOE_NO_MCP;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Fcoe licencing isn't supported.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, NO_MCP_WA_FCOE_LIC+4*port, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_fcoe_cons[port] = val;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_toe_cons[port] = DEFAULT_CONNECTIONS_TOE - 100;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_toe_cons[port] = DEFAULT_CONNECTIONS_TOE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_iscsi_cons[port] = MAX_CONNECTIONS_ISCSI;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_rdma_cons[port] = MAX_CONNECTIONS_RDMA;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Need to review this value seems like we take in this case the max value
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_fcoe_cons[port] = MAX_CONNECTIONS_FCOE_NO_MCP;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* For MCP - WA, we always assume the same bar size for all ports: makes life simpler... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_bar_supported_cons[port] = pdev->hw_info.bar_size[BAR_1] / LM_DQ_CID_SIZE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* so after all this - what is the maximum number of connections supported for this port? */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_supported_cons[port] = log2_align(max_toe_cons[port] + max_rdma_cons[port] + max_iscsi_cons[port] + max_fcoe_cons[port] + max_eth_cons[port]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_supported_cons[port] = min(max_supported_cons[port], max_bar_supported_cons[port]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* And after all this... in lediag / ediag... we assume a maximum of 1024 connections */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_supported_cons[port] = min(max_supported_cons[port], (u32_t)1024);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (max_supported_cons[port] > pdev->hw_info.max_common_conns)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_common_conns = max_supported_cons[port];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Now, port specific... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* now, there could be a problem where the bar limited us, and the max-connections is smaller than the total above, in this case we need to decrease the
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * numbers relatively... can't touch MAX_ETH_CONS... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (ERR_IF(max_supported_cons[port] < max_eth_cons[port]))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((max_iscsi_cons[port] + max_rdma_cons[port] + max_toe_cons[port] + max_fcoe_cons[port] + max_eth_cons[port]) > max_supported_cons[port])
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* we first try giving iscsi + rdma what they asked for... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((max_iscsi_cons[port] + max_rdma_cons[port] + max_fcoe_cons[port] + max_eth_cons[port]) > max_supported_cons[port])
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t s = max_iscsi_cons[port] + max_rdma_cons[port] + max_toe_cons[port] + max_fcoe_cons[port]; /* eth out of the game... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t t = max_supported_cons[port] - pdev->params.max_eth_including_vfs_conns; /* what we want to reach... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* relatively decrease all... (x+y+z=s, actual = t: xt/s+yt/s+zt/s = t) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* just give toe what's left... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_toe_cons[port] = max_supported_cons[port] - (max_iscsi_cons[port] + max_rdma_cons[port] + max_fcoe_cons[port] + max_eth_cons[port]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (ERR_IF((max_iscsi_cons[port] + max_rdma_cons[port] + max_fcoe_cons[port] + max_toe_cons[port] + max_eth_cons[port]) > max_supported_cons[port]))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Now lets save our port-specific variables. By this stage we have the maximum supported connections for our port. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_toe_conn = max_toe_cons[port];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "max_toe_conn from shmem %d\n",pdev->hw_info.max_port_toe_conn);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_rdma_conn = max_rdma_cons[port];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "max_rdma_conn from shmem %d\n",pdev->hw_info.max_port_rdma_conn);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_iscsi_conn = max_iscsi_cons[port];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "max_iscsi_conn from shmem %d\n",pdev->hw_info.max_port_iscsi_conn);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_fcoe_conn = max_fcoe_cons[port];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "max_fcoe_conn from shmem %d\n",pdev->hw_info.max_port_fcoe_conn);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_conns = log2_align(pdev->hw_info.max_port_toe_conn +
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_rdma_conn + pdev->hw_info.max_port_iscsi_conn
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi + pdev->hw_info.max_port_fcoe_conn + pdev->params.max_eth_including_vfs_conns);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (ERR_IF(pdev->hw_info.max_port_conns > max_bar_supported_cons[port]))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* this would mean an error in the calculations above. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_check_valid_mf_cfg(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_hardware_mf_info_t *mf_info = &pdev->hw_info.mf_info;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* hard coded offsets in vnic_cfg.tcl. if assertion here fails,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * need to fix vnic_cfg.tcl script as well. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// ASSERT_STATIC(OFFSETOF(shmem_region_t,mf_cfg) == 0x7e4);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(OFFSETOF(mf_cfg_t,shared_mf_config.clp_mb) == 0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi //ASSERT_STATIC(MCP_CLP_MB_NO_CLP == 0x80000000); not yet defined
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(OFFSETOF(mf_cfg_t,func_mf_config) == 36);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(OFFSETOF(func_mf_cfg_t,config) == 0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(FUNC_MF_CFG_FUNC_HIDE == 0x1);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(FUNC_MF_CFG_PROTOCOL_ETHERNET_WITH_RDMA == 0x4);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(FUNC_MF_CFG_FUNC_DISABLED == 0x8);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(OFFSETOF(func_mf_cfg_t,mac_upper) == 4);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(OFFSETOF(func_mf_cfg_t,mac_lower) == 8);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(FUNC_MF_CFG_UPPERMAC_DEFAULT == 0x0000ffff);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(FUNC_MF_CFG_LOWERMAC_DEFAULT == 0xffffffff);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(OFFSETOF(func_mf_cfg_t,e1hov_tag) == 12);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(FUNC_MF_CFG_E1HOV_TAG_DEFAULT == 0x0000ffff);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC(sizeof(func_mf_cfg_t) == 24);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* trace mf cfg parameters */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "MF cfg parameters for function %d:\n", func_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "\t func_mf_cfg=0x%x\n\t multi_vnics_mode=%d\n\t vnics_per_port=%d\n\t ovlan/vifid=%d\n\t min_bw=%d\n\t max_bw=%d\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "\t mac addr (overiding main and iscsi): %02x %02x %02x %02x %02x %02x\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* verify that function is not hidden */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (GET_FLAGS(mf_info->func_mf_cfg, FUNC_MF_CFG_FUNC_HIDE))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Enumerated function %d, is marked as hidden\n", func_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (mf_info->vnics_per_port > 1 && !mf_info->multi_vnics_mode)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "invalid mf mode configuration: vnics_per_port=%d, multi_vnics_mode=%d\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi //DbgBreakIf(1);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Sanity checks on outer-vlan for switch_dependent_mode... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* enumerated vnic id > 0 must have valid ovlan if we're in switch-dependet mode */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((VNIC_ID(pdev) > 0) && !VALID_OVLAN(OVLAN(pdev)))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "invalid mf mode configuration: VNICID=%d, Function is enumerated, ovlan (%d) is invalid\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Allow OVLAN 0xFFFF in ediag UFP mode
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* additional sanity checks */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (!VALID_OVLAN(OVLAN(pdev)) && mf_info->multi_vnics_mode)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "invalid mf mode configuration: multi_vnics_mode=%d, ovlan=%d\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Allow OVLAN 0xFFFF in ediag UFP mode
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* verify all functions are either mf mode or sf mode:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * if we set mode to mf, make sure that all non hidden functions have valid ovlan
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * if we set mode to sf, make sure that all non hidden functions have invalid ovlan */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[i].config),&mf_cfg1);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[i].e1hov_tag), &ovlan1);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (!GET_FLAGS(mf_cfg1, FUNC_MF_CFG_FUNC_HIDE) &&
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi (((mf_info->multi_vnics_mode) && !VALID_OVLAN(ovlan1)) ||
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ((!mf_info->multi_vnics_mode) && VALID_OVLAN(ovlan1))))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Allow OVLAN 0xFFFF in eDiag UFP mode
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* verify different ovlan between funcs on same port */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[i].config),&mf_cfg1);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[i].e1hov_tag), &ovlan1);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* iterate from the next function in the port till max func */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[j].config),&mf_cfg2);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[j].e1hov_tag), &ovlan2);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (!GET_FLAGS(mf_cfg1, FUNC_MF_CFG_FUNC_HIDE) && VALID_OVLAN(ovlan1) &&
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi !GET_FLAGS(mf_cfg2, FUNC_MF_CFG_FUNC_HIDE) && VALID_OVLAN(ovlan2) &&
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Check if DCC is active (Debugging only)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, port_mf_config[PATH_ID(pdev)][PORT_ID(pdev)].dynamic_cfg),&dynamic_cfg );
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if( PORT_MF_CFG_E1HOV_TAG_DEFAULT == ( dynamic_cfg & PORT_MF_CFG_E1HOV_TAG_MASK ) )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi } // MULTI_FUNCTION_SD
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchivoid lm_cmng_get_shmem_info( lm_device_t* pdev )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_hardware_mf_info_t *mf_info = &pdev->hw_info.mf_info;;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[i].config),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->min_bw[vnic] = (GET_FLAGS(val, FUNC_MF_CFG_MIN_BW_MASK) >> FUNC_MF_CFG_MIN_BW_SHIFT);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->max_bw[vnic] = (GET_FLAGS(val, FUNC_MF_CFG_MAX_BW_MASK) >> FUNC_MF_CFG_MAX_BW_SHIFT);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/**lm_get_vnics_per_port
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Get the value of vnics_per_port according to the MF mode and
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Note: This function assumes that multi_vnics_mode and
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * chip_port_mode are initialized in hw_info.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return u8_t the value of vnics_per_port for this pdev's port
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * mode and MF mode. This value does not consider hidden
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic u8_t lm_get_vnics_per_port(lm_device_t* pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->hw_info.mf_info.multi_vnics_mode)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* Get shmem multi function config info for switch dependent mode */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_get_shmem_mf_cfg_info_sd(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_hardware_mf_info_t *mf_info = &pdev->hw_info.mf_info;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* get ovlan if we're in switch-dependent mode... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[ABS_FUNC_ID(pdev)].e1hov_tag),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Unexpected at this time */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Invalid mf mode configuration: VNICID=%d, Function is enumerated, ovlan (%d) is invalid\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Allow OVLAN 0xFFFF in ediag UFP mode
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get capabilities */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (GET_FLAGS(mf_info->func_mf_cfg, FUNC_MF_CFG_PROTOCOL_MASK) == FUNC_MF_CFG_PROTOCOL_ISCSI)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mf_proto_support_flags |= LM_PROTO_SUPPORT_ISCSI;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi else if (GET_FLAGS(mf_info->func_mf_cfg, FUNC_MF_CFG_PROTOCOL_MASK) == FUNC_MF_CFG_PROTOCOL_FCOE)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mf_proto_support_flags |= LM_PROTO_SUPPORT_FCOE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mf_proto_support_flags |= LM_PROTO_SUPPORT_ETHERNET;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->vnics_per_port = lm_get_vnics_per_port(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* Get shmem multi function config info for switch dependent mode */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_get_shmem_mf_cfg_info_sd_bd(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status_t lm_status = lm_get_shmem_mf_cfg_info_sd(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* Get shmem multi function config info for switch dependent mode */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_get_shmem_mf_cfg_info_sd_ufp(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status_t lm_status = lm_get_shmem_mf_cfg_info_sd(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void _copy_mac_upper_lower_to_arr(IN u32_t mac_upper, IN u32_t mac_lower, OUT u8_t* mac_addr)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_get_shmem_ext_mac_addresses(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi const u8_t abs_func_id = ABS_FUNC_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* We have a different mac address per iscsi / fcoe - we'll set it from extended multi function info, but only if it's valid, otherwise
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * we'll leave the same mac as for L2
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(mf_cfg_t, func_ext_config[abs_func_id].iscsi_mac_addr_upper);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(mf_cfg_t, func_ext_config[abs_func_id].iscsi_mac_addr_lower);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi _copy_mac_upper_lower_to_arr(mac_upper, mac_lower, pdev->hw_info.iscsi_mac_addr);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(mf_cfg_t, func_ext_config[abs_func_id].fcoe_mac_addr_upper);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(mf_cfg_t, func_ext_config[abs_func_id].fcoe_mac_addr_lower);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi _copy_mac_upper_lower_to_arr(mac_upper, mac_lower, pdev->hw_info.fcoe_mac_addr);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(mf_cfg_t, func_ext_config[abs_func_id].fcoe_wwn_port_name_upper);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(mf_cfg_t, func_ext_config[abs_func_id].fcoe_wwn_port_name_lower);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi _copy_mac_upper_lower_to_arr(mac_upper, mac_lower, &(pdev->hw_info.fcoe_wwn_port_name[2]));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.fcoe_wwn_port_name[0] = (u8_t) (mac_upper >> 24);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.fcoe_wwn_port_name[1] = (u8_t) (mac_upper >> 16);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(mf_cfg_t, func_ext_config[abs_func_id].fcoe_wwn_node_name_upper);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(mf_cfg_t, func_ext_config[abs_func_id].fcoe_wwn_node_name_lower);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi _copy_mac_upper_lower_to_arr(mac_upper, mac_lower, &(pdev->hw_info.fcoe_wwn_node_name[2]));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.fcoe_wwn_node_name[0] = (u8_t) (mac_upper >> 24);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.fcoe_wwn_node_name[1] = (u8_t) (mac_upper >> 16);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_get_shmem_ext_proto_support_flags(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_ext_config[ABS_FUNC_ID(pdev)].func_cfg),&func_ext_cfg);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (GET_FLAGS(func_ext_cfg, MACP_FUNC_CFG_FLAGS_ENABLED ))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (GET_FLAGS(func_ext_cfg, MACP_FUNC_CFG_FLAGS_ETHERNET))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi proto_support_flags |= LM_PROTO_SUPPORT_ETHERNET;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (GET_FLAGS(func_ext_cfg, MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi proto_support_flags |= LM_PROTO_SUPPORT_ISCSI;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (GET_FLAGS(func_ext_cfg, MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi proto_support_flags |= LM_PROTO_SUPPORT_FCOE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* Get shmem multi function config info for switch independent mode */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_get_shmem_mf_cfg_info_si(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_hardware_mf_info_t *mf_info = &pdev->hw_info.mf_info;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* No outer-vlan... we're in switch-independent mode, so if the mac is valid - assume multi-function */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_ext_config[ABS_FUNC_ID(pdev)].func_cfg),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mf_proto_support_flags = lm_get_shmem_ext_proto_support_flags(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->vnics_per_port = lm_get_vnics_per_port(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_get_shmem_mf_cfg_info_niv(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_hardware_mf_info_t *mf_info = &pdev->hw_info.mf_info;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[ABS_FUNC_ID(pdev)].e1hov_tag),&e1hov_tag);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[ABS_FUNC_ID(pdev)].config), &func_config);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[ABS_FUNC_ID(pdev)].afex_config), &niv_config);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->ext_id = (u16_t)(GET_FLAGS(e1hov_tag, FUNC_MF_CFG_E1HOV_TAG_MASK)>>FUNC_MF_CFG_E1HOV_TAG_SHIFT);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->default_vlan = (u16_t)(GET_FLAGS(e1hov_tag, FUNC_MF_CFG_AFEX_VLAN_MASK)>>FUNC_MF_CFG_AFEX_VLAN_SHIFT);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->niv_allowed_priorities = (u8_t)(GET_FLAGS(niv_config, FUNC_MF_CFG_AFEX_COS_FILTER_MASK)>>FUNC_MF_CFG_AFEX_COS_FILTER_SHIFT);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->niv_default_cos = (u8_t)(GET_FLAGS(func_config, FUNC_MF_CFG_TRANSMIT_PRIORITY_MASK)>>FUNC_MF_CFG_TRANSMIT_PRIORITY_SHIFT);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->afex_vlan_mode = GET_FLAGS(niv_config, FUNC_MF_CFG_AFEX_VLAN_MODE_MASK)>>FUNC_MF_CFG_AFEX_VLAN_MODE_SHIFT;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->niv_mba_enabled = GET_FLAGS(niv_config, FUNC_MF_CFG_AFEX_MBA_ENABLED_MASK)>>FUNC_MF_CFG_AFEX_MBA_ENABLED_SHIFT;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mf_proto_support_flags = lm_get_shmem_ext_proto_support_flags(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->vnics_per_port = lm_get_vnics_per_port(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_shmem_set_default(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_hardware_mf_info_t *mf_info = &pdev->hw_info.mf_info;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* set defaults: */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->ext_id = 0xffff; /* invalid ovlan */ /* TBD - E1H: - what is the right value for Cisco? */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC( ARRSIZE(mf_info->min_bw) == ARRSIZE(mf_info->max_bw) )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (i = 0; i < ARRSIZE(mf_info->min_bw); i++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_toe_conn = MAX_CONNECTIONS_TOE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_rdma_conn = MAX_CONNECTIONS_RDMA;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_iscsi_conn = MAX_CONNECTIONS_ISCSI;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_fcoe_conn = MAX_CONNECTIONS_FCOE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_conns = MAX_CONNECTIONS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_common_conns = MAX_CONNECTIONS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic u32_t lm_get_shmem_base_addr(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = REG_RD(pdev,MISC_REG_SHARED_MEM_ADDR);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL , "Unknown chip 0x%x, pcicfg[0]=0x%x, GRC[0x2000]=0x%x\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi CHIP_NUM(pdev), pcicfg_chip, REG_RD(pdev, 0x2000));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (val < min_shmem_addr || val >= max_shmem_addr)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Invalid shmem base address return '0' */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This function is called when MCP is not detected. It
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * initializes lmdevice parameters that are required for
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * functional running with default values or values read
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * from vnic_cfg.tcl script.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return lm_status_t
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_get_shmem_info_no_mcp_bypass(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_hardware_mf_info_t *mf_info = &pdev->hw_info.mf_info;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "MCP Down Detected\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = REG_RD(pdev,MISC_REG_SHARED_MEM_ADDR);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "FW ShMem addr: 0x%x\n", val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#endif // _VBD_CMD_
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* should have a magic number written if configuration was set otherwise, use default above */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, NO_MCP_WA_CFG_SET_ADDR, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, NO_MCP_WA_FORCE_5710, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, NO_MCP_WA_MULTI_VNIC_MODE, &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, NO_MCP_WA_OVLAN(ABS_FUNC_ID(pdev)), &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->multi_vnics_mode = VALID_OVLAN(mf_info->ext_id)? 1 : 0;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->path_has_ovlan = mf_info->multi_vnics_mode;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* decide on path multi vnics mode - incase we're not in mf mode...and in 4-port-mode good enough to check vnic-0 of the other port, on the same path */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((CHIP_PORT_MODE(pdev) == LM_CHIP_PORT_MODE_4) && !mf_info->multi_vnics_mode)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u8_t abs_func_on_other_port = PATH_ID(pdev) + 2*other_port;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, NO_MCP_WA_OVLAN(abs_func_on_other_port), &val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->path_has_ovlan = VALID_OVLAN((u16_t)val) ? 1 : 0;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* For simplicity, we leave vnics_per_port to be 2, for resource splitting issues... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (CHIP_PORT_MODE(pdev) == LM_CHIP_PORT_MODE_4)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* If we're multi-vnic, we'll set a default mf_mode of switch-dependent, this could be overriden
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * later on by registry */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_get_shmem_license_info(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* sanity checks on vnic params */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Invalid ovlan (0x%x) configured for Func %d. Can't load the function.\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((mf_info->vnics_per_port - 1 < VNIC_ID(pdev)) || ( !mf_info->multi_vnics_mode && (VNIC_ID(pdev) > 0)))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Invalid vnics_per_port (%d) configured for Func %d. Can't load the function.\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->vnics_per_port, ABS_FUNC_ID(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_get_shmem_shared_hw_config(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get the hw config words. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, OFFSETOF(shmem_region_t, dev_info.shared_hw_config.config),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.link.hw_led_mode = ((pdev->hw_info.nvm_hw_config & SHARED_HW_CFG_LED_MODE_MASK) >> SHARED_HW_CFG_LED_MODE_SHIFT);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "nvm_hw_config %d\n",val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t, dev_info.shared_hw_config.config2),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "nvm_hw_configs %d\n",val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t, dev_info.shared_hw_config.part_num),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[1] = (u8_t) (val >> 8);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[2] = (u8_t) (val >> 16);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[3] = (u8_t) (val >> 24);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t, dev_info.shared_hw_config.part_num)+4,&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[5] = (u8_t) (val >> 8);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[6] = (u8_t) (val >> 16);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[7] = (u8_t) (val >> 24);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t, dev_info.shared_hw_config.part_num)+8,&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[9] = (u8_t) (val >> 8);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[10] =(u8_t) (val >> 16);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[11] =(u8_t) (val >> 24);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t, dev_info.shared_hw_config.part_num)+12,&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[13] = (u8_t) (val >> 8);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[14] = (u8_t) (val >> 16);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.board_num[15] = (u8_t) (val >> 24);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (i = 0 ; i < 16 ; i++ )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "%02x",pdev->hw_info.board_num[i]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get the override preemphasis flag */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.shared_feature_config.config),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if GET_FLAGS(val, SHARED_FEAT_CFG_OVERRIDE_PREEMPHASIS_CFG_ENABLED)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS( pdev->params.link.feature_config_flags, ELINK_FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi RESET_FLAGS(pdev->params.link.feature_config_flags,ELINK_FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Diag doesn't support remote fault detection */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS( pdev->params.link.feature_config_flags, ELINK_FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Only Diag supports IEEE PHY testing */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS( pdev->params.link.feature_config_flags, ELINK_FEATURE_CONFIG_IEEE_PHY_TEST);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic u32_t lm_get_shmem_mf_cfg_base(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = pdev->hw_info.shmem_base + OFFSETOF(shmem_region_t, func_mb) + E1H_FUNC_MAX * sizeof(struct drv_func_mb);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM2_READ(pdev, OFFSETOF(shmem2_region_t,size), &shmem2_size);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (shmem2_size > OFFSETOF(shmem2_region_t,mf_cfg_addr))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM2_READ(pdev, OFFSETOF(shmem2_region_t,mf_cfg_addr), &mf_cfg_offset_value);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (SHMEM_MF_CFG_ADDR_NONE != mf_cfg_offset_value)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_get_shmem_port_hw_config(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* mba features*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].mba_config),
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.mba_features = (val & PORT_FEATURE_MBA_BOOT_AGENT_TYPE_MASK);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "mba_features %d\n",pdev->hw_info.mba_features);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* mba_vlan_cfg */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].mba_vlan_cfg),
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "mba_vlan_cfg 0x%x\n",pdev->hw_info.mba_vlan_cfg);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // port_feature_config bits
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].config),
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "port_feature_config 0x%x\n",pdev->hw_info.port_feature_config);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* AutogrEEEn settings */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if(val & PORT_FEAT_CFG_AUTOGREEEN_ENABLED) {
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS( pdev->params.link.feature_config_flags, ELINK_FEATURE_CONFIG_AUTOGREEEN_ENABLED);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi RESET_FLAGS( pdev->params.link.feature_config_flags, ELINK_FEATURE_CONFIG_AUTOGREEEN_ENABLED);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* clc params*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[port].speed_capability_mask),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.link.speed_cap_mask[0] = val & PORT_HW_CFG_SPEED_CAPABILITY_D0_MASK;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "speed_cap_mask1 %d\n",val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[port].speed_capability_mask2),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.link.speed_cap_mask[1] = val & PORT_HW_CFG_SPEED_CAPABILITY_D0_MASK;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "speed_cap_mask2 %d\n",val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get lane swap*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[port].lane_config),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "lane_config %d\n",val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /*link config */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].link_config),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.link_config[ELINK_INT_PHY] = val;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.link.switch_cfg = val & PORT_FEATURE_CONNECTED_SWITCH_MASK;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "link config %d\n",val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].link_config2),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.link_config[ELINK_EXT_PHY1] = val;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[port].multi_phy_config),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* set the initial value to the link params */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* save the initial value if we'll want to restore it later */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* check if 10g KR is blocked on this session */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[port].default_cfg),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.phy_force_kr_enabler = (val & PORT_HW_CFG_FORCE_KR_ENABLER_MASK) ;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* If the force KR enabler is on, 10G/20G should have been enabled in the
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * nvram as well. If 10G/20G capbility is not set, it means that the MFW
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * disabled it and we should set the no_10g_kr flag */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if(( PORT_HW_CFG_FORCE_KR_ENABLER_NOT_FORCED != pdev->hw_info.phy_force_kr_enabler ) &&
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ( FALSE == ( pdev->params.link.speed_cap_mask[0] & (PORT_HW_CFG_SPEED_CAPABILITY_D0_10G | PORT_HW_CFG_SPEED_CAPABILITY_D0_20G))) )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* read EEE mode from shmem (original source is NVRAM) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].eee_power_mode),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.link.eee_mode = val & PORT_FEAT_CFG_EEE_POWER_MODE_MASK;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "eee_power_mode 0x%x\n", pdev->params.link.eee_mode);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((pdev->params.link.eee_mode & PORT_FEAT_CFG_EEE_POWER_MODE_MASK) != PORT_FEAT_CFG_EEE_POWER_MODE_DISABLED)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* Check if other path is in multi_function_mode */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_set_path_has_ovlan(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_hardware_mf_info_t *mf_info = &pdev->hw_info.mf_info;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi else if (mf_info->mf_mode == SINGLE_FUNCTION)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* decide on path multi vnics mode - incase we're not in mf mode...and in 4-port-mode good enough to check vnic-0 of the other port, on the same path */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (CHIP_PORT_MODE(pdev) == LM_CHIP_PORT_MODE_4)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u8_t abs_func_on_other_port = PATH_ID(pdev) + 2*other_port;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[abs_func_on_other_port].e1hov_tag),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mf_info->path_has_ovlan = VALID_OVLAN((u16_t)val) ? 1 : 0;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Initializes mf mode and data, checks that mf info is valid
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * by checking that MAC address must be legal (check only upper
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * bytes) for Switch-Independent mode;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * OVLAN must be legal for Switch-Dependent mode
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return lm_status_t
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_get_shmem_mf_cfg_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_hardware_mf_info_t *mf_info = &pdev->hw_info.mf_info;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Set some mf_info defaults */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get the multi-function-mode value (switch dependent / independent / single-function ) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.shared_feature_config.config),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi case SHARED_FEAT_CFG_FORCE_SF_MODE_SWITCH_INDEPT:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[ABS_FUNC_ID(pdev)].mac_upper),&mac_upper);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* check for legal mac (upper bytes)*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (mac_upper != FUNC_MF_CFG_UPPERMAC_DEFAULT)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "Illegal configuration for switch independent mode\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi case SHARED_FEAT_CFG_FORCE_SF_MODE_MF_ALLOWED:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* get OV configuration */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[ABS_FUNC_ID(pdev)].e1hov_tag),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "Illegal configuration for switch dependent mode\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi case SHARED_FEAT_CFG_FORCE_SF_MODE_FORCED_SF:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* We're not in multi-function mode - return with vnics_per_port=1 & multi_vnics_mode = FALSE*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi case SHARED_FEAT_CFG_FORCE_SF_MODE_AFEX_MODE:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* mark mf mode as NIV if MCP version includes NPAR-SD support
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi and the MAC address is valid.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[ABS_FUNC_ID(pdev)].mac_upper),&mac_upper);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((LM_SHMEM2_HAS(pdev, afex_driver_support)) &&
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi (mac_upper != FUNC_MF_CFG_UPPERMAC_DEFAULT) )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "Illegal configuration for NPAR-SD mode\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi case SHARED_FEAT_CFG_FORCE_SF_MODE_BD_MODE:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "lm_get_shmem_info: SF_MODE_BD_MODE is detected.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi case SHARED_FEAT_CFG_FORCE_SF_MODE_UFP_MODE:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "lm_get_shmem_info: SF_MODE_UFP_MODE is detected.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi case SHARED_FEAT_CFG_FORCE_SF_MODE_EXTENDED_MODE:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get extended mf mode value */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev, OFFSETOF(shmem_region_t, dev_info.shared_hw_config.config_3),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val2 &= SHARED_HW_CFG_EXTENDED_MF_MODE_MASK;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi case SHARED_HW_CFG_EXTENDED_MF_MODE_NPAR1_DOT_5:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg(" Unknown extended mf mode\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Set path mf_mode (which could be different than function mf_mode) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Invalid Multi function configuration: */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get the multi-function configuration */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[ABS_FUNC_ID(pdev)].config),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi status = lm_get_shmem_mf_cfg_info_sd(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi status = lm_get_shmem_mf_cfg_info_sd_ufp(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi status = lm_get_shmem_mf_cfg_info_sd_bd(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_fcoe_set_default_wwns(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* create default wwns from fcoe mac adress */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mm_memcpy(&(pdev->hw_info.fcoe_wwn_port_name[2]), pdev->hw_info.fcoe_mac_addr, 6);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.fcoe_wwn_port_name[0] = 0x20;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mm_memcpy(&(pdev->hw_info.fcoe_wwn_node_name[2]), pdev->hw_info.fcoe_mac_addr, 6);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.fcoe_wwn_node_name[0] = 0x10;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_get_shmem_mf_mac_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_hardware_mf_info_t *mf_info = &pdev->hw_info.mf_info;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get the permanent L2 MAC address. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[ABS_FUNC_ID(pdev)].mac_upper),&mac_upper);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_mf_config[ABS_FUNC_ID(pdev)].mac_lower),&mac_lower);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Mac validity is assumed since we already checked it to determine mf_mode. And we assume mf_mode
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * is configured correctly when we enter this function. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS(mf_info->flags,MF_INFO_VALID_MAC);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi _copy_mac_upper_lower_to_arr(mac_upper, mac_lower, pdev->hw_info.mac_addr);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Set iSCSI / FCOE Mac addresses */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // in E1x the ext mac doesn't exists and will cause MCP parity error CQ67469
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ( CHIP_IS_E1x(pdev) || IS_SD_UFP_MODE(pdev) || IS_SD_BD_MODE(pdev))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Set all iscsi and fcoe mac addresses the same as network. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mm_memcpy(pdev->hw_info.iscsi_mac_addr, pdev->hw_info.mac_addr, 6);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mm_memcpy(pdev->hw_info.fcoe_mac_addr, pdev->hw_info.mac_addr, 6);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_get_shmem_sf_mac_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t, dev_info.port_hw_config[PORT_ID(pdev)].mac_upper),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t, dev_info.port_hw_config[PORT_ID(pdev)].mac_lower),&val2);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi _copy_mac_upper_lower_to_arr(val, val2, pdev->hw_info.mac_addr);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get iSCSI MAC address. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].iscsi_mac_upper),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].iscsi_mac_lower),&val2);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi _copy_mac_upper_lower_to_arr(val, val2, pdev->hw_info.iscsi_mac_addr);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Get FCoE MAC addresses. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_fip_mac_upper),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_fip_mac_lower),&val2);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi _copy_mac_upper_lower_to_arr(val, val2, pdev->hw_info.fcoe_mac_addr);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_wwn_port_name_upper),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_wwn_port_name_lower),&val2);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi _copy_mac_upper_lower_to_arr(val, val2, &(pdev->hw_info.fcoe_wwn_port_name[2]));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.fcoe_wwn_port_name[0] = (u8_t) (val >> 24);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.fcoe_wwn_port_name[1] = (u8_t) (val >> 16);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_wwn_node_name_upper),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_wwn_node_name_lower),&val2);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi _copy_mac_upper_lower_to_arr(val, val2, &(pdev->hw_info.fcoe_wwn_node_name[2]));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.fcoe_wwn_node_name[0] = (u8_t) (val >> 24);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.fcoe_wwn_node_name[1] = (u8_t) (val >> 16);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "main mac addr: %02x %02x %02x %02x %02x %02x\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "iSCSI mac addr: %02x %02x %02x %02x %02x %02x\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* Gets the sriov info from shmem of ALL functions and marks if configuration is assymetric */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_get_shmem_sf_sriov_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi const lm_chip_port_mode_t port_mode = CHIP_PORT_MODE(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u8_t port_max = (port_mode == LM_CHIP_PORT_MODE_2)? 1 : PORT_MAX;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC((FIELD_SIZE(struct shm_dev_info, port_hw_config)/FIELD_SIZE(struct shm_dev_info, port_hw_config[0])) >= max(PORT_MAX,1));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.sriov_info.shmem_num_vfs_in_pf = 0;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.sriov_info.b_pf_asymetric_configuration = FALSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (port_idx = 0; port_idx < port_max; port_idx++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(shmem_region_t,dev_info.port_hw_config[port_idx].pf_allocation);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = (val & PORT_HW_CFG_NUMBER_OF_VFS_MASK) >> PORT_HW_CFG_NUMBER_OF_VFS_SHIFT;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.sriov_info.shmem_num_vfs_in_pf = val;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* check if assymteric configuration...basically we initialize both params to 0xff, so the only way they can both be
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * the same is if one of the ports was enabled and one was disabled... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.sriov_info.b_pf_asymetric_configuration = TRUE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.sriov_info.b_pf_asymetric_configuration = FALSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_get_shmem_mf_sriov_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC((FIELD_SIZE(struct mf_cfg, func_mf_config) / FIELD_SIZE(struct mf_cfg, func_mf_config[0])) == E2_FUNC_MAX*2);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.sriov_info.shmem_num_vfs_in_pf = 0;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.sriov_info.b_pf_asymetric_configuration = FALSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = OFFSETOF(mf_cfg_t, func_mf_config[abs_func_idx].pf_allocation);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi val = (val & FUNC_MF_CFG_NUMBER_OF_VFS_MASK) >> FUNC_MF_CFG_NUMBER_OF_VFS_SHIFT;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.sriov_info.shmem_num_vfs_in_pf = val;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* check if assymteric configuration...basically we initialize both params to 0xff, so the only way they can both be
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * the same is if one of the ports was enabled and one was disabled... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.sriov_info.b_pf_asymetric_configuration = TRUE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.sriov_info.b_pf_asymetric_configuration = FALSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_get_shmem_mac_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->hw_info.mf_info.mf_mode == SINGLE_FUNCTION)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_get_shmem_sf_mac_info(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_get_shmem_mf_mac_info(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_get_shmem_sriov_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi const u32_t bc_rev = LM_GET_BC_REV_MAJOR(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (CHIP_IS_E1x(pdev) || (bc_rev < BC_REV_IE_SRIOV_SUPPORTED))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->hw_info.mf_info.mf_mode == SINGLE_FUNCTION)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_get_shmem_fw_flow_control(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // if this static assert fails consider adding the new mode to the if
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // and read the l2_fw_flow_ctrl from the shmem in the new mode also
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // l2_fw_flow_ctrl is read from the shmem in multi-function mode in E2 and above.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // In all other cases this parameter is read from the registry.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // We read this parameter from the registry in E1.5 multi-function since 57711 boot code does not have the struct func_ext_cfg
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (((pdev->hw_info.mf_info.mf_mode == MULTI_FUNCTION_SI) ||
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi (pdev->hw_info.mf_info.mf_mode == MULTI_FUNCTION_AFEX)) &&
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_MFCFG_READ(pdev, OFFSETOF(mf_cfg_t, func_ext_config[ABS_FUNC_ID(pdev)].func_cfg), &func_ext_cfg);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (GET_FLAGS(func_ext_cfg, MACP_FUNC_CFG_PAUSE_ON_HOST_RING))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @Description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This function is responsible for reading all the data
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * that the driver needs before loading from the shmem.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return lm_status_t
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_get_shmem_info(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi return lm_get_shmem_info_no_mcp_bypass(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.shmem_base2 = REG_RD(pdev, PATH_ID(pdev) ? MISC_REG_GENERIC_CR_1 : MISC_REG_GENERIC_CR_0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.mf_cfg_base = lm_get_shmem_mf_cfg_base(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "MCP Up Detected. shmem_base=0x%x shmem_base2=0x%x mf_cfg_offset=0x%x\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.shmem_base, pdev->hw_info.shmem_base2, pdev->hw_info.mf_cfg_base);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_verify_validity_map( pdev );
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "lm_get_shmem_info: Shmem signature not present.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.bc_rev),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "bc_rev %d\n",val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_get_shmem_shared_hw_config(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "lm_get_shmem_shared_hw_config returned lm_status=%d\n", lm_status);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_get_shmem_port_hw_config(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "lm_get_shmem_port_hw_config returned lm_status=%d\n", lm_status);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Check License for toe/rdma/iscsi */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_get_shmem_license_info(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "lm_get_shmem_license_info returned lm_status=%d\n", lm_status);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* get mf config parameters */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (IS_MF_MODE_CAPABLE(pdev) && (pdev->hw_info.mf_cfg_base != SHMEM_MF_CFG_ADDR_NONE))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status = lm_get_shmem_mf_cfg_info(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "lm_get_shmem_mf_cfg_info returned lm_status=%d\n", lm_status);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "Illegal to load func %d of port %d on non MF mode capable device\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.link.shmem_base = NO_MCP_WA_CLC_SHMEM;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.link.shmem2_base= NO_MCP_WA_CLC_SHMEM;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.link.shmem_base = pdev->hw_info.shmem_base;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.link.shmem2_base= pdev->hw_info.shmem_base2;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Only if LFA is supported in MFW
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (LM_SHMEM2_HAS(pdev,lfa_host_addr[port]))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM2_READ(pdev, OFFSETOF(shmem2_region_t, lfa_host_addr[port]), &pdev->params.link.lfa_base);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.link.chip_id = pdev->hw_info.chip_id;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ///TODO remove - the initialization in lm_mcp_cmd_init should be enough, but BC versions are still in flux.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if(pdev->hw_info.mf_info.mf_mode == MULTI_FUNCTION_AFEX) //we can't use IS_MF_NIV_MODE because params.mf_mode is not initalized yet.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS( pdev->params.link.feature_config_flags, ELINK_FEATURE_CONFIG_BC_SUPPORTS_AFEX );
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "init_link_params: chip bond id is 0x%x\n",val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->hw_info.chip_port_mode == LM_CHIP_PORT_MODE_4)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi feat_val |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_BMAC;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // force to work with emac
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.link.req_line_speed[0] = ELINK_SPEED_1000;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi feat_val |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_XMAC;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi feat_val |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_BMAC;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi feat_val |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_UMAC;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi feat_val |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_EMAC;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Disable EMAC for E3 and above */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi feat_val |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_EMAC;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_FLAGS(pdev->params.link.feature_config_flags, feat_val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/** lm_init_cam_params
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * set cam/mac parameters
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * cam mapping is dynamic, we only set sizes...
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic void lm_init_cam_params(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* FIXME: remove once constants are in hsi file */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define LM_CAM_SIZE_EMUL (5) /*5 per vnic also in single function mode (real cam size on emulation is 20 per port) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* set CAM parameters according to EMUL/FPGA or ASIC + Chip*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mm_mem_zero(pdev->params.uc_table_size, sizeof(pdev->params.uc_table_size));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mm_mem_zero(pdev->params.mc_table_size, sizeof(pdev->params.mc_table_size));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.cam_size = b_is_asic? MAX_MAC_CREDIT_E1 / num_ports : LM_CAM_SIZE_EMUL;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mc_credit = b_is_asic? LM_MC_NDIS_TABLE_SIZE : LM_MC_TABLE_SIZE_EMUL;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi uc_credit = pdev->params.cam_size - mc_credit; /* E1 multicast is in CAM */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* init unicast table entires */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.uc_table_size[LM_CLI_IDX_ISCSI] = 1;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.uc_table_size[LM_CLI_IDX_NDIS] = uc_credit - 1; /* - one for iscsi... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* init multicast table entires */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mc_table_size[LM_CLI_IDX_NDIS] = mc_credit;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "uc_table_size[ndis]=%d, uc_table_size[ndis]=%d, mc_table_size[ndis]=%d\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.uc_table_size[LM_CLI_IDX_NDIS], pdev->params.uc_table_size[LM_CLI_IDX_ISCSI],
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mc_table_size[LM_CLI_IDX_NDIS]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.cam_size = b_is_asic? MAX_MAC_CREDIT_E1H / num_ports: LM_CAM_SIZE_EMUL;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.cam_size = pdev->params.cam_size / pdev->params.vnics_per_port;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* init unicast table entires */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.uc_table_size[LM_CLI_IDX_ISCSI] = 1;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.uc_table_size[LM_CLI_IDX_NDIS] = uc_credit - 1; /* - one for iscsi... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* init multicast table entires */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mc_table_size[LM_CLI_IDX_NDIS] = LM_MC_NDIS_TABLE_SIZE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "uc_table_size[ndis]=%d, uc_table_size[ndis]=%d, mc_table_size[ndis]=%d\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.uc_table_size[LM_CLI_IDX_NDIS], pdev->params.uc_table_size[LM_CLI_IDX_ISCSI],
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mc_table_size[LM_CLI_IDX_NDIS]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi num_ports = (CHIP_PORT_MODE(pdev) == LM_CHIP_PORT_MODE_4)? 2 : 1;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.cam_size = b_is_asic? ((MAX_MAC_CREDIT_E2 - GET_NUM_VFS_PER_PATH(pdev))/ num_funcs + GET_NUM_VFS_PER_PF(pdev)): LM_CAM_SIZE_EMUL_E2;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.cam_size = b_is_asic? MAX_MAC_CREDIT_E2 : LM_CAM_SIZE_EMUL_E2;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* init unicast table entires */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.uc_table_size[LM_CLI_IDX_ISCSI] = 1;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.uc_table_size[LM_CLI_IDX_FCOE] = 1;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.uc_table_size[LM_CLI_IDX_NDIS] = uc_credit - 2; /* - the two above... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* init multicast table entires */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mc_table_size[LM_CLI_IDX_NDIS] = LM_MC_NDIS_TABLE_SIZE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mc_table_size[LM_CLI_IDX_FCOE] = LM_MC_FCOE_TABLE_SIZE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "uc_table_size[ndis]=%d, uc_table_size[ndis]=%d, uc_table_size[fcoe]=%d, mc_table_size[ndis]=%d, mc_table_size[fcoe]=%d\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.uc_table_size[LM_CLI_IDX_NDIS], pdev->params.uc_table_size[LM_CLI_IDX_ISCSI],
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.uc_table_size[LM_CLI_IDX_FCOE],
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mc_table_size[LM_CLI_IDX_NDIS], pdev->params.mc_table_size[LM_CLI_IDX_FCOE]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakIfAll("New Chip?? initialize cam params!\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* override CAM parameters for chips later than E1 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.base_offset_in_cam_table = ((num_ports == 2)? FUNC_ID(pdev) : VNIC_ID(pdev)) * LM_CAM_SIZE(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mc_table_size[LM_CLI_IDX_NDIS] = 0; /* Will be filled later on acquire response (HW_CHANNEL)*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * \brief Initialize pdev->params members
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This function initializes the various pdev->params members, depending
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * on chip technology/implementation: fpga, emul or asic (default).
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * The function may also be used to validate these parameters.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * \param[in,out] pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * \param[in] validate flag to indicate desired operation.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * \return success/failure indication
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchistatic lm_status_t lm_init_params(lm_device_t *pdev, u8_t validate)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Ideally, we want to save the address of the parameter here.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * However, some compiler will not allow us to dynamically
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * initialize the pointer to a parameter in the table below.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * As an alternative, we will save the offset to the parameter
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * from pdev device structure. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Parameter default value. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Limit checking is diabled if min and max are zeros. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define _OFFSET(_name) (OFFSETOF(lm_device_t, params._name))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi (*((u32_t *) ((u8_t *) (_pdev) + (_entry)->offset)))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define SET_PARAM_VAL(_pdev, _entry, _val) \
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi *((u32_t *) ((u8_t *) (_pdev) + (_entry)->offset)) = (_val)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* asic fpga emul
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset default default default min max */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(mtu[LM_CLI_IDX_NDIS]), 9216, 9216, 9216, 1500, 9216 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(mtu[LM_CLI_IDX_ISCSI]), 9216, 9216, 9216, 1500, 9216 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(mtu[LM_CLI_IDX_FCOE]), 9216, 9216, 9216, 1500, 9216 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// { _OFFSET(mtu[LM_CLI_IDX_RDMA]), LM_MTU_INVALID_VALUE, LM_MTU_INVALID_VALUE, LM_MTU_INVALID_VALUE, LM_MTU_INVALID_VALUE, LM_MTU_INVALID_VALUE },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(mtu[LM_CLI_IDX_OOO]), 9216, 9216, 9216, 1500, 9216 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(mtu[LM_CLI_IDX_FWD]), 9216, 9216, 9216, 1500, 9216 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(mtu_max), 9216, 9216, 9216, 1500, 9216 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(rcv_buffer_offset), 0, 0, 0, 0, 9000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l2_rx_desc_cnt[LM_CLI_IDX_NDIS]), 200, 200, 200, 0, 32767 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l2_rx_desc_cnt[LM_CLI_IDX_FCOE]), 200, 200, 200, 0, 32767 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l2_rx_desc_cnt[LM_CLI_IDX_OOO]), 500, 500, 500, 0, 32767 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* The maximum page count is chosen to prevent us from having
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * more than 32767 pending entries at any one time. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l2_tx_bd_page_cnt[LM_CLI_IDX_NDIS]), 2, 2, 2, 1, 127 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l2_tx_bd_page_cnt[LM_CLI_IDX_FCOE]), 2, 2, 2, 1, 127 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l2_tx_coal_buf_cnt[LM_CLI_IDX_NDIS]), 0, 0, 0, 0, 20 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l2_tx_coal_buf_cnt[LM_CLI_IDX_FCOE]), 0, 0, 0, 0, 20 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l2_tx_bd_page_cnt[LM_CLI_IDX_FWD]) , 2, 2, 2, 1, 127 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* NirV: still not supported in ediag, being set in the windows mm */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// { _OFFSET(l2_rx_desc_cnt[LM_CLI_IDX_ISCSI]), 200, 200, 200, 0, 32767 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// /* The maximum page count is chosen to prevent us from having
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// * more than 32767 pending entries at any one time. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// { _OFFSET(l2_tx_bd_page_cnt[LM_CLI_IDX_ISCSI]), 2, 2, 2, 1, 127 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// { _OFFSET(l2_tx_coal_buf_cnt[LM_CLI_IDX_ISCSI]), 0, 0, 0, 0, 20 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// { _OFFSET(l2_rx_bd_page_cnt[LM_CLI_IDX_ISCSI]), 1, 1, 1, 1, 127 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(i2c_interval_sec), 0, 0, 0, 0, 1000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(flow_ctrl_cap), 0, 0, 0, 0, 0x80000000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(eee_policy), LM_EEE_CONTROL_NVRAM, LM_EEE_CONTROL_NVRAM, LM_EEE_CONTROL_NVRAM, LM_EEE_CONTROL_HIGH, LM_EEE_CONTROL_NVRAM }, // registry values are 0-5 for this
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(req_medium), 0xff00, 0x00ff, 0x00ff, 0, 0xfffff },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(interrupt_mode), LM_INT_MODE_INTA, LM_INT_MODE_INTA, LM_INT_MODE_INTA, LM_INT_MODE_INTA, LM_INT_MODE_MIMD},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(igu_access_mode), INTR_BLK_ACCESS_IGUMEM, INTR_BLK_ACCESS_IGUMEM, INTR_BLK_ACCESS_IGUMEM, INTR_BLK_ACCESS_GRC, INTR_BLK_ACCESS_IGUMEM},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(selective_autoneg), 0, 0, 0, 0, 0 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(autogreeen), LM_AUTOGREEEN_NVRAM, LM_AUTOGREEEN_NVRAM, LM_AUTOGREEEN_NVRAM, LM_AUTOGREEEN_DISABLED, LM_AUTOGREEEN_NVRAM },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(link_chng_mode), 2, 2, 2, 0, 0 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // TODO add correct values here
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(max_func_connections), 1024, 1024, 1024, 0, 500000},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(max_func_toe_cons), 310, 310, 310, 0, 500000},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(max_func_toe_cons), 750, 750, 750, 0, 500000},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(max_func_rdma_cons), 10, 10, 10, 0, 500000},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(max_func_iscsi_cons), 128, 128, 128, 0, 500000},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(max_func_fcoe_cons), 64, 64, 20, 0, 500000},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(context_line_size), LM_CONTEXT_SIZE, LM_CONTEXT_SIZE, LM_CONTEXT_SIZE, 0, LM_CONTEXT_SIZE },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(context_waste_size), 0, 0, 0, 0, 1024 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(num_context_in_page), 4, 4, 4, 0, 128},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(client_page_size), 0x1000, 0x1000, 0x1000,0x1000, 0x20000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(elt_page_size), 0x1000, 0x1000, 0x1000,0x1000, 0x20000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(ilt_client_page_size), 0x1000, 0x1000, 0x1000,0x1000, 0x20000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cfc_last_lcid), 0xff, 0xff, 0xff, 0x1, 0xff },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(override_rss_chain_cnt), 0, 0, 0, 0, 16 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // network type and max cwnd
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(network_type), LM_NETOWRK_TYPE_WAN, LM_NETOWRK_TYPE_WAN, LM_NETOWRK_TYPE_WAN,LM_NETOWRK_TYPE_LAN, LM_NETOWRK_TYPE_WAN },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(max_cwnd_wan), 12500000, 12500000, 12500000,12500000, 12500000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(max_cwnd_lan), 1250000 , 1250000, 1250000, 1250000, 1250000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // cid allocation mode
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cid_allocation_mode), LM_CID_ALLOC_DELAY , LM_CID_ALLOC_DELAY, LM_CID_ALLOC_DELAY,LM_CID_ALLOC_DELAY, LM_CID_ALLOC_NUM_MODES},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // interrupt coalesing configuration
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(int_coalesing_mode), LM_INT_COAL_PERIODIC_SYNC, LM_INT_COAL_NONE, LM_INT_COAL_NONE, 1, LM_INT_COAL_NUM_MODES },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(int_per_sec_rx[0]), 5000, 5000, 5000, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(int_per_sec_rx[1]), 5000, 5000, 5000, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(int_per_sec_rx[2]), 5000, 5000, 5000, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(int_per_sec_rx[3]), 5000, 5000, 5000, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(int_per_sec_tx[0]), 7500, 7500, 7500, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(int_per_sec_tx[1]), 3800, 3800, 3800, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(int_per_sec_tx[2]), 3800, 3800, 3800, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(int_per_sec_tx[3]), 3800, 3800, 3800, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // VF interrupt coalesing configuration
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(vf_int_per_sec_rx[LM_VF_INT_LOW_IDX]), 5000, 5000, 5000, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(vf_int_per_sec_rx[LM_VF_INT_MEDIUM_IDX]), 10000, 5000, 5000, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(vf_int_per_sec_rx[LM_VF_INT_HIGH_IDX]), 20000, 5000, 5000, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(vf_int_per_sec_tx[LM_VF_INT_LOW_IDX]), 3800, 3800, 3800, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(vf_int_per_sec_tx[LM_VF_INT_MEDIUM_IDX]), 8000, 3800, 3800, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(vf_int_per_sec_tx[LM_VF_INT_HIGH_IDX]), 16000, 3800, 3800, 1, 200000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(enable_dynamic_hc[0]), 1, 1, 1, 0, 1 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(enable_dynamic_hc[1]), 1, 1, 1, 0, 1 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(enable_dynamic_hc[2]), 1, 1, 1, 0, 1 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(enable_dynamic_hc[3]), 0, 0, 0, 0, 1 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout0[SM_RX_ID][0]), 12, 12, 12, 1, 0xff }, /* (20K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout1[SM_RX_ID][0]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout2[SM_RX_ID][0]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout3[SM_RX_ID][0]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout0[SM_RX_ID][1]), 6, 6, 6, 1, 0xff }, /* (40K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout1[SM_RX_ID][1]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout2[SM_RX_ID][1]), 120, 120, 120, 1, 0xff }, /* (2K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout3[SM_RX_ID][1]), 240, 240, 240, 1, 0xff }, /* (1K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout0[SM_RX_ID][2]), 6, 6, 6, 1, 0xff }, /* (40K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout1[SM_RX_ID][2]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout2[SM_RX_ID][2]), 120, 120, 120, 1, 0xff }, /* (2K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout3[SM_RX_ID][2]), 240, 240, 240, 1, 0xff }, /* (1K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout0[SM_RX_ID][3]), 6, 6, 6, 1, 0xff }, /* (40K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout1[SM_RX_ID][3]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout2[SM_RX_ID][3]), 120, 120, 120, 1, 0xff }, /* (2K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout3[SM_RX_ID][3]), 240, 240, 240, 1, 0xff }, /* (1K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout0[SM_TX_ID][0]), 12, 12, 12, 1, 0xff }, /* (20K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout1[SM_TX_ID][0]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout2[SM_TX_ID][0]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout3[SM_TX_ID][0]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout0[SM_TX_ID][1]), 6, 6, 6, 1, 0xff }, /* (40K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout1[SM_TX_ID][1]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout2[SM_TX_ID][1]), 120, 120, 120, 1, 0xff }, /* (2K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout3[SM_TX_ID][1]), 240, 240, 240, 1, 0xff }, /* (1K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout0[SM_TX_ID][2]), 6, 6, 6, 1, 0xff }, /* (40K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout1[SM_TX_ID][2]), 12, 12, 12, 1, 0xff }, /* (20K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout2[SM_TX_ID][2]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout3[SM_TX_ID][2]), 64, 64, 64, 1, 0xff }, /* (3.75K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout0[SM_TX_ID][3]), 6, 6, 6, 1, 0xff }, /* (40K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout1[SM_TX_ID][3]), 48, 48, 48, 1, 0xff }, /* (5K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout2[SM_TX_ID][3]), 120, 120, 120, 1, 0xff }, /* (2K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_timeout3[SM_TX_ID][3]), 240, 240, 240, 1, 0xff }, /* (1K int/sec assuming no more btr) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_threshold0[SM_RX_ID]), 0x2000, 0x2000, 0x2000,1, 0xffffffff },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_threshold1[SM_RX_ID]), 0x10000, 0x10000, 0x10000,1, 0xffffffff },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_threshold2[SM_RX_ID]), 0x50000, 0x50000, 0x50000,1, 0xffffffff },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_threshold0[SM_TX_ID]), 0x2000, 0x2000, 0x2000,1, 0xffffffff },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_threshold1[SM_TX_ID]), 0x10000, 0x10000, 0x10000,1, 0xffffffff },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(hc_threshold2[SM_TX_ID]), 0x20000, 0x20000, 0x20000,1, 0xffffffff },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l2_dynamic_hc_min_bytes_per_packet), 0, 0, 0, 0, 0xffff },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// { _OFFSET(l4_hc_scaling_factor), 12, 12, 12, 0, 16 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_hc_ustorm_thresh), 12, 12, 12, 12, 0xffffffff }, /* 128K */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_scq_page_cnt), 2, 2, 2, 2, 127 }, /* 321 BDs are reserved to FW threshold :-( */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_rcq_page_cnt), 3, 3, 3, 3, 127 }, /* 398 BDs are reserved to FW threshold :-( CQ_XOFF_TH = ((65*6) + 8) = ((maximum pending incoming msgs) * (maximum completions) + (maximum ramrods)) */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_grq_page_cnt), 2, 2, 2, 2, 127 }, /* 65 BDs are reserved to FW threshold :-( */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_tx_chain_page_cnt), 2, 2, 2, 2, 127 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_rx_chain_page_cnt), 2, 2, 2, 2, 127 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_gen_buf_size), LM_PAGE_SIZE,LM_PAGE_SIZE,LM_PAGE_SIZE,LM_PAGE_SIZE,16*LM_PAGE_SIZE },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_history_cqe_cnt), 20, 20, 20, 1, 20 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_ignore_grq_push_enabled), 0, 0, 0, 0, 1 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4cli_ticks_per_second), 1000, 1000, 1000, 500, 10000 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4cli_ack_frequency), 2, 2, 2, 1, 255 }, /* default 2 segments */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4cli_delayed_ack_ticks), 200, 200, 200, 1, 255 }, /* default 200ms */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4cli_max_retx), 6, 6, 6, 1, 255 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4cli_doubt_reachability_retx),3, 3, 3, 1, 255 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4cli_sws_prevention_ticks), 1000, 1000, 1000, 200, 0xffffffff }, /* default 1s */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4cli_dup_ack_threshold), 3, 3, 3, 1, 255 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4cli_push_ticks), 100, 100, 100, 1, 0xffffffff }, /* default 100ms */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4cli_nce_stale_ticks), 0xffffff,0xffffff,0xffffff, 1, 0xffffffff },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4cli_starting_ip_id), 0, 0, 0, 0, 0xffff },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(keep_vlan_tag), 1 , 1, 1, 0, 1 },
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi //congestion managment parameters
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_rate_shaping_enable),1, 1, 1, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_fairness_enable), 1, 1, 1, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_safc_rate_thresh), 3, 3, 3, 0, 10},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_activate_safc), 0, 0, 0, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_fair_port0_rate), 10, 10, 10, 1, 10},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_eth_weight), 8, 8, 8, 0, 10},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_toe_weight), 8, 8, 8, 0, 10},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_rdma_weight), 8, 8, 8, 0, 10},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_iscsi_weight), 8, 8, 8, 0, 10},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // rate shaping
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_eth_rate), 10, 10, 10, 0, 10},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_toe_rate), 10, 10, 10, 0, 10},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_rdma_rate), 2, 2, 2, 0, 10},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_iscsi_rate), 4, 2, 2, 0, 10},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Demo will be removed later
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_toe_con_number), 20, 20, 20, 0, 1024},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_rdma_con_number), 2, 2, 2, 0, 1024},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(cmng_iscsi_con_number), 40, 40, 40, 0, 1024},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l5sc_max_pending_tasks), 64, 64, 64, 64, 2048},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(max_fcoe_task), 64, 64, 64, 0, 4096},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(disable_patent_using), 1, 1, 1, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(disable_patent_using), 0, 0, 0, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_grq_filling_threshold_divider), 64, 64, 64, 2, 2048},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_free_cid_delay_time), 2000, 10000, 10000, 0, 10000},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(preemphasis_enable), 0, 0, 0, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(preemphasis_rx_0), 0, 0, 0, 0, 0xffff},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(preemphasis_rx_1), 0, 0, 0, 0, 0xffff},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(preemphasis_rx_2), 0, 0, 0, 0, 0xffff},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(preemphasis_rx_3), 0, 0, 0, 0, 0xffff},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(preemphasis_tx_0), 0, 0, 0, 0, 0xffff},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(preemphasis_tx_1), 0, 0, 0, 0, 0xffff},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(preemphasis_tx_2), 0, 0, 0, 0, 0xffff},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(preemphasis_tx_3), 0, 0, 0, 0, 0xffff},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(disable_pcie_nfr), 0, 0, 0, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(debug_cap_flags), 0xffffffff, 0xffffffff, 0xffffffff, 0, 0xffffffff},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(try_not_align_page_multiplied_memory), 1, 1, 1, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_max_rcv_wnd_size), 0x100000,0x100000,0x100000, 0, 0x1000000},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_dominance_threshold), 10, 10, 10, 0, 0xFF},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_max_dominance_value), 20, 20, 20, 0, 0xFF},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_data_integrity), 0x0, 0x0, 0x0, 0x0, 0x3},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_start_port), 5001, 5001, 5001, 0, 0xFFFFFFFF},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_num_of_ports), 50, 50, 50, 0, 0xFFFF},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(l4_skip_start_bytes), 4, 4, 4, 0, 0xFFFFFFFF},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(phy_priority_mode), PHY_PRIORITY_MODE_HW_DEF, PHY_PRIORITY_MODE_HW_DEF, PHY_PRIORITY_MODE_HW_DEF, PHY_PRIORITY_MODE_HW_DEF, PHY_PRIORITY_MODE_HW_PIN},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(grc_timeout_max_ignore), 0, 0, 0, 0, 0xFFFFFFFF},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(enable_error_recovery), 0, 0, 0, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(validate_sq_complete), 0, 0, 0, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(npar_vm_switching_enable),0, 0, 0, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(flow_control_reporting_mode),LM_FLOW_CONTROL_REPORTING_MODE_DISABLED,LM_FLOW_CONTROL_REPORTING_MODE_DISABLED,LM_FLOW_CONTROL_REPORTING_MODE_DISABLED,LM_FLOW_CONTROL_REPORTING_MODE_DISABLED,LM_FLOW_CONTROL_REPORTING_MODE_ENABLED},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(tpa_desc_cnt_per_chain), 0, 0, 0, 0, 0x10000},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(e3_network_cos_mode), 0, 0, 0, 0, 1},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(fw_valid_mask), 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0, 0xFFFFFFFF},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { _OFFSET(record_sp), 0x0, 0x0, 0x0, 0, 0xf},
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi { 0, 0, 0, 0, 0, 0}
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi }; // param_list
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi , "### lm_init_param\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Initialize the default parameters. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_PARAM_VAL(pdev, param, param->fpga_default);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_PARAM_VAL(pdev, param, param->emulation_default);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_PARAM_VAL(pdev, param, param->asic_default);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.rss_caps = (LM_RSS_CAP_IPV4 | LM_RSS_CAP_IPV6);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.sb_cnt = MAX_RSS_CHAINS / pdev->params.vnics_per_port;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* base non-default status block idx - 0 in E1. 0, 4, 8 or 12 in E1H */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_pf_sb_cnt = pdev->params.fw_sb_cnt = HC_SB_MAX_SB_E1X / 2 / pdev->params.vnics_per_port;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.base_fw_ndsb = FUNC_ID(pdev) * pdev->params.fw_sb_cnt;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.fw_client_cnt = pdev->params.max_pf_fw_client_cnt = ETH_MAX_RX_CLIENTS_E1;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.fw_client_cnt = pdev->params.max_pf_fw_client_cnt = ETH_MAX_RX_CLIENTS_E1H / pdev->params.vnics_per_port;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.base_fw_client_id = VNIC_ID(pdev) * pdev->params.fw_client_cnt;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// pdev->params.sb_cnt = min(LM_IGU_SB_CNT(pdev), MAX_RSS_CHAINS);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->params.sb_cnt > LM_IGU_SB_CNT(pdev)) {
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// Asymmetric resource division
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (CHIP_PORT_MODE(pdev) == LM_CHIP_PORT_MODE_4)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.base_fw_ndsb = IGU_BASE_NDSB(pdev) - (FUNC_ID(pdev) + 1)* LM_NUM_DSBS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.fw_aux_qzone_cnt = (ETH_MAX_RX_CLIENTS_E2 - PXP_REG_HST_ZONE_PERMISSION_TABLE_SIZE) / pdev->params.vnics_per_port / 2;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi port_base_aux_qzone = PORT_ID(pdev)* ((ETH_MAX_RX_CLIENTS_E2 - PXP_REG_HST_ZONE_PERMISSION_TABLE_SIZE)/PORT_MAX);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.aux_fw_qzone_id = PXP_REG_HST_ZONE_PERMISSION_TABLE_SIZE + port_base_aux_qzone + VNIC_ID(pdev) * pdev->params.fw_aux_qzone_cnt;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.base_fw_client_id = pdev->params.base_fw_ndsb + FUNC_ID(pdev) * MAX_NON_RSS_FW_CLIENTS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.base_fw_ndsb = IGU_BASE_NDSB(pdev) - (VNIC_ID(pdev) + 1) * LM_NUM_DSBS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.fw_aux_qzone_cnt = (ETH_MAX_RX_CLIENTS_E2 - PXP_REG_HST_ZONE_PERMISSION_TABLE_SIZE) / pdev->params.vnics_per_port;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.aux_fw_qzone_id = PXP_REG_HST_ZONE_PERMISSION_TABLE_SIZE + VNIC_ID(pdev) * pdev->params.fw_aux_qzone_cnt;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.base_fw_client_id = pdev->params.base_fw_ndsb + VNIC_ID(pdev) * MAX_NON_RSS_FW_CLIENTS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.fw_sb_cnt = LM_IGU_SB_CNT(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.fw_sb_cnt = pdev->params.fw_sb_cnt + lm_pf_get_vf_available_igu_blocks(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((VNICS_PER_PORT(pdev) == 1) && (CHIP_PORT_MODE(pdev) == LM_CHIP_PORT_MODE_2))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.fw_client_cnt = ETH_MAX_RX_CLIENTS_E2;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.fw_client_cnt = pdev->params.fw_sb_cnt + MAX_NON_RSS_FW_CLIENTS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.fw_client_cnt = pdev->params.fw_sb_cnt + MAX_NON_RSS_FW_CLIENTS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.fw_base_qzone_cnt = pdev->params.fw_sb_cnt;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi base_fw_qzone_id = pdev->params.base_fw_ndsb;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_pf_sb_cnt = LM_IGU_SB_CNT(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_pf_fw_client_cnt = pdev->params.max_pf_sb_cnt + MAX_NON_RSS_FW_CLIENTS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "SB counts(from %d): %d rss, %d max(pf), %d fw ndsbs accessible\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.base_fw_ndsb, pdev->params.sb_cnt, pdev->params.max_pf_sb_cnt, pdev->params.fw_sb_cnt);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakIf(pdev->params.sb_cnt > pdev->params.max_pf_sb_cnt);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakIf(pdev->params.max_pf_sb_cnt > pdev->params.fw_sb_cnt);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// pdev->params.base_fw_client_id = VNIC_ID(pdev) * pdev->params.fw_client_cnt;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "FW clients (from %d): %d max(pf), %d fw cliens accessible\n",
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.base_fw_client_id, pdev->params.max_pf_fw_client_cnt, pdev->params.fw_client_cnt);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (qz_idx = 0; qz_idx < pdev->params.fw_base_qzone_cnt; qz_idx++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.fw_qzone_id[qz_idx] = base_fw_qzone_id + qz_idx;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "%d base FW Q zone IDs from %d\n", pdev->params.fw_base_qzone_cnt, base_fw_qzone_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "%d aux FW Q zone IDs from %d\n", pdev->params.fw_aux_qzone_cnt, pdev->params.aux_fw_qzone_id);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// pdev->params.base_fw_client_id = VNIC_ID(pdev) * (pdev->params.sb_cnt + MAX_NON_RSS_FW_CLIENTS);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* For now, base_fw_qzone_id == base_fw_client_id, but this doesn't have to be the case... */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* qzone-id is relevant only for E2 and therefore it is ok that we use a */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Todo - change once E2 client is added. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// pdev->params.base_fw_qzone_id = pdev->params.base_fw_client_id + ETH_MAX_RX_CLIENTS_E1H*PORT_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* E2 TODO: read how many sb each pf has...?? */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_rss_chains = ((IS_PFDEV(pdev) && IGU_U_NDSB_OFFSET(pdev)) ? min(IGU_U_NDSB_OFFSET(pdev),LM_SB_CNT(pdev)) : LM_SB_CNT(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->params.max_rss_chains > MAX_RSS_CHAINS)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_rss_chains = MAX_RSS_CHAINS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakMsg("Zero isn't a valid value for pdev->params.max_rss_chains ");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* set the clients cids that will be used by the driver */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.map_client_to_cid[LM_CLI_IDX_NDIS] = 0;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.map_client_to_cid[LM_CLI_IDX_ISCSI] = i = LM_MAX_RSS_CHAINS(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.map_client_to_cid[LM_CLI_IDX_OOO] = ++i;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.map_client_to_cid[LM_CLI_IDX_FCOE] = ++i;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.map_client_to_cid[LM_CLI_IDX_FWD] = ++i;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi// pdev->params.map_client_to_cid[LM_CLI_IDX_RDMA] = ++i;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // FCoE is not supported in E1 and we have only 18 clients in E1
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // so we OOO client gets 'priority' over FCoE
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakIf(pdev->params.map_client_to_cid[LM_CLI_IDX_OOO] > pdev->params.map_client_to_cid[LM_CLI_IDX_FCOE]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* set l4_rss base chain index to be the first one after l2 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.l4_base_fw_rss_id = VNIC_ID(pdev) * pdev->params.sb_cnt;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.l4_base_fw_rss_id = VNIC_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* master-pfdev needs to keep resources for its vfs, resource allocation is done first between
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * pfs and then each pf leaves itself 1 sb_cnt for enabling vfs. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi (!(GET_FLAGS(pdev->hw_info.mf_info.flags,MF_INFO_VALID_MAC))))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[0] = pdev->hw_info.mac_addr[0] = 0x00;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[1] = pdev->hw_info.mac_addr[1] = 0x50;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[2] = pdev->hw_info.mac_addr[2] = 0xc2;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[3] = pdev->hw_info.mac_addr[3] = 0x2c;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[4] = pdev->hw_info.mac_addr[4] = 0x70 + (IS_PFDEV(pdev) ? 0 : (1 + 64*PATH_ID(pdev) + ABS_VFID(pdev)));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[5] = pdev->hw_info.mac_addr[5] = 0x9a + 2 * FUNC_ID(pdev);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[5] = pdev->hw_info.mac_addr[5] = 0x9a + PATH_ID(pdev)*8 + PORT_ID(pdev)*4 + VNIC_ID(pdev)*2;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mm_memcpy(pdev->hw_info.iscsi_mac_addr, pdev->hw_info.mac_addr, 6);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mm_memcpy(pdev->hw_info.fcoe_mac_addr, pdev->hw_info.iscsi_mac_addr, 6);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[0] = pdev->hw_info.mac_addr[0];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[1] = pdev->hw_info.mac_addr[1];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[2] = pdev->hw_info.mac_addr[2];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[3] = pdev->hw_info.mac_addr[3];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[4] = pdev->hw_info.mac_addr[4];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[5] = pdev->hw_info.mac_addr[5];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "Emulation is detected.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.test_mode |= TEST_MODE_IGNORE_SHMEM_SIGNATURE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.test_mode |= TEST_MODE_LOG_REG_ACCESS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi //pdev->params.test_mode |= TEST_MODE_NO_MCP;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi , "test mode is 0x%x \n",pdev->params.test_mode);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "ASIC is detected.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.test_mode |= TEST_MODE_NO_MCP;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi flow_control = (pdev->hw_info.link_config[ELINK_INT_PHY] & PORT_FEATURE_FLOW_CONTROL_MASK);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.flow_ctrl_cap = LM_FLOW_CONTROL_AUTO_PAUSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.flow_ctrl_cap = LM_FLOW_CONTROL_TRANSMIT_PAUSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.flow_ctrl_cap = LM_FLOW_CONTROL_RECEIVE_PAUSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.flow_ctrl_cap = LM_FLOW_CONTROL_TRANSMIT_PAUSE | LM_FLOW_CONTROL_RECEIVE_PAUSE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.flow_ctrl_cap = LM_FLOW_CONTROL_NONE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.flow_ctrl_cap = LM_FLOW_CONTROL_NONE;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * We don't know (yet...) if the PHY supportes EEE - so we cannot set params
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * to reflect this info.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* L2 FW Flow control */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // if this static assert fails consider adding the new mode to the if
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // and read the l2_fw_flow_ctrl from the shmem in the new mode also
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((pdev->hw_info.mf_info.mf_mode == SINGLE_FUNCTION) ||
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi (pdev->hw_info.mf_info.mf_mode == MULTI_FUNCTION_SD) ||
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // l2_fw_flow_ctrl is read from the shmem in multi-function mode in E2 and above.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // In all other cases this parameter is read from the registry.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // We read this parameter from the registry in E1.5 multi-function since 57711 boot code does not have the struct func_ext_cfg
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mf_mode = pdev->hw_info.mf_info.mf_mode;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->params.mf_mode == MULTI_FUNCTION_SD)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.sd_mode = pdev->hw_info.mf_info.sd_mode;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Make sure the parameter values are within range. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_PARAM_VAL(pdev, param, param->fpga_default);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_PARAM_VAL(pdev, param, param->emulation_default);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_PARAM_VAL(pdev, param, param->asic_default);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* calculate context_line_size context_waste_size */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // TODO calculate number of context lines in alocation page.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi csize = max(sizeof(struct eth_context),sizeof(struct toe_context));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi //csize = max(sizeof(struct rdma_context),csize);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi csize = max(sizeof(struct iscsi_context),csize);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Check for a valid mac address. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[5] == 0) || (pdev->params.mac_addr[0] & 1))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "invalid MAC number.\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[0] = pdev->hw_info.mac_addr[0];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[1] = pdev->hw_info.mac_addr[1];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[2] = pdev->hw_info.mac_addr[2];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[3] = pdev->hw_info.mac_addr[3];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[4] = pdev->hw_info.mac_addr[4];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mac_addr[5] = pdev->hw_info.mac_addr[5];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if ((pdev->params.l2_fw_flow_ctrl == 1) || (pdev->params.l4_fw_flow_ctrl == 1))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARNi, "L2 FW Flow control not supported on E1\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* init l2 client conn param with default mtu values */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (i = 0; i < ARRSIZE(pdev->params.l2_cli_con_params); i++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_cli_idx_t lm_cli_idx = LM_CHAIN_IDX_CLI(pdev, i);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC( ARRSIZE(pdev->params.l2_rx_desc_cnt) == ARRSIZE(pdev->params.mtu));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if( lm_cli_idx >= ARRSIZE(pdev->params.l2_rx_desc_cnt))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // in case lm_cli_idx is above boundries
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // it means that is should not be used (currently expected in MF mode)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // we skip the iteration
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.l2_cli_con_params[i].mtu = pdev->params.mtu[lm_cli_idx];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if(i < (LM_SB_CNT(pdev) + MAX_NON_RSS_CHAINS))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.l2_cli_con_params[i].num_rx_desc = pdev->params.l2_rx_desc_cnt[lm_cli_idx];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.l2_cli_con_params[i].attributes = LM_CLIENT_ATTRIBUTES_RX | LM_CLIENT_ATTRIBUTES_TX | LM_CLIENT_ATTRIBUTES_REG_CLI;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.l2_cli_con_params[i].attributes = LM_CLIENT_ATTRIBUTES_TX;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi} /* lm_init_params */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Description:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi , "### lm_get_dev_info\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // initialize "product_version" to 0xffffffff so all platforms will have invalid values (but Windows that will update it later)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mm_memset( pdev->product_version, 0xff, sizeof(pdev->product_version) );
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Get function num using me register
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // initialize pointers to init arrays (can only do this after we know which chip we are...)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // We want to do this here to enable IRO access before driver load (ediag/lediag) this is only done
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // for PFs, VFs use PFDEV to access IRO
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Unknown chip revision\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* For VF, we also get the vf-id here... since we need it from configuration space */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 8. Verify that the transaction-pending bit of each of the function in the Device Status Register in the PCIe is cleared. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t pcie_caps_offset = mm_get_cap_offset(pdev, PCI_CAP_PCIE);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pcie_caps_offset != 0 && pcie_caps_offset != 0xFFFFFFFF) {
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi mm_read_pci(pdev, pcie_caps_offset + PCIE_DEV_CTRL, &dev_control_and_status);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL,"Device Control&Status of PCIe caps is %x\n",dev_control_and_status);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (dev_control_and_status & (PCIE_DEV_STATUS_PENDING_TRANSACTION << 16)) {
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "Function mm_get_cap_offset is not implemented yet\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (IS_CHANNEL_VIRT_MODE_MASTER_PFDEV(pdev)) {
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_eth_including_vfs_conns = 1 << (LM_VF_MAX_RVFID_SIZE + LM_VF_CID_WND_SIZE(pdev) + 1);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_eth_including_vfs_conns = MAX_VF_ETH_CONS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Registry parameters are read in this stage.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // As a result pdev->params.is_dcb_ndis_mp_en isn't valid yet.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Add DCB multiple connections
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_eth_including_vfs_conns += 3 * MAX_HW_CHAINS + MAX_NON_RSS_CHAINS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_eth_including_vfs_conns += MAX_ETH_CONS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_eth_including_vfs_conns += MAX_ETH_REG_CHAINS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_eth_including_vfs_conns += MAX_ETH_REG_CONS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_eth_including_vfs_conns = MAX_RSS_CHAINS;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi } else if (IS_CHANNEL_VFDEV(pdev)) { //TODO check for basic vf
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.mf_info.multi_vnics_mode = 0;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.mf_info.ext_id = 0xffff; /* invalid ovlan */ /* TBD - E1H: - what is the right value for Cisco? */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.max_port_conns = log2_align(MAX_ETH_CONS);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // for debugging only (no other use)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->ver_num_fw = (BCM_5710_FW_MAJOR_VERSION << 24) |
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* get vnic parameters */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.vnics_per_port = pdev->hw_info.mf_info.vnics_per_port;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.ovlan = VALID_OVLAN(OVLAN(pdev)) ? OVLAN(pdev) : 0; // TBD: verify it's the right value (with OfirH)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.multi_vnics_mode = pdev->hw_info.mf_info.multi_vnics_mode;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.path_has_ovlan = pdev->hw_info.mf_info.path_has_ovlan;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // clc params
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.intr_blk_info.blk_type = INTR_BLK_IGU;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.intr_blk_info.blk_mode = INTR_BLK_MODE_NORM;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->hw_info.intr_blk_info.access_type = INTR_BLK_ACCESS_IGUMEM;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Ediag may want to update the BC version. Don't fail lm_get_dev_info because of lm_mcp_cmd_init
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // in no condition.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, FATAL, "lm_get_shmem_info: mcp_cmd_init failed. lm_status=0x%x\n", lm_status);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (CHIP_PORT_MODE(pdev) == LM_CHIP_PORT_MODE_4)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* We're a single-function port on a mult-function path in a 4-port-mode environment... we need to support 1G */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (pdev->params.path_has_ovlan && !pdev->params.multi_vnics_mode)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN, "func_id = %d Setting link speed to 1000MBPS\n", ABS_FUNC_ID(pdev));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi SET_MEDIUM_SPEED(pdev->params.req_medium, LM_MEDIUM_SPEED_1000MBPS);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* Override the defaults with user configurations. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi , "### lm_get_dev_info exit\n");
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi} /* lm_get_dev_info */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi *Function Name: lm_get_port_id_from_func_abs
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi *Description:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * returns the port ID according to the func_abs_id
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Port0: 0,2,4,6
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Port1: 1,3,5,7
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Port0: 0,1,2,3,4,5,6,7
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Port0: 0,1,4,5
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Port1: 2,3,6,7
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi *Returns: u8_t port_id
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu8_t lm_get_port_id_from_func_abs( const u32_t chip_num, const lm_chip_port_mode_t lm_chip_port_mode, const u8_t abs_func )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // we expect here only E2 or E3
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakIf( CHIP_IS_E1x_PARAM( chip_num ) );
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi } // switch lm_chip_port_mode
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi} /* lm_get_port_id_from_func_abs */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi *Function Name: lm_get_abs_func_vector
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi *Description:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * returns vector of abs_func id's upon parameters
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi *Returns: u32_t abs_func_vector
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu8_t lm_get_abs_func_vector( const u32_t chip_num, const lm_chip_port_mode_t chip_port_mode, const u8_t b_multi_vnics_mode, const u8_t path_id )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // TODO VF for T7.0
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi The following table is mapping between abs func, ports and paths
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |-----------------------------------------------|
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |[#]| CHIP & Mode | PATH(s) | Port(s) | Func(s) |
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |---|-------------|---------|---------|---------|
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |[1]| E1.0 (SF) | (0) | 0,1 | (0,1) |
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi | | E1.5 SF | | 0,1 | (0,1) | (port is same as func)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |---|-------------|---------|---------|---------|
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |[2]| E1.5 MF | (0) | 0,1 | 0-7 | 0,1,2,3,4,5,6,7 (port is %2 of func)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |---|-------------|---------|---------|---------|
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |[3]| E2/E32P SF | 0,1 | 0 | ---> | (Path 0) 0 | (Path 1) 1
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |---|-------------|---------|---------|---------|
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |[4]| E2/E32P MF | 0,1 | 0 | ---> | (Path 0) 0,2,4,6 | (Path 1) 1,3,5,7
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |---|-------------|---------|---------|---------|
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |[5]| E34P SF | 0,1 | 0,1 | ---> | (Path 0) 0:port0 2:port1 | (Path 1) 1:port0 3:port1
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |---|-------------|---------|---------|---------|
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |[6]| E34P MF | 0,1 | 0,1 | ---> | (Path 0) 0,4:port0 2,6:port1 | (Path 1) 1,5:port0 3,7:port1 (57840)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |---|-------------|---------|---------|---------|
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |[7]| E34P MF/SF | 0,1 | 0,1 | ---> | (Path 0) 0,4:port0 2:port1 | (Path 1) 1,5:port0 3:port1 (57800)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi |---|-------------|---------|---------|---------|
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if( CHIP_IS_E1x_PARAM(chip_num) && !b_multi_vnics_mode )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if( CHIP_IS_E1H_PARAM(chip_num) && b_multi_vnics_mode )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // If we got here chip should not be ealier than E2
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // [3] [4] [5] [6]
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // we expect here only E2 or E3
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgBreakIf( !CHIP_IS_E2_PARAM(chip_num) && !CHIP_IS_E3_PARAM(chip_num) );
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi } // LM_CHIP_PORT_MODE_2
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // [7] In 57800 if we are multi function the other port can only be single function
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // [7] We can't really know what's on the other port, so for this case where we are
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // in 57800 single function, we assume multi-function and access all the functions
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // so this might be case [5] but we can't know this.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi } // LM_CHIP_PORT_MODE_4
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi } // CHIP_PORT_MODE
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi} /* lm_get_abs_func_vector */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_status_t lm_verify_validity_map(lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u64_t wait_cnt_limit = 200000; // 4 seconds (ASIC)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status_t lm_status = LM_STATUS_FAILURE ;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi wait_cnt_limit*= (u64_t)(pdev->vars.clk_factor) ;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for(wait_cnt = 0; wait_cnt < wait_cnt_limit; wait_cnt++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t, validity_map[PORT_ID(pdev)]),&val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // check that shared memory is valid.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) == (SHR_MEM_VALIDITY_DEV_INFO|SHR_MEM_VALIDITY_MB))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, INFORMi, "lm_verify_validity_map: shmem signature %d\n",val);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_set_cam_params(struct _lm_device_t * pdev,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (base_offset_in_cam_table != LM_KEEP_CURRENT_CAM_VALUE) {
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.base_offset_in_cam_table = (u8_t)base_offset_in_cam_table;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (cam_size != LM_KEEP_CURRENT_CAM_VALUE) {
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (mc_size != LM_KEEP_CURRENT_CAM_VALUE) {
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mc_table_size[LM_CLI_IDX_NDIS] =(u8_t) mc_size;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.mc_table_size[LM_CLI_IDX_FCOE] = (u8_t)mc_size;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi} /* lm_set_cam_params */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Description:
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchivoid lm_cmng_calc_params(lm_device_t* pdev )
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (vnic = 0; vnic < MAX_VNIC_NUM; vnic++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if (GET_FLAGS(pdev->hw_info.mf_info.func_mf_cfg , FUNC_MF_CFG_FUNC_HIDE))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.min_bw[vnic] = pdev->hw_info.mf_info.min_bw[vnic];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi pdev->params.max_bw[vnic] = pdev->hw_info.mf_info.max_bw[vnic];
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi} /* lm_cmng_calc_params */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @description
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Calculates BW according to current linespeed and MF
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * configuration of the function in Mbps.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param pdev
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param link_speed - Port rate in Mbps.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @param vnic
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * @return u16
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Return the max BW of the function in Mbps.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi //global vnic counter
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi if(IS_MF_SD_MODE(pdev) || IS_MF_AFEX_MODE(pdev))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // SD max BW in 100Mbps
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // SI max BW in percentage from the link speed.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi max_bw = (link_speed * pdev->params.max_bw[vnic])/100;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu8_t lm_check_if_pf_assigned_to_vm(struct _lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu8_t lm_is_fw_version_valid(struct _lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t drv_fw_ver = (BCM_5710_FW_MAJOR_VERSION) |
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t real_fw_ver = REG_RD(pdev,0x2c0000); /* Read acitve FW version from 1st DWORD of XSTORM params*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi fw_valid_mask = SWAP_BYTES32(pdev->params.fw_valid_mask);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi is_fw_valid = (((drv_fw_ver ^ real_fw_ver) & fw_valid_mask) == 0);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * Support for NSCI get OS driver version CQ70040
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*Descripion: Write the client driver version
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi* to the shmem2 region
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchilm_set_cli_drv_ver_to_shmem(struct _lm_device_t *pdev)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t drv_ver_offset = OFFSETOF(shmem2_region_t,func_os_drv_ver);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status_t lm_status = LM_STATUS_SUCCESS; // Status is always SUCCESS now
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ASSERT_STATIC( sizeof(pdev->lm_cli_drv_ver_to_shmem.cli_drv_ver) == sizeof(struct os_drv_ver) );
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset = drv_ver_offset + (pdev->params.pfunc_mb_id * sizeof(pdev->lm_cli_drv_ver_to_shmem.cli_drv_ver));
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi DbgMessage(pdev, WARN,"offset= %d \n", offset);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM2_READ (pdev, OFFSETOF(shmem2_region_t,size), &shmem2_size);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for (index = 0; index < ARRSIZE(pdev->lm_cli_drv_ver_to_shmem.cli_drv_ver.versions); index++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi LM_SHMEM2_WRITE(pdev, offset, pdev->lm_cli_drv_ver_to_shmem.cli_drv_ver.versions[index]);
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi offset+= sizeof( pdev->lm_cli_drv_ver_to_shmem.cli_drv_ver.versions[index] );
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchiu8_t lm_is_mac_locally_administrated(struct _lm_device_t *pdev, u8_t * mac)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi res = (mac[0] != pdev->params.mac_addr[0]) ||