Searched refs:uOpcode (Results 1 - 23 of 23) sorted by relevance

/vbox/src/VBox/VMM/VMMRC/
H A DIOMRC.cpp70 switch (pCpu->pCurInstr->uOpcode)
90 AssertMsgFailed(("Unknown I/O port access opcode %d.\n", pCpu->pCurInstr->uOpcode));
H A DTRPMRCHandlers.cpp571 if ( Cpu.pCurInstr->uOpcode == OP_ILLUD2
595 Log(("TRPMGCTrap06Handler: pc=%08x op=%d\n", pRegFrame->eip, Cpu.pCurInstr->uOpcode));
607 else if (Cpu.pCurInstr->uOpcode == OP_MONITOR)
800 switch (pCpu->pCurInstr->uOpcode)
906 switch (pCpu->pCurInstr->uOpcode)
1080 if (Cpu.pCurInstr->uOpcode == OP_RDTSC)
1105 if ( Cpu.pCurInstr->uOpcode == OP_IN
1106 || Cpu.pCurInstr->uOpcode == OP_INSB
1107 || Cpu.pCurInstr->uOpcode == OP_INSWD)
/vbox/src/VBox/Disassembler/
H A DDisasmFormatYasm.cpp457 if ( pOp->uOpcode == OP_INVALID
458 || ( pOp->uOpcode == OP_ILLUD2
479 switch (pOp->uOpcode)
652 && pOp->uOpcode != OP_LDS /* table bugs? */ \
653 && pOp->uOpcode != OP_LES \
654 && pOp->uOpcode != OP_LFS \
655 && pOp->uOpcode != OP_LGS \
656 && pOp->uOpcode != OP_LSS ) \
671 if (pDis->pCurInstr->uOpcode != OP_GATHER || pDis->bVexWFlag) { PUT_SZ("dword "); break; } \
713 && ((pParam->fUse & DISUSE_REG_FP) || pOp->uOpcode
[all...]
H A DDisasmCore.cpp720 if (pDis->pCurInstr->uOpcode == OP_GATHER)
957 if ( pDis->pCurInstr->uOpcode == OP_MOV_CR
1997 if (g_aTwoByteMapX86_PF66[pDis->bOpCode].uOpcode != OP_INVALID)
2015 if (g_aTwoByteMapX86_PFF2[pDis->bOpCode].uOpcode != OP_INVALID)
2026 if (g_aTwoByteMapX86_PFF3[pDis->bOpCode].uOpcode != OP_INVALID)
2070 if (pOpcode->uOpcode != OP_INVALID)
2094 if (pOpcode->uOpcode != OP_INVALID)
2114 if (pOpcode->uOpcode != OP_INVALID)
2130 if (pOpcode->uOpcode != OP_INVALID)
2168 if (pOpcode->uOpcode !
[all...]
/vbox/src/VBox/VMM/VMMR3/
H A DPATMGuest.cpp217 switch (pCpu->pCurInstr->uOpcode)
243 AssertMsgFailed(("PATMInstallGuestSpecificPatch: unknown opcode %d\n", pCpu->pCurInstr->uOpcode));
H A DPATM.cpp1461 && (pCpu->pCurInstr->uOpcode == OP_JMP || pCpu->pCurInstr->uOpcode == OP_CALL)
1466 || (pCpu->pCurInstr->uOpcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS))
1476 if (pPatch->opcode == OP_CLI && pCpu->pCurInstr->uOpcode == OP_JMP)
1490 if (pCurInstrGC != pInstrGC && pCpu->pCurInstr->uOpcode == OP_PUSHF)
1498 if (pCpu->pCurInstr->uOpcode == OP_RETF)
1504 else if ( pCpu->pCurInstr->uOpcode == OP_INT3
1505 || pCpu->pCurInstr->uOpcode == OP_INT
1506 || pCpu->pCurInstr->uOpcode == OP_INTO)
1521 switch (pCpu->pCurInstr->uOpcode)
2812 patmR3PatchBlock(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, uint32_t uOpcode, uint32_t uOpSize, PPATMPATCHREC pPatchRec) argument
[all...]
H A DEMRaw.cpp467 switch (Cpu.pCurInstr->uOpcode)
486 switch (Cpu.pCurInstr->uOpcode)
634 && (cpu.pCurInstr->uOpcode == OP_MONITOR || cpu.pCurInstr->uOpcode == OP_MWAIT))
718 if (Cpu.pCurInstr->uOpcode == OP_SYSENTER)
733 switch (Cpu.pCurInstr->uOpcode)
815 && Cpu.pCurInstr->uOpcode == OP_IRET)
1004 switch (Cpu.pCurInstr->uOpcode)
1074 Log4(("emR3RawPrivileged: opcode=%d\n", Cpu.pCurInstr->uOpcode));
1083 switch (Cpu.pCurInstr->uOpcode)
[all...]
H A DCSAM.cpp846 switch (pCpu->pCurInstr->uOpcode)
872 switch (pCpu->pCurInstr->uOpcode)
973 switch(pCpu->pCurInstr->uOpcode)
1023 if (pCpu->pCurInstr->uOpcode == OP_IRET)
1035 switch(pCpu->pCurInstr->uOpcode)
1160 switch (cpu.pCurInstr->uOpcode)
1390 && cpu.pCurInstr->uOpcode == OP_RETN
1404 || (cpu.pCurInstr->uOpcode == OP_CALL && cpu.Param1.fUse == DISUSE_DISPLACEMENT32)) /* simple indirect call (call dword ptr [address]) */
1407 if ( cpu.pCurInstr->uOpcode == OP_CALL
1455 if (cpu.pCurInstr->uOpcode
[all...]
H A DEMHM.cpp301 switch (Cpu.pCurInstr->uOpcode)
320 switch (Cpu.pCurInstr->uOpcode)
H A DPATMPatch.cpp903 Assert(pCpu->pCurInstr->uOpcode == OP_RETN);
1382 if (pCpu->pCurInstr->uOpcode == OP_STR)
1427 if (pCpu->pCurInstr->uOpcode == OP_STR)
1472 switch (pCpu->pCurInstr->uOpcode)
H A DHM.cpp1909 && pDis->pCurInstr->uOpcode == OP_MOV
1963 && pDis->pCurInstr->uOpcode == OP_SHR
2083 && pDis->pCurInstr->uOpcode == OP_MOV
/vbox/src/VBox/VMM/VMMAll/
H A DGIMAllKvm.cpp377 if ( pDis->pCurInstr->uOpcode == OP_VMCALL
378 || pDis->pCurInstr->uOpcode == OP_VMMCALL)
381 if ( pDis->pCurInstr->uOpcode != pKvm->uOpCodeNative
H A DPATMAll.cpp488 if (pCpu->pCurInstr->uOpcode == OP_SYSENTER)
515 if (pCpu->pCurInstr->uOpcode == OP_SYSEXIT)
534 if (pCpu->pCurInstr->uOpcode == OP_SYSCALL)
539 if (pCpu->pCurInstr->uOpcode == OP_SYSRET)
H A DEMAll.cpp1940 switch (pDis->pCurInstr->uOpcode)
1984 Log(("Unknown opcode %d\n", pDis->pCurInstr->uOpcode));
3535 if (pDis->pCurInstr->uOpcode == OP_LIDT)
3669 && pDis->pCurInstr->uOpcode != OP_RDTSC) /* rdtsc requires emulation in ring 3 as well */
3683 && pDis->pCurInstr->uOpcode != OP_CMPXCHG
3684 && pDis->pCurInstr->uOpcode != OP_CMPXCHG8B
3685 && pDis->pCurInstr->uOpcode != OP_XADD
3686 && pDis->pCurInstr->uOpcode != OP_OR
3687 && pDis->pCurInstr->uOpcode != OP_AND
3688 && pDis->pCurInstr->uOpcode !
[all...]
H A DIOMAllMMIO.cpp603 if (pCpu->pCurInstr->uOpcode == OP_MOVSX)
1240 if (pCpu->pCurInstr->uOpcode == OP_XOR)
1242 else if (pCpu->pCurInstr->uOpcode == OP_OR)
1244 else if (pCpu->pCurInstr->uOpcode == OP_AND)
1595 switch (pDis->pCurInstr->uOpcode)
2233 if (pCpu->pCurInstr->uOpcode == OP_INSB)
2404 if (pCpu->pCurInstr->uOpcode == OP_OUTSB)
H A DPGMAllPool.cpp716 if ( pDis->pCurInstr->uOpcode == OP_BTR
756 LogFlow(("Reused instr %RGv %d at %RGv param1.fUse=%llx param1.reg=%d\n", pRegFrame->rip, pDis->pCurInstr->uOpcode, pvFault, pDis->Param1.fUse, pDis->Param1.Base.idxGenReg));
762 switch (pDis->pCurInstr->uOpcode)
1008 pRegFrame->cs.Sel, (RTGCPTR)pRegFrame->rip, pDis->pCurInstr->uOpcode));
1184 && pDis->pCurInstr->uOpcode == OP_MOV
1214 if ( pDis->pCurInstr->uOpcode == OP_STOSWD
1256 pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, pDis->pCurInstr->uOpcode, pDis->fPrefix));
/vbox/src/VBox/Disassembler/testcase/
H A DtstDisasm-2.cpp134 switch (pDis->pCurInstr->uOpcode)
296 || State.Dis.pCurInstr->uOpcode == OP_INVALID
297 || State.Dis.pCurInstr->uOpcode == OP_ILLUD2
315 RTPrintf("%s: error at %#RX64: unexpected valid instruction (op=%d)\n", argv0, State.uAddress, State.Dis.pCurInstr->uOpcode);
321 RTPrintf("%s: error at %#RX64: undefined opcode (op=%d)\n", argv0, State.uAddress, State.Dis.pCurInstr->uOpcode);
/vbox/src/VBox/Runtime/testcase/
H A DtstLdrDisasmTest.cpp125 if (Cpu.pCurInstr->uOpcode != (enmOp)) \
/vbox/src/VBox/Devices/Storage/
H A DDevBusLogic.cpp770 uint8_t uOpcode; member in struct:CCB32
819 uint8_t uOpcode; member in struct:CCB24
858 uint8_t uOpcode; member in struct:CCBC
1281 Log(("%s: uOpCode=%#x\n", __FUNCTION__, pCCB->c.uOpcode));
1376 if ( (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1377 || (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1460 else if ( pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1461 || pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1525 if ( (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1526 || (pTaskState->CommandControlBlockGuest.c.uOpcode
[all...]
/vbox/src/VBox/Runtime/r3/
H A Dalloc-ef.cpp473 && Dis.pCurInstr->uOpcode == OP_CMP)
479 if ( Dis.pCurInstr->uOpcode == OP_JNBE
/vbox/include/VBox/
H A Ddis.h500 uint16_t uOpcode; member in struct:DISOPCODE
/vbox/src/VBox/VMM/VMMR0/
H A DHMSVMR0.cpp3804 && pDis->pCurInstr->uOpcode == OP_INVLPG)
3812 Log4(("hmR0SvmInterpretInvlpg: EMInterpretDisasCurrent returned %Rrc uOpCode=%#x\n", rc, pDis->pCurInstr->uOpcode));
5325 Log4(("hmR0SvmExitXcptMF: EMInterpretDisasCurrent returned %Rrc uOpCode=%#x\n", rc, pDis->pCurInstr->uOpcode));
H A DHMVMXR0.cpp11979 Log4(("#GP Disas OpCode=%u CS:EIP %04x:%04RX64\n", pDis->pCurInstr->uOpcode, pMixedCtx->cs.Sel, pMixedCtx->rip));
11980 switch (pDis->pCurInstr->uOpcode)

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