323b78bf4831666c95416edf3b6e54657a769e5dvboxsync * IOM - Input / Output Monitor - Any Context, MMIO & String I/O.
68b6f6be3501c8a658944893fee17fb6df5c3ad1vboxsync * Copyright (C) 2006-2013 Oracle Corporation
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * available from http://www.virtualbox.org. This file is free software;
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * you can redistribute it and/or modify it under the terms of the GNU
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * General Public License (GPL) as published by the Free Software
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync/*******************************************************************************
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync* Header Files *
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync*******************************************************************************/
e41f0459369a6d814aa36bf4def225482fc56026vboxsync#if defined(IEM_VERIFICATION_MODE) && defined(IN_RING3)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync/*******************************************************************************
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync* Global Variables *
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync*******************************************************************************/
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Array for fast recode of the operand size (1/2/4/8 bytes) to bit shift value.
d03c6bcd3d78cef8ac4d76186e7c0e72f63ce80fvboxsync ~0U, /* 0 - invalid */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync 0, /* *1 == 2^0 */
d03c6bcd3d78cef8ac4d76186e7c0e72f63ce80fvboxsync ~0U, /* 3 - invalid */
d03c6bcd3d78cef8ac4d76186e7c0e72f63ce80fvboxsync ~0U, /* 5 - invalid */
d03c6bcd3d78cef8ac4d76186e7c0e72f63ce80fvboxsync ~0U, /* 6 - invalid */
d03c6bcd3d78cef8ac4d76186e7c0e72f63ce80fvboxsync ~0U, /* 7 - invalid */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Macro for fast recode of the operand size (1/2/4/8 bytes) to bit shift value.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * Deals with complicated MMIO writes.
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync * Complicated means unaligned or non-dword/qword sized accesses depending on
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * the MMIO region's access mode flags.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @returns Strict VBox status code. Any EM scheduling status code,
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync * VINF_IOM_R3_MMIO_WRITE, VINF_IOM_R3_MMIO_READ_WRITE or
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync * VINF_IOM_R3_MMIO_READ may be returned.
4bfa7b58e362a1bca0628643c352c137900bf01avboxsync * @param pVM Pointer to the VM.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param pRange The range to write to.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param GCPhys The physical address to start writing.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param pvValue Where to store the value.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param cbValue The size of the value to write.
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsyncstatic VBOXSTRICTRC iomMMIODoComplicatedWrite(PVM pVM, PIOMMMIORANGE pRange, RTGCPHYS GCPhys, void const *pvValue, unsigned cbValue)
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync AssertReturn( (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) != IOMMMIO_FLAGS_WRITE_PASSTHRU
941663030e44ea1c6fa4b7c01b8fbdd7a59d52c8vboxsync && (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_DWORD_QWORD_READ_MISSING,
683371bbf37760161d1b8454ce978acf89bbb04fvboxsync AssertReturn(cbValue != 0 && cbValue <= 16, VERR_IOM_MMIO_IPE_2);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync RTGCPHYS const GCPhysStart = GCPhys; NOREF(GCPhysStart);
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync bool const fReadMissing = (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) == IOMMMIO_FLAGS_WRITE_DWORD_READ_MISSING
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync || (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) == IOMMMIO_FLAGS_WRITE_DWORD_QWORD_READ_MISSING;
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsync * Do debug stop if requested.
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsync if (pRange->fFlags & IOMMMIO_FLAGS_DBGSTOP_ON_COMPLICATED_WRITE)
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsync rc = DBGFR3EventSrc(pVM, DBGFEVENT_DEV_STOP, RT_SRC_POS,
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsync "Complicated write %#x byte at %RGp to %s\n", cbValue, GCPhys, R3STRING(pRange->pszDesc));
8977b58c5226cc10e70b8bea31644259d4aaca3bvboxsync * Check if we should ignore the write.
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync if ((pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) == IOMMMIO_FLAGS_WRITE_ONLY_DWORD)
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync if ((pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) == IOMMMIO_FLAGS_WRITE_ONLY_DWORD_QWORD)
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync Assert((cbValue != 4 && cbValue != 8) || (GCPhys & (cbValue - 1)));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * Split and conquer.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * Get the missing bits (if any).
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync int rc2 = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync GCPhys & ~(RTGCPHYS)3, &u32MissingValue, sizeof(u32MissingValue));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync /** @todo What if we've split a transfer and already read
8977b58c5226cc10e70b8bea31644259d4aaca3bvboxsync * something? Since writes generally have sideeffects we
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync * could be kind of screwed here...
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync * Fix: Save the current state and resume it in ring-3. Requires EM to not go
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync * to REM for MMIO accesses (like may currently do). */
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync LogFlow(("iomMMIODoComplicatedWrite: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc [read]\n", GCPhys, GCPhysStart, cbValue, rc2));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync Log(("iomMMIODoComplicatedWrite: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc [read]\n", GCPhys, GCPhysStart, cbValue, rc2));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync AssertMsgReturn(rc2 >= VINF_EM_FIRST && rc2 <= VINF_EM_LAST, ("%Rrc\n", rc2), VERR_IPE_UNEXPECTED_INFO_STATUS);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * Merge missing and given bits.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync u32GivenValue = RT_MAKE_U32_FROM_U8(((uint8_t const *)pvValue)[0], ((uint8_t const *)pvValue)[1],
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync uint32_t u32Value = (u32MissingValue & ~u32GivenMask)
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * Do DWORD write to the device.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync int rc2 = pRange->CTX_SUFF(pfnWriteCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync GCPhys & ~(RTGCPHYS)3, &u32Value, sizeof(u32Value));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync /** @todo What if we've split a transfer and already read
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * something? Since reads can have sideeffects we could be
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync * kind of screwed here...
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync * Fix: Save the current state and resume it in ring-3. Requires EM to not go
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync * to REM for MMIO accesses (like may currently do). */
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync LogFlow(("iomMMIODoComplicatedWrite: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc [write]\n", GCPhys, GCPhysStart, cbValue, rc2));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync Log(("iomMMIODoComplicatedWrite: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc [write]\n", GCPhys, GCPhysStart, cbValue, rc2));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync AssertMsgReturn(rc2 >= VINF_EM_FIRST && rc2 <= VINF_EM_LAST, ("%Rrc\n", rc2), VERR_IPE_UNEXPECTED_INFO_STATUS);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Wrapper which does the write and updates range statistics when such are enabled.
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync * @warning RT_SUCCESS(rc=VINF_IOM_R3_MMIO_WRITE) is TRUE!
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncstatic int iomMMIODoWrite(PVM pVM, PVMCPU pVCpu, PIOMMMIORANGE pRange, RTGCPHYS GCPhysFault, const void *pvData, unsigned cb)
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync PIOMMMIOSTATS pStats = iomMmioGetStats(pVM, pVCpu, GCPhysFault, pRange);
68b6f6be3501c8a658944893fee17fb6df5c3ad1vboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfWrite), a);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync || (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) == IOMMMIO_FLAGS_WRITE_PASSTHRU
6c71f030509adce74519d28877dde8032dd3bfe2vboxsync || (cb == 8 && !(GCPhysFault & 7) && IOMMMIO_DOES_WRITE_MODE_ALLOW_QWORD(pRange->fFlags)) )
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync rc = pRange->CTX_SUFF(pfnWriteCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync GCPhysFault, (void *)pvData, cb); /** @todo fix const!! */
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsync rc = iomMMIODoComplicatedWrite(pVM, pRange, GCPhysFault, pvData, cb);
3242fe628b2306c050fb28c489d50bc63118f0c5vboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfWrite), a);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * Deals with complicated MMIO reads.
889b9c2ed0dbb6c0f05706b2a816f10c29b3c219vboxsync * Complicated means unaligned or non-dword/qword sized accesses depending on
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * the MMIO region's access mode flags.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @returns Strict VBox status code. Any EM scheduling status code,
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync * VINF_IOM_R3_MMIO_READ, VINF_IOM_R3_MMIO_READ_WRITE or
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync * VINF_IOM_R3_MMIO_WRITE may be returned.
4bfa7b58e362a1bca0628643c352c137900bf01avboxsync * @param pVM Pointer to the VM.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param pRange The range to read from.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param GCPhys The physical address to start reading.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param pvValue Where to store the value.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param cbValue The size of the value to read.
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsyncstatic VBOXSTRICTRC iomMMIODoComplicatedRead(PVM pVM, PIOMMMIORANGE pRange, RTGCPHYS GCPhys, void *pvValue, unsigned cbValue)
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync AssertReturn( (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_DWORD
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync || (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_DWORD_QWORD,
683371bbf37760161d1b8454ce978acf89bbb04fvboxsync AssertReturn(cbValue != 0 && cbValue <= 16, VERR_IOM_MMIO_IPE_2);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync RTGCPHYS const GCPhysStart = GCPhys; NOREF(GCPhysStart);
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsync * Do debug stop if requested.
3c3fadf5aeb22d1e9869e5fd72bdd6b1ebd4d4acvboxsync if (pRange->fFlags & IOMMMIO_FLAGS_DBGSTOP_ON_COMPLICATED_READ)
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsync rc = DBGFR3EventSrc(pVM, DBGFEVENT_DEV_STOP, RT_SRC_POS,
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsync "Complicated read %#x byte at %RGp to %s\n", cbValue, GCPhys, R3STRING(pRange->pszDesc));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * Split and conquer.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * Do DWORD read from the device.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync int rc2 = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync GCPhys & ~(RTGCPHYS)3, &u32Value, sizeof(u32Value));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync /** @todo What if we've split a transfer and already read
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * something? Since reads can have sideeffects we could be
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * kind of screwed here... */
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync LogFlow(("iomMMIODoComplicatedRead: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc\n", GCPhys, GCPhysStart, cbValue, rc2));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync Log(("iomMMIODoComplicatedRead: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc\n", GCPhys, GCPhysStart, cbValue, rc2));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync AssertMsgReturn(rc2 >= VINF_EM_FIRST && rc2 <= VINF_EM_LAST, ("%Rrc\n", rc2), VERR_IPE_UNEXPECTED_INFO_STATUS);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * Write what we've read.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * Implements VINF_IOM_MMIO_UNUSED_FF.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @returns VINF_SUCCESS.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param pvValue Where to store the zeros.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param cbValue How many bytes to read.
fa7ed0e340622064310fc195e6ae1ae6e6974a30vboxsyncstatic int iomMMIODoReadFFs(void *pvValue, size_t cbValue)
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync case 1: *(uint8_t *)pvValue = UINT8_C(0xff); break;
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync case 2: *(uint16_t *)pvValue = UINT16_C(0xffff); break;
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync case 4: *(uint32_t *)pvValue = UINT32_C(0xffffffff); break;
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync case 8: *(uint64_t *)pvValue = UINT64_C(0xffffffffffffffff); break;
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * Implements VINF_IOM_MMIO_UNUSED_00.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @returns VINF_SUCCESS.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param pvValue Where to store the zeros.
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync * @param cbValue How many bytes to read.
fa7ed0e340622064310fc195e6ae1ae6e6974a30vboxsyncstatic int iomMMIODoRead00s(void *pvValue, size_t cbValue)
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync case 1: *(uint8_t *)pvValue = UINT8_C(0x00); break;
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync case 2: *(uint16_t *)pvValue = UINT16_C(0x0000); break;
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync case 4: *(uint32_t *)pvValue = UINT32_C(0x00000000); break;
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync case 8: *(uint64_t *)pvValue = UINT64_C(0x0000000000000000); break;
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Wrapper which does the read and updates range statistics when such are enabled.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncDECLINLINE(int) iomMMIODoRead(PVM pVM, PVMCPU pVCpu, PIOMMMIORANGE pRange, RTGCPHYS GCPhys, void *pvValue, unsigned cbValue)
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync PIOMMMIOSTATS pStats = iomMmioGetStats(pVM, pVCpu, GCPhys, pRange);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfRead), a);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync || (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_PASSTHRU
99a3bdf9f0a7ee5776c1e01e4e044931b800d447vboxsync && (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_DWORD_QWORD ) )
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync rc = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhys, pvValue, cbValue);
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsync rc = iomMMIODoComplicatedRead(pVM, pRange, GCPhys, pvValue, cbValue);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync case VINF_IOM_MMIO_UNUSED_FF: rc = iomMMIODoReadFFs(pvValue, cbValue); break;
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync case VINF_IOM_MMIO_UNUSED_00: rc = iomMMIODoRead00s(pvValue, cbValue); break;
3242fe628b2306c050fb28c489d50bc63118f0c5vboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfRead), a);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Internal - statistics only.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsyncDECLINLINE(void) iomMMIOStatLength(PVM pVM, unsigned cb)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* No way. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * MOV reg, mem (read)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * MOVZX reg, mem (read)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * MOVSX reg, mem (read)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncstatic int iomInterpretMOVxXRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu,
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get the data size from parameter 2,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * and call the handler function to get the data.
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->Param2);
61e80138f3c5ea5213990bde94a973c8e64d1dadvboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync int rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, &u64Data, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Do sign extension for MOVSX.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /** @todo checkup MOVSX implementation! */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* DWORD <- BYTE */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* DWORD <- WORD */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Store the result to register (parameter 1).
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param1, pRegFrame, u64Data);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * MOV mem, reg|imm (write)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncstatic int iomInterpretMOVxXWrite(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu,
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get data to write from second parameter,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * and call the callback to write it.
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync bool fRc = iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &u64Data, &cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync int rc = iomMMIODoWrite(pVM, pVCpu, pRange, GCPhysFault, &u64Data, cb);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync/** Wrapper for reading virtual memory. */
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsyncDECLINLINE(int) iomRamRead(PVMCPU pVCpu, void *pDest, RTGCPTR GCSrc, uint32_t cb)
090f6abdd6282f48527b83162b8b441425f05e36vboxsync /* Note: This will fail in R0 or RC if it hits an access handler. That
090f6abdd6282f48527b83162b8b441425f05e36vboxsync isn't a problem though since the operation can be restarted in REM. */
9371df33e2b99a59304093df9f492440fdbff171vboxsync int rc = MMGCRamReadNoTrapHandler(pDest, (void *)(uintptr_t)GCSrc, cb);
9371df33e2b99a59304093df9f492440fdbff171vboxsync /* Page may be protected and not directly accessible. */
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync/** Wrapper for writing virtual memory. */
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsyncDECLINLINE(int) iomRamWrite(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, void *pvSrc, uint32_t cb)
090f6abdd6282f48527b83162b8b441425f05e36vboxsync /** @todo Need to update PGMVerifyAccess to take access handlers into account for Ring-0 and
090f6abdd6282f48527b83162b8b441425f05e36vboxsync * raw mode code. Some thought needs to be spent on theoretical concurrency issues as
090f6abdd6282f48527b83162b8b441425f05e36vboxsync * as well since we're not behind the pgm lock and handler may change between calls.
118e1c3f853f78b4aec64afdcb8379981f41314fvboxsync * PGMPhysInterpretedWriteNoHandlers/PGMPhysWriteGCPtr may mess up
118e1c3f853f78b4aec64afdcb8379981f41314fvboxsync * the state of some shadowed structures. */
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsync return PGMPhysInterpretedWriteNoHandlers(pVCpu, pCtxCore, GCPtrDst, pvSrc, cb, false /*fRaiseTrap*/);
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsync return PGMPhysWriteGCPtr(pVCpu, GCPtrDst, pvSrc, cb);
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync#if defined(IOM_WITH_MOVS_SUPPORT) && 0 /* locking prevents this from working. has buggy ecx handling. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] MOVSB
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] MOVSW
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] MOVSD
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param uErrorCode CPU Error code.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync * @param ppStat Which sub-sample to attribute this call to.
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsyncstatic int iomInterpretMOVS(PVM pVM, bool fWriteAccess, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * We do not support segment prefixes or REPNE.
f3701698f9d61fed78c320c3b35c64a0c63d6db1vboxsync if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REPNE))
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> interpret whatever. */
98502a585f6eda30527b54f7df18dd3de3d3d7c6vboxsync if (SELMGetCpuModeFromSelector(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid) == DISCPUMODE_16BIT)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Get the current privilege level. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get data size.
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->Param1);
332ccb6ac6feb4b50ec24d63ff029119164182ffvboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync int offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync if (pVM->iom.s.cMovsMaxBytes < (cTransfers << SIZE_2_SHIFT(cb)))
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync pVM->iom.s.cMovsMaxBytes = cTransfers << SIZE_2_SHIFT(cb);
ad27e1d5e48ca41245120c331cc88b50464813cevboxsync/** @todo re-evaluate on page boundaries. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Write operation: [Mem] -> [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * ds:esi (Virt Src) -> es:edi (Phys Dst)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsToMMIO; });
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Check callback. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Convert source address ds:esi. */
dcc035155cdf232a3d79024f475c2d4448981e85vboxsync rc = SELMToFlatEx(pVM, DISSELREG_DS, pRegFrame, (RTGCPTR)pRegFrame->rsi,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Access verification first; we currently can't recover properly from traps inside this instruction */
d45f7f7fe0c28b500b45b2dc88d7a04f4c0be6b8vboxsync rc = PGMVerifyAccess(pVCpu, pu8Virt, cTransfers * cb, (cpl == 3) ? X86_PTE_US : 0);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync Log(("MOVS will generate a trap -> recompiler, rc=%d\n", rc));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* copy loop. */
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsync rc = iomRamRead(pVCpu, &u32Data, (RTGCPTR)pu8Virt, cb);
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoWrite(pVM, pRange, Phys, &u32Data, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update ecx. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Read operation: [MMIO] -> [mem] or [MMIO] -> [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * ds:[eSI] (Phys Src) -> es:[eDI] (Virt Dst)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsFromMMIO; });
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Check callback. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Convert destination address. */
dcc035155cdf232a3d79024f475c2d4448981e85vboxsync rc = SELMToFlatEx(pVM, DISSELREG_ES, pRegFrame, (RTGCPTR)pRegFrame->rdi,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Check if destination address is MMIO. */
bee1a7d4b183cab9654f247b3ea8cf680842bed5vboxsync rc = PGMGstGetPage(pVCpu, (RTGCPTR)pu8Virt, NULL, &PhysDst);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync PhysDst |= (RTGCUINTPTR)pu8Virt & PAGE_OFFSET_MASK;
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync && (pMMIODst = iomMmioGetRangeWithRef(pVM, PhysDst)))
96dce0123cc032388e78766d08f9ee5a66b80facvboxsync /** @todo implement per-device locks for MMIO access. */
96dce0123cc032388e78766d08f9ee5a66b80facvboxsync Assert(!pMMIODst->CTX_SUFF(pDevIns)->CTX_SUFF(pCritSect));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Extra: [MMIO] -> [MMIO]
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsMMIO; });
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync if (!pMMIODst->CTX_SUFF(pfnWriteCallback) && pMMIODst->pfnWriteCallbackR3)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* copy loop. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoRead(pVM, pRange, Phys, &u32Data, cb);
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoWrite(pVM, pMMIODst, PhysDst, &u32Data, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Normal: [MMIO] -> [Mem]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Access verification first; we currently can't recover properly from traps inside this instruction */
d45f7f7fe0c28b500b45b2dc88d7a04f4c0be6b8vboxsync rc = PGMVerifyAccess(pVCpu, pu8Virt, cTransfers * cb, X86_PTE_RW | ((cpl == 3) ? X86_PTE_US : 0));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync Log(("MOVS will generate a trap -> recompiler, rc=%d\n", rc));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* copy loop. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoRead(pVM, pRange, Phys, &u32Data, cb);
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsync rc = iomRamWrite(pVCpu, pRegFrame, (RTGCPTR)pu8Virt, &u32Data, cb);
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync Log(("iomRamWrite %08X size=%d failed with %d\n", pu8Virt, cb, rc));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update ecx on exit. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* work statistics. */
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync#endif /* IOM_WITH_MOVS_SUPPORT */
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync * Gets the address / opcode mask corresponding to the given CPU mode.
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync * @returns Mask.
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync * @param enmCpuMode CPU mode.
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsyncstatic uint64_t iomDisModeToMask(DISCPUMODE enmCpuMode)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] STOSB
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] STOSW
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] STOSD
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
ebe05ec36d1fcd24d62e7066dedcb4eb2e691358vboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncstatic int iomInterpretSTOS(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * We do not support segment prefixes or REPNE..
f3701698f9d61fed78c320c3b35c64a0c63d6db1vboxsync if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REPNE))
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> REM instead of HC */
9d4c9e0a3e2dcc3bd19303d7b4e2d96d12c11814vboxsync uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->uAddrMode);
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync/** @todo r=bird: bounds checks! */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get data size.
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->Param1);
332ccb6ac6feb4b50ec24d63ff029119164182ffvboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync int offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync if (pVM->iom.s.cStosMaxBytes < (cTransfers << SIZE_2_SHIFT(cb)))
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync pVM->iom.s.cStosMaxBytes = cTransfers << SIZE_2_SHIFT(cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Use the fill callback.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /** @todo pfnFillCallback must return number of bytes successfully written!!! */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* addr++ variant. */
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync rc = pRange->CTX_SUFF(pfnFillCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), Phys,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update registers. */
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync pRegFrame->rdi = ((pRegFrame->rdi + (cTransfers << SIZE_2_SHIFT(cb))) & fAddrMask)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* addr-- variant. */
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync rc = pRange->CTX_SUFF(pfnFillCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update registers. */
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync pRegFrame->rdi = ((pRegFrame->rdi - (cTransfers << SIZE_2_SHIFT(cb))) & fAddrMask)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Use the write callback.
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* fill loop. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoWrite(pVM, pVCpu, pRange, Phys, &u64Data, cb);
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync pRegFrame->rdi = ((pRegFrame->rdi + offIncrement) & fAddrMask)
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync /* Update rcx on exit. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Work statistics and return.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] LODSB
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] LODSW
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] LODSD
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncstatic int iomInterpretLODS(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * We do not support segment prefixes or REP*.
f3701698f9d61fed78c320c3b35c64a0c63d6db1vboxsync if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REP | DISPREFIX_REPNE))
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> REM instead of HC */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get data size.
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->Param2);
1df4b0cdc5ec23d817014f9347ef28222b51e3fbvboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync int offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Perform read.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync int rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, &pRegFrame->rax, cb);
9d4c9e0a3e2dcc3bd19303d7b4e2d96d12c11814vboxsync uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->uAddrMode);
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync pRegFrame->rsi = ((pRegFrame->rsi + offIncrement) & fAddrMask)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Work statistics and return.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * CMP [MMIO], reg|imm
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * CMP reg|imm, [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncstatic int iomInterpretCMP(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get the operands.
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* cmp reg, [MMIO]. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, &uData2, cb);
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* cmp [MMIO], reg|imm. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, &uData1, cb);
0f8b9243304469cd1e58d6986931bbfed5ba359evboxsync /* Can't deal with 8 byte operands in our 32-bit emulation code. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Emulate CMP and update guest flags. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync uint32_t eflags = EMEmulateCmp(uData1, uData2, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync pRegFrame->eflags.u32 = (pRegFrame->eflags.u32 & ~(X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync | (eflags & (X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * AND [MMIO], reg|imm
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * AND reg, [MMIO]
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * OR [MMIO], reg|imm
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * OR reg, [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @param pfnEmulate Instruction emulation function.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncstatic int iomInterpretOrXorAnd(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
0f8b9243304469cd1e58d6986931bbfed5ba359evboxsync /* Can't deal with 8 byte operands in our 32-bit emulation code. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* and reg, [MMIO]. */
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, &uData2, cb);
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
0f8b9243304469cd1e58d6986931bbfed5ba359evboxsync /* Can't deal with 8 byte operands in our 32-bit emulation code. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* and [MMIO], reg|imm. */
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync if ( (pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync && (pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3))
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, &uData1, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Emulate AND and update guest flags. */
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync uint32_t eflags = pfnEmulate((uint32_t *)&uData1, uData2, cb);
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync LogFlow(("iomInterpretOrXorAnd %s result %RX64\n", pszInstr, uData1));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to MMIO. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoWrite(pVM, pVCpu, pRange, GCPhysFault, &uData1, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to register. */
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param1, pRegFrame, uData1);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update guest's eflags and finish. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync pRegFrame->eflags.u32 = (pRegFrame->eflags.u32 & ~(X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync | (eflags & (X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * TEST [MMIO], reg|imm
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * TEST reg, [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncstatic int iomInterpretTEST(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* and test, [MMIO]. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, &uData2, cb);
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* test [MMIO], reg|imm. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, &uData1, cb);
0f8b9243304469cd1e58d6986931bbfed5ba359evboxsync /* Can't deal with 8 byte operands in our 32-bit emulation code. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Emulate TEST (=AND without write back) and update guest EFLAGS. */
be9bc9b4ba510c4b4159c193f783d024633ef8e9vboxsync uint32_t eflags = EMEmulateAnd((uint32_t *)&uData1, uData2, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync pRegFrame->eflags.u32 = (pRegFrame->eflags.u32 & ~(X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync | (eflags & (X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF));
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * BT [MMIO], reg|imm
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * Restricted implementation.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @param pRegFrame Trap register frame.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @param pCpu Disassembler CPU state.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @param pRange Pointer MMIO range.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncstatic int iomInterpretBT(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync if (!iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uBit, &cbIgnored))
1f24d758b35a86f1075a86a4760da9bbc1e80229vboxsync /* The size of the memory operand only matters here. */
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync unsigned cbData = DISGetParamSize(pCpu, &pCpu->Param1);
1f24d758b35a86f1075a86a4760da9bbc1e80229vboxsync /* bt [MMIO], reg|imm. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync int rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, &uData, cbData);
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync /* Find the bit inside the faulting address */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * XCHG [MMIO], reg
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * XCHG reg, [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncstatic int iomInterpretXCHG(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync /* Check for read & write handlers since IOMMMIOHandler doesn't cover this. */
96dce0123cc032388e78766d08f9ee5a66b80facvboxsync if ( (!pRange->CTX_SUFF(pfnReadCallback) && pRange->pfnReadCallbackR3)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync || (!pRange->CTX_SUFF(pfnWriteCallback) && pRange->pfnWriteCallbackR3))
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* xchg reg, [MMIO]. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, &uData2, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to MMIO. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoWrite(pVM, pVCpu, pRange, GCPhysFault, &uData1, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to register. */
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param1, pRegFrame, uData2);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync Assert(rc == VINF_IOM_R3_MMIO_WRITE || rc == VINF_PATM_HC_MMIO_PATCH_WRITE);
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync Assert(rc == VINF_IOM_R3_MMIO_READ || rc == VINF_PATM_HC_MMIO_PATCH_READ);
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* xchg [MMIO], reg. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, &uData1, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to MMIO. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoWrite(pVM, pVCpu, pRange, GCPhysFault, &uData2, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to register. */
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param2, pRegFrame, uData1);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
7f4b838a90ed89695b8133656f1c63b9d5208d39vboxsync AssertMsg(rc == VINF_IOM_R3_MMIO_READ_WRITE || rc == VINF_IOM_R3_MMIO_WRITE || rc == VINF_PATM_HC_MMIO_PATCH_WRITE || rc == VINF_EM_RAW_EMULATE_IO_BLOCK, ("rc=%Rrc\n", rc));
7f4b838a90ed89695b8133656f1c63b9d5208d39vboxsync AssertMsg(rc == VINF_IOM_R3_MMIO_READ_WRITE || rc == VINF_IOM_R3_MMIO_READ || rc == VINF_PATM_HC_MMIO_PATCH_READ || rc == VINF_EM_RAW_EMULATE_IO_BLOCK, ("rc=%Rrc\n", rc));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * \#PF Handler callback for MMIO ranges.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code (appropriate for GC return).
fa8716d08ff627a8e1c14bcac56e8e3867b3f795vboxsync * @param pVM Pointer to the VM.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync * @param uErrorCode CPU Error code. This is UINT32_MAX when we don't have
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync * any error code (the EPT misconfig hack).
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync * @param pCtxCore Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pvUser Pointer to the MMIO ring-3 range entry.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncstatic int iomMMIOHandler(PVM pVM, PVMCPU pVCpu, uint32_t uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault, void *pvUser)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_PROFILE_START(&pVM->iom.s.StatRZMMIOHandler, a);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync Log(("iomMMIOHandler: GCPhys=%RGp uErr=%#x rip=%RGv\n", GCPhysFault, uErrorCode, (RTGCPTR)pCtxCore->rip));
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync Assert(pRange == iomMmioGetRange(pVM, pVCpu, GCPhysFault));
68b6f6be3501c8a658944893fee17fb6df5c3ad1vboxsync * Locate the statistics.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync PIOMMMIOSTATS pStats = iomMmioGetStats(pVM, pVCpu, GCPhysFault, pRange);
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a);
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync * Should we defer the request right away? This isn't usually the case, so
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync * do the simple test first and the try deal with uErrorCode being N/A.
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync if (RT_UNLIKELY( ( !pRange->CTX_SUFF(pfnWriteCallback)
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync ? pRange->pfnWriteCallbackR3 || pRange->pfnReadCallbackR3
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync ? !pRange->CTX_SUFF(pfnWriteCallback) && pRange->pfnWriteCallbackR3
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync : !pRange->CTX_SUFF(pfnReadCallback) && pRange->pfnReadCallbackR3
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync#endif /* !IN_RING3 */
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync * Retain the range and do locking.
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync rc = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_MMIO_READ_WRITE);
352f5cf617a287b8a3ca2fbe1f23afe258874ce9vboxsync * Disassemble the instruction and interpret it.
681380880d4131019871e8f22cb3349b757168cavboxsync rc = EMInterpretDisasCurrent(pVM, pVCpu, pDis, &cbOp);
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync AssertMsg(uErrorCode == UINT32_MAX || DISUSE_IS_EFFECTIVE_ADDR(pDis->Param1.fUse) == !!(uErrorCode & X86_TRAP_PF_RW), ("flags1=%#llx/%RTbool flags2=%#llx/%RTbool ErrCd=%#x\n", pDis->Param1.fUse, DISUSE_IS_EFFECTIVE_ADDR(pDis->Param1.fUse), pDis->Param2.fUse, DISUSE_IS_EFFECTIVE_ADDR(pDis->Param2.fUse), uErrorCode));
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync if (uErrorCode != UINT32_MAX /* EPT+MMIO optimization */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomInterpretMOVxXWrite(pVM, pVCpu, pCtxCore, pDis, pRange, GCPhysFault);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomInterpretMOVxXRead(pVM, pVCpu, pCtxCore, pDis, pRange, GCPhysFault);
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync STAM_PROFILE_ADV_START(&pVM->iom.s.StatRZInstMovs, c);
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync rc = iomInterpretMOVS(pVM, !!(uErrorCode & X86_TRAP_PF_RW), pCtxCore, GCPhysFault, pDis, pRange, &pStat);
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync STAM_PROFILE_ADV_STOP_EX(&pVM->iom.s.StatRZInstMovs, pStat, c);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomInterpretSTOS(pVM, pVCpu, pCtxCore, GCPhysFault, pDis, pRange);
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync Assert(!(uErrorCode & X86_TRAP_PF_RW) || uErrorCode == UINT32_MAX);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomInterpretLODS(pVM, pVCpu, pCtxCore, GCPhysFault, pDis, pRange);
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync Assert(!(uErrorCode & X86_TRAP_PF_RW) || uErrorCode == UINT32_MAX);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomInterpretCMP(pVM, pVCpu, pCtxCore, GCPhysFault, pDis, pRange);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomInterpretOrXorAnd(pVM, pVCpu, pCtxCore, GCPhysFault, pDis, pRange, EMEmulateAnd);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomInterpretOrXorAnd(pVM, pVCpu, pCtxCore, GCPhysFault, pDis, pRange, EMEmulateOr);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomInterpretOrXorAnd(pVM, pVCpu, pCtxCore, GCPhysFault, pDis, pRange, EMEmulateXor);
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync Assert(!(uErrorCode & X86_TRAP_PF_RW) || uErrorCode == UINT32_MAX);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomInterpretTEST(pVM, pVCpu, pCtxCore, GCPhysFault, pDis, pRange);
3f1e0eea71cabeb90529e546f16eb7aee513fde9vboxsync Assert(!(uErrorCode & X86_TRAP_PF_RW) || uErrorCode == UINT32_MAX);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomInterpretBT(pVM, pVCpu, pCtxCore, GCPhysFault, pDis, pRange);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomInterpretXCHG(pVM, pVCpu, pCtxCore, GCPhysFault, pDis, pRange);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync * The instruction isn't supported. Hand it on to ring-3.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * On success advance EIP.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync#if defined(VBOX_WITH_STATISTICS) && !defined(IN_RING3)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a);
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * \#PF Handler callback for MMIO ranges.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @returns VBox status code (appropriate for GC return).
fa8716d08ff627a8e1c14bcac56e8e3867b3f795vboxsync * @param pVM Pointer to the VM.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param uErrorCode CPU Error code.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param pCtxCore Trap register frame.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param pvFault The fault address (cr2).
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param pvUser Pointer to the MMIO ring-3 range entry.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsyncVMMDECL(int) IOMMMIOHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync LogFlow(("IOMMMIOHandler: GCPhys=%RGp uErr=%#x pvFault=%RGv rip=%RGv\n",
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync GCPhysFault, (uint32_t)uErrorCode, pvFault, (RTGCPTR)pCtxCore->rip));
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync VBOXSTRICTRC rcStrict = iomMMIOHandler(pVM, VMMGetCpu(pVM), (uint32_t)uErrorCode, pCtxCore, GCPhysFault, pvUser);
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * Physical access handler for MMIO ranges.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @returns VBox status code (appropriate for GC return).
fa8716d08ff627a8e1c14bcac56e8e3867b3f795vboxsync * @param pVM Pointer to the VM.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param uErrorCode CPU Error code.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param pCtxCore Trap register frame.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param GCPhysFault The GC physical address.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncVMMDECL(VBOXSTRICTRC) IOMMMIOPhysHandler(PVM pVM, PVMCPU pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault)
632a9d50f2769ca38de71fc59dbca130db646f7avboxsync * We don't have a range here, so look it up before calling the common function.
632a9d50f2769ca38de71fc59dbca130db646f7avboxsync PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhysFault);
632a9d50f2769ca38de71fc59dbca130db646f7avboxsync VBOXSTRICTRC rcStrict = iomMMIOHandler(pVM, pVCpu, (uint32_t)uErrorCode, pCtxCore, GCPhysFault, pRange);
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * \#PF Handler callback for MMIO ranges.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @returns VINF_SUCCESS if the handler have carried out the operation.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
fa8716d08ff627a8e1c14bcac56e8e3867b3f795vboxsync * @param pVM Pointer to the VM.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param GCPhys The physical address the guest is writing to.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param pvPhys The HC mapping of that address.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param pvBuf What the guest is reading/writing.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param cbBuf How much it's reading/writing.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param enmAccessType The access type.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param pvUser Pointer to the MMIO range entry.
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsyncDECLCALLBACK(int) IOMR3MMIOHandler(PVM pVM, RTGCPHYS GCPhysFault, void *pvPhys, void *pvBuf, size_t cbBuf,
d2586e619c18433b1179f941dfde06f58e64e310vboxsync AssertMsg(cbBuf >= 1 && cbBuf <= 16, ("%zu\n", cbBuf));
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync * Validate the range.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync Assert(pRange == iomMmioGetRange(pVM, pVCpu, GCPhysFault));
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync * Perform locking.
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync rc = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_MMIO_READ_WRITE);
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync * Perform the access.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, pvBuf, (unsigned)cbBuf);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rc = iomMMIODoWrite(pVM, pVCpu, pRange, GCPhysFault, pvBuf, (unsigned)cbBuf);
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync#endif /* IN_RING3 */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Reads a MMIO register.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
fa8716d08ff627a8e1c14bcac56e8e3867b3f795vboxsync * @param pVM Pointer to the VM.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhys The physical address to read.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pu32Value Where to store the value read.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncVMMDECL(VBOXSTRICTRC) IOMMMIORead(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue)
22408fe91738075b3c413b14a421d641aacad508vboxsync /* Take the IOM lock before performing any MMIO. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync#if defined(IEM_VERIFICATION_MODE) && defined(IN_RING3)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Lookup the current context range node and statistics.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhys);
683371bbf37760161d1b8454ce978acf89bbb04fvboxsync AssertMsgFailed(("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));
68b6f6be3501c8a658944893fee17fb6df5c3ad1vboxsync#else /* VBOX_WITH_STATISTICS */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync PIOMMMIOSTATS pStats = iomMmioGetStats(pVM, pVCpu, GCPhys, pRange);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync#endif /* VBOX_WITH_STATISTICS */
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync * Perform locking.
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync rc = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_MMIO_WRITE);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Perform the read and deal with the result.
3242fe628b2306c050fb28c489d50bc63118f0c5vboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfRead), a);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync || (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_PASSTHRU
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync rc = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhys,
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsync rc = iomMMIODoComplicatedRead(pVM, pRange, GCPhys, pu32Value, (unsigned)cbValue);
3242fe628b2306c050fb28c489d50bc63118f0c5vboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfRead), a);
3242fe628b2306c050fb28c489d50bc63118f0c5vboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=VINF_SUCCESS\n", GCPhys, *pu32Value, cbValue));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, *pu32Value, cbValue, VBOXSTRICTRC_VAL(rc)));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, *pu32Value, cbValue, VBOXSTRICTRC_VAL(rc)));
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, *pu32Value, cbValue, VBOXSTRICTRC_VAL(rc)));
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync /* not reached */
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync * Unassigned memory - this is actually not supposed t happen...
3242fe628b2306c050fb28c489d50bc63118f0c5vboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfRead), a); /** @todo STAM_PROFILE_ADD_ZERO_PERIOD */
3242fe628b2306c050fb28c489d50bc63118f0c5vboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfRead), a);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=VINF_SUCCESS\n", GCPhys, *pu32Value, cbValue));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Writes to a MMIO register.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
fa8716d08ff627a8e1c14bcac56e8e3867b3f795vboxsync * @param pVM Pointer to the VM.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhys The physical address to write to.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param u32Value The value to write.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncVMMDECL(VBOXSTRICTRC) IOMMMIOWrite(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue)
22408fe91738075b3c413b14a421d641aacad508vboxsync /* Take the IOM lock before performing any MMIO. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync#if defined(IEM_VERIFICATION_MODE) && defined(IN_RING3)
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEMNotifyMMIOWrite(pVM, GCPhys, u32Value, cbValue);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Lookup the current context range node.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhys);
683371bbf37760161d1b8454ce978acf89bbb04fvboxsync AssertMsgFailed(("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));
68b6f6be3501c8a658944893fee17fb6df5c3ad1vboxsync#else /* VBOX_WITH_STATISTICS */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync PIOMMMIOSTATS pStats = iomMmioGetStats(pVM, pVCpu, GCPhys, pRange);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync#endif /* VBOX_WITH_STATISTICS */
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync * Perform locking.
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync rc = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_MMIO_READ);
afa761a969c8883e5ea370e898d40ce053fbcb22vboxsync * Perform the write.
3242fe628b2306c050fb28c489d50bc63118f0c5vboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfWrite), a);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync || (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) == IOMMMIO_FLAGS_WRITE_PASSTHRU
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync rc = pRange->CTX_SUFF(pfnWriteCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
ad9297dbc9565afa293c95d8a3eb2cc4bbaffe27vboxsync rc = iomMMIODoComplicatedWrite(pVM, pRange, GCPhys, &u32Value, (unsigned)cbValue);
3242fe628b2306c050fb28c489d50bc63118f0c5vboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfWrite), a);
cea26cf0a0d390c2cca75cb19cb0e86c580e9d77vboxsync Log4(("IOMMMIOWrite: GCPhys=%RGp u32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, u32Value, cbValue, VBOXSTRICTRC_VAL(rc)));
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync * No write handler, nothing to do.
3242fe628b2306c050fb28c489d50bc63118f0c5vboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfWrite), a);
3242fe628b2306c050fb28c489d50bc63118f0c5vboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfWrite), a);
b3547e42ce5221377866e3fa041b3086b7cc1562vboxsync Log4(("IOMMMIOWrite: GCPhys=%RGp u32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, u32Value, cbValue, VINF_SUCCESS));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * ES:EDI,DX[,ECX]
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @remark Assumes caller checked the access privileges (IOMInterpretCheckPortIOAccess)
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_SUCCESS Success.
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * status code must be passed on to EM.
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync * @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only)
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_RAW_EMULATE_INSTR Defer the read to the REM.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param uPort IO Port
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param uPrefix IO instruction prefix
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync * @param enmAddrMode The address mode.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param cbTransfer Size of transfer unit
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretINSEx(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * We do not support REPNE or decrementing destination
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * pointer. Segment prefixes are deliberately ignored, as per the instruction specification.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get bytes/words/dwords count to transfer.
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync uint64_t const fAddrMask = iomDisModeToMask(enmAddrMode);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Convert destination address es:edi. */
dcc035155cdf232a3d79024f475c2d4448981e85vboxsync int rc2 = SELMToFlatEx(pVCpu, DISSELREG_ES, pRegFrame, pRegFrame->rdi & fAddrMask,
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync Log(("INS destination address conversion failed -> fallback, rc2=%d\n", rc2));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Access verification first; we can't recover from traps inside this instruction, as the port read cannot be repeated. */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync rc2 = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrDst, cTransfers * cbTransfer,
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync Log(("INS will generate a trap -> fallback, rc2=%d\n", rc2));
65047a71308d9524254c8f60dc1371cf5679d53avboxsync Log(("IOM: rep ins%d port %#x count %d\n", cbTransfer * 8, uPort, cTransfers));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* If the device supports string transfers, ask it to do as
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * much as it wants. The rest is done with single-word transfers. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rcStrict = IOMIOPortReadString(pVM, pVCpu, uPort, &GCPtrDst, &cTransfers, cbTransfer);
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync AssertRC(VBOXSTRICTRC_VAL(rcStrict)); Assert(cTransfers <= cTransfersOrg);
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync pRegFrame->rdi = ((pRegFrame->rdi + (cTransfersOrg - cTransfers) * cbTransfer) & fAddrMask)
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rcStrict = IOMIOPortRead(pVM, pVCpu, uPort, &u32Value, cbTransfer);
a9147f75af731f500aea9d37566e83a1f0e2c51dvboxsync rc2 = iomRamWrite(pVCpu, pRegFrame, GCPtrDst, &u32Value, cbTransfer);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbTransfer);
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync pRegFrame->rdi = ((pRegFrame->rdi + cbTransfer) & fAddrMask)
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync /* Update rcx on exit. */
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IOM_R3_IOPORT_READ || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
d09cc81eb4a6085171ec824e0aa852fa3fe82b3bvboxsync#if !defined(VBOX_WITH_FIRST_IEM_STEP) || defined(IN_RC) /* Latter for IOMRCIOPortHandler */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * ES:EDI,DX[,ECX]
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_SUCCESS Success.
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * status code must be passed on to EM.
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync * @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only)
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_RAW_EMULATE_INSTR Defer the read to the REM.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretINS(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get port number directly from the register (no need to bother the
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * disassembler). And get the I/O register size from the opcode / prefix.
9d4c9e0a3e2dcc3bd19303d7b4e2d96d12c11814vboxsync cb = (pCpu->uOpMode == DISCPUMODE_16BIT) ? 2 : 4; /* dword in both 32 & 64 bits mode */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, Port, cb);
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP || rcStrict == VINF_TRPM_XCPT_DISPATCHED || rcStrict == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync return IOMInterpretINSEx(pVM, pVCpu, pRegFrame, Port, pCpu->fPrefix, (DISCPUMODE)pCpu->uAddrMode, cb);
630fd0059c966a57ba9bfcb436508e929ae24f4cvboxsync#endif /* !IEM || RC */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * DS:ESI,DX[,ECX]
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @remark Assumes caller checked the access privileges (IOMInterpretCheckPortIOAccess)
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_SUCCESS Success.
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * status code must be passed on to EM.
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync * @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param uPort IO Port
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param uPrefix IO instruction prefix
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync * @param enmAddrMode The address mode.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param cbTransfer Size of transfer unit
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretOUTSEx(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * We do not support segment prefixes, REPNE or
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * decrementing source pointer.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get bytes/words/dwords count to transfer.
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync uint64_t const fAddrMask = iomDisModeToMask(enmAddrMode);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Convert source address ds:esi. */
dcc035155cdf232a3d79024f475c2d4448981e85vboxsync int rc2 = SELMToFlatEx(pVCpu, DISSELREG_DS, pRegFrame, pRegFrame->rsi & fAddrMask,
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync Log(("OUTS source address conversion failed -> fallback, rc2=%Rrc\n", rc2));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Access verification first; we currently can't recover properly from traps inside this instruction */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync rc2 = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrSrc, cTransfers * cbTransfer,
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync Log(("OUTS will generate a trap -> fallback, rc2=%Rrc\n", rc2));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync Log(("IOM: rep outs%d port %#x count %d\n", cbTransfer * 8, uPort, cTransfers));
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * If the device supports string transfers, ask it to do as
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * much as it wants. The rest is done with single-word transfers.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rcStrict = IOMIOPortWriteString(pVM, pVCpu, uPort, &GCPtrSrc, &cTransfers, cbTransfer);
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync AssertRC(VBOXSTRICTRC_VAL(rcStrict)); Assert(cTransfers <= cTransfersOrg);
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync pRegFrame->rsi = ((pRegFrame->rsi + (cTransfersOrg - cTransfers) * cbTransfer) & fAddrMask)
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync rcStrict = iomRamRead(pVCpu, &u32Value, GCPtrSrc, cbTransfer);
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync rcStrict = IOMIOPortWrite(pVM, pVCpu, uPort, u32Value, cbTransfer);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync GCPtrSrc = (RTGCPTR)((RTUINTPTR)GCPtrSrc + cbTransfer);
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync pRegFrame->rsi = ((pRegFrame->rsi + cbTransfer) & fAddrMask)
9a0f1c40d078ffc54c3209648d12c70f36480067vboxsync /* Update rcx on exit. */
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IOM_R3_IOPORT_WRITE || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
d09cc81eb4a6085171ec824e0aa852fa3fe82b3bvboxsync#if !defined(VBOX_WITH_FIRST_IEM_STEP) || defined(IN_RC) /* Latter for IOMRCIOPortHandler */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * DS:ESI,DX[,ECX]
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_SUCCESS Success.
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * status code must be passed on to EM.
648b0a0e189323afe4d836f1848f82c7dded0e58vboxsync * @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_RAW_EMULATE_INSTR Defer the write to the REM.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync * @param pVCpu Pointer to the virtual CPU structure of the caller.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretOUTS(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get port number from the first parameter.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * And get the I/O register size from the opcode / prefix.
2309a5a68c254f4881841fbf8118e899c32d7385vboxsync bool fRc = iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &Port, &cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
9d4c9e0a3e2dcc3bd19303d7b4e2d96d12c11814vboxsync cb = (pCpu->uOpMode == DISCPUMODE_16BIT) ? 2 : 4; /* dword in both 32 & 64 bits mode */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, Port, cb);
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP || rcStrict == VINF_TRPM_XCPT_DISPATCHED || rcStrict == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync return IOMInterpretOUTSEx(pVM, pVCpu, pRegFrame, Port, pCpu->fPrefix, (DISCPUMODE)pCpu->uAddrMode, cb);
630fd0059c966a57ba9bfcb436508e929ae24f4cvboxsync#endif /* !IEM || RC */
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Mapping an MMIO2 page in place of an MMIO page for direct access.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * (This is a special optimization used by the VGA device.)
f7afd3bd944d339a711ec851bad6a759fd64a7d9vboxsync * @returns VBox status code. This API may return VINF_SUCCESS even if no
f7afd3bd944d339a711ec851bad6a759fd64a7d9vboxsync * remapping is made,.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * @param GCPhys The address of the MMIO page to be changed.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * @param GCPhysRemapped The address of the MMIO2 page.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * @param fPageFlags Page flags to set. Must be (X86_PTE_RW | X86_PTE_P)
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * for the time being.
3f87e8441654102266beb3bda1446e4878360a84vboxsyncVMMDECL(int) IOMMMIOMapMMIO2Page(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags)
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync /* Currently only called from the VGA device during MMIO. */
d7f13a056a2bfd91ca8973baf89c7d87c2d1bf80vboxsync Log(("IOMMMIOMapMMIO2Page %RGp -> %RGp flags=%RX64\n", GCPhys, GCPhysRemapped, fPageFlags));
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync AssertReturn(fPageFlags == (X86_PTE_RW | X86_PTE_P), VERR_INVALID_PARAMETER);
be9322776c5e79993df07a0728780a4397be7388vboxsync /* This currently only works in real mode, protected mode without paging or with nested paging. */
f091ce66ee934d599f16056078a9a76d7286b959vboxsync if ( !HMIsEnabled(pVM) /* useless without VT-x/AMD-V */
f7afd3bd944d339a711ec851bad6a759fd64a7d9vboxsync return VINF_SUCCESS; /* better luck the next time around */
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Lookup the context range node the page belongs to.
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhys);
96dce0123cc032388e78766d08f9ee5a66b80facvboxsync ("Handlers and page tables are out of sync or something! GCPhys=%RGp\n", GCPhys), VERR_IOM_MMIO_RANGE_NOT_FOUND);
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync Assert((pRange->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Do the aliasing; page align the addresses since PGM is picky.
f7afd3bd944d339a711ec851bad6a759fd64a7d9vboxsync rc = PGMHandlerPhysicalPageAlias(pVM, pRange->GCPhys, GCPhys, GCPhysRemapped);
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Modify the shadow page table. Since it's an MMIO page it won't be present and we
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * can simply prefetch it.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Note: This is a NOP in the EPT case; we'll just let it fault again to resync the page.
c2d60c3cf83832939dae3daaf9e262c292026374vboxsync# if 0 /* The assertion is wrong for the PGM_SYNC_CLEAR_PGM_POOL and VINF_PGM_HANDLER_ALREADY_ALIASED cases. */
d45f7f7fe0c28b500b45b2dc88d7a04f4c0be6b8vboxsync rc = PGMShwGetPage(pVCpu, (RTGCPTR)GCPhys, &fFlags, &HCPhys);
7250d2692ab7cbd235c2feeb78e48f0bdb302f14vboxsync Assert(rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
7250d2692ab7cbd235c2feeb78e48f0bdb302f14vboxsync Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
c2d60c3cf83832939dae3daaf9e262c292026374vboxsync# endif /* !IEM_VERIFICATION_MODE_FULL */
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * Mapping a HC page in place of an MMIO page for direct access.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * (This is a special optimization used by the APIC in the VT-x case.)
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * @returns VBox status code.
a6446e00c554369ae30f5040a50299f6ea4129aevboxsync * @param pVM Pointer to the VM.
a6446e00c554369ae30f5040a50299f6ea4129aevboxsync * @param pVCpu Pointer to the VMCPU.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * @param GCPhys The address of the MMIO page to be changed.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * @param HCPhys The address of the host physical page.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * @param fPageFlags Page flags to set. Must be (X86_PTE_RW | X86_PTE_P)
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * for the time being.
a6446e00c554369ae30f5040a50299f6ea4129aevboxsyncVMMDECL(int) IOMMMIOMapMMIOHCPage(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint64_t fPageFlags)
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync /* Currently only called from VT-x code during a page fault. */
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync Log(("IOMMMIOMapMMIOHCPage %RGp -> %RGp flags=%RX64\n", GCPhys, HCPhys, fPageFlags));
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync AssertReturn(fPageFlags == (X86_PTE_RW | X86_PTE_P), VERR_INVALID_PARAMETER);
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * Lookup the context range node the page belongs to.
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync /* Can't lock IOM here due to potential deadlocks in the VGA device; not safe to access. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync PIOMMMIORANGE pRange = iomMMIOGetRangeUnsafe(pVM, pVCpu, GCPhys);
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync ("Handlers and page tables are out of sync or something! GCPhys=%RGp\n", GCPhys), VERR_IOM_MMIO_RANGE_NOT_FOUND);
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync Assert((pRange->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * Do the aliasing; page align the addresses since PGM is picky.
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync int rc = PGMHandlerPhysicalPageAliasHC(pVM, GCPhys, GCPhys, HCPhys);
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * Modify the shadow page table. Since it's an MMIO page it won't be present and we
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * can simply prefetch it.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * Note: This is a NOP in the EPT case; we'll just let it fault again to resync the page.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
c2d60c3cf83832939dae3daaf9e262c292026374vboxsync#endif /* !IEM_VERIFICATION_MODE_FULL */
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * Reset a previously modified MMIO region; restore the access flags.
ebe05ec36d1fcd24d62e7066dedcb4eb2e691358vboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param GCPhys Physical address that's part of the MMIO region to be reset.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsyncVMMDECL(int) IOMMMIOResetRegion(PVM pVM, RTGCPHYS GCPhys)
be9322776c5e79993df07a0728780a4397be7388vboxsync /* This currently only works in real mode, protected mode without paging or with nested paging. */
f091ce66ee934d599f16056078a9a76d7286b959vboxsync if ( !HMIsEnabled(pVM) /* useless without VT-x/AMD-V */
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Lookup the context range node the page belongs to.
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync /* Can't lock IOM here due to potential deadlocks in the VGA device; not safe to access. */
6ca4e5aa3635ceff1141c84761528848805e1037vboxsync PIOMMMIORANGE pRange = iomMMIOGetRangeUnsafe(pVM, pVCpu, GCPhys);
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync ("Handlers and page tables are out of sync or something! GCPhys=%RGp\n", GCPhys), VERR_IOM_MMIO_RANGE_NOT_FOUND);
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync Assert((pRange->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Call PGM to do the job work.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * After the call, all the pages should be non-present... unless there is
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * a page pool flush pending (unlikely).
46ae097c942b4a2d5038d9593e312856238da75fvboxsync if (!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3))
87fe4d73d7e6e53fbcec40dc6be2372479851cd4vboxsync rc = PGMShwGetPage(pVCpu, (RTGCPTR)GCPhys, &fFlags, &HCPhys);
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync Assert(rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
7e960d3a0a8a3a84d7aba2cca45d72b1c31cc97bvboxsync#endif /* !IN_RC */