Searched refs:FPUIP (Results 1 - 9 of 9) sorted by relevance

/vbox/src/VBox/VMM/testcase/
H A DtstX86-FpuSaveRestore.cpp52 RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState IP=%#06x%04x%08x\n", FxState.Rsrvd1, FxState.CS, FxState.FPUIP);
54 RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState CS:IP=%#06x:%#010x\n", FxState.CS, FxState.FPUIP);
56 RTTestIPrintf(RTTESTLVL_ALWAYS, " FpuEnv CS:IP=%#06x:%#010x\n", FpuEnv.FPUCS, FpuEnv.FPUIP);
61 FxState2.FPUIP -= 0x20;
64 FpuEnv2.FPUIP -= 0x20;
75 RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState IP=%#06x%04x%08x\n", FxStateJustRestore.Rsrvd1, FxStateJustRestore.CS, FxStateJustRestore.FPUIP);
77 RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState CS:IP=%#06x:%#010x\n", FxStateJustRestore.CS, FxStateJustRestore.FPUIP);
79 RTTestIPrintf(RTTESTLVL_ALWAYS, " FpuEnv CS:IP=%#06x:%#010x\n", FpuEnvJustRestore.FPUCS, FpuEnvJustRestore.FPUIP);
92 RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState IP=%#06x%04x%08x\n", FxStateRestoreLoad.Rsrvd1, FxStateRestoreLoad.CS, FxStateRestoreLoad.FPUIP);
94 RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState CS:IP=%#06x:%#010x\n", FxStateRestoreLoad.CS, FxStateRestoreLoad.FPUIP);
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H A DtstX86-1A.asm1908 mov dword [xSP + 1024 + X86FXSTATE.FPUIP], 0
1956 mov dword [xSP + xCB + X86FXSTATE.FPUIP], 0
2067 ; Same as CompareFPUAndGRegsOnStack, except that it ignores the FOP and FPUIP
2088 mov dword [xSI + X86FXSTATE.FPUIP], 0 ; ignore
2089 mov dword [xDI + X86FXSTATE.FPUIP], 0 ; ignore
2513 cmp rcx, [xBP + xCB*2 + X86FXSTATE.FPUIP]
2515 cmp ecx, [xBP + xCB*2 + X86FXSTATE.FPUIP]
2549 cmp xAX, [xBP + xCB*2 + X86FXSTATE.FPUIP]
2553 cmp ecx, [xBP + xCB*2 + 512 + X86FSTENV32P.FPUIP]
2575 mov dword [xSP + X86FXSTATE.FPUIP],
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/vbox/src/VBox/VMM/VMMAll/
H A DIEMAllCImpl.cpp.h6127 pXState->x87.FPUIP = 0;
6201 pDst->FPUIP = pSrc->FPUIP;
6207 /* Save upper 16-bits of FPUIP (IP:CS:Rsvd1) and FPUDP (DP:DS:Rsvd2). */
6316 pDst->FPUIP = pSrc->FPUIP;
6325 pDst->FPUIP = pSrc->FPUIP;
6372 /** @todo Testcase: How does this work when the FPUIP/CS was saved in
6377 uPtr.pu16[3] = (uint16_t)pSrcX87->FPUIP;
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H A DIEMAll.cpp5142 * Updates the FOP, FPU.CS and FPUIP registers.
5152 /** @todo x87.CS and FPUIP needs to be kept seperately. */
5155 /** @todo Testcase: making assumptions about how FPUIP and FPUDP are handled
5158 pFpuCtx->FPUIP = pCtx->eip | ((uint32_t)pCtx->cs.Sel << 4);
5163 pFpuCtx->FPUIP = pCtx->rip;
5446 * Stores a result in a FPU register, updates the FSW, FTW, FPUIP, FPUCS, and
5464 * Stores a result in a FPU register, updates the FSW, FTW, FPUIP, FPUCS, and
5483 * Stores a result in a FPU register, updates the FSW, FTW, FPUIP, FPUCS, FOP,
5504 * Stores a result in a FPU register, updates the FSW, FTW, FPUIP, FPUCS, FOP,
5527 * Updates the FOP, FPUIP, an
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H A DEMAll.cpp571 CHECK_FIELD(fpu.FPUIP);
/vbox/src/VBox/VMM/VMMR3/
H A DCPUMDbg.cpp1163 CPU_REG_XS_RW_AS("fpuip", FPUIP, U32, x87.FPUIP, cpumR3RegGet_XStateGeneric, cpumR3RegSet_XStateGeneric, g_aCpumRegAliases_fpuip, NULL ),
1291 CPU_REG_DUMMY("fpuip", FPUIP, U32),
H A DCPUM.cpp120 SSMFIELD_ENTRY( X86FXSTATE, FPUIP),
260 SSMFIELD_ENTRY( X86FXSTATE, FPUIP),
397 SSMFIELD_ENTRY( X86FXSTATE, FPUIP),
1619 pszPrefix, pFpuCtx->FPUIP, pszPrefix, pFpuCtx->CS, pszPrefix, pFpuCtx->Rsrvd1,
/vbox/include/iprt/
H A Dx86.h2233 uint32_t FPUIP; member in struct:X86FSTENV32P
2393 uint32_t FPUIP; member in struct:X86FPUSTATE
2426 uint32_t FPUIP; member in struct:X86FXSTATE
/vbox/src/VBox/VMM/VMMR0/
H A DHMR0.cpp1976 "FOP=%04x FPUIP=%08x CS=%04x Rsrvd1=%04x\n"
1980 pFpuCtx->FOP, pFpuCtx->FPUIP, pFpuCtx->CS, pFpuCtx->Rsrvd1,

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