Searched refs:stw (Results 1 - 10 of 10) sorted by relevance

/openjdk7/hotspot/src/cpu/sparc/vm/
H A Dassembler_sparc.inline.hpp279 inline void Assembler::stw( Register d, Register s1, Register s2) { emit_long( op(ldst_op) | rd(d) | op3(stw_op3) | rs1(s1) | rs2(s2) ); } function in class:Assembler
280 inline void Assembler::stw( Register d, Register s1, int simm13a) { emit_data( op(ldst_op) | rd(d) | op3(stw_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); } function in class:Assembler
288 inline void Assembler::st( Register d, Register s1, Register s2) { stw(d, s1, s2); }
289 inline void Assembler::st( Register d, Register s1, int simm13a) { stw(d, s1, simm13a); }
293 inline void Assembler::st( Register d, Register s1, ByteSize simm13a) { stw(d, s1, in_bytes(simm13a)); }
304 inline void Assembler::stw(Register d, const Address& a, int offset) { function in class:Assembler
305 if (a.has_index()) { assert(offset == 0, ""); stw(d, a.base(), a.index() ); }
306 else { stw(d, a.base(), a.disp() + offset); }
323 inline void Assembler::stw(Register d, Register s1, RegisterOrConstant s2) { stw( function in class:Assembler
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H A DnativeInst_sparc.cpp626 a->stw( G5, G4, al1.low10() ); idx++;
628 a->stw( G5, G4, I3 ); idx++;
770 a->stw( G5, G4, al.low10()); idx++;
772 a->stw( G5, G4, I3 ); idx++;
H A Dc1_LIRAssembler_sparc.cpp813 case T_INT : __ stw(from_reg->as_register(), base, offset); break;
818 __ stw(from_reg->as_register_lo(), base, offset + lo_word_offset_in_bytes);
819 __ stw(O7, base, offset + hi_word_offset_in_bytes);
825 __ stw(from_reg->as_register_lo(), base, offset + lo_word_offset_in_bytes);
826 __ stw(from_reg->as_register_hi(), base, offset + hi_word_offset_in_bytes);
838 __ stw(G3_scratch, base, offset);
876 case T_INT : __ stw(from_reg->as_register(), base, disp); break;
894 __ stw(G3_scratch, base, disp);
1039 __ stw(src_reg, addr.base(), addr.disp());
1072 __ stw(tm
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H A Dc1_MacroAssembler_sparc.cpp193 stw(t1, obj, oopDesc::klass_offset_in_bytes());
H A DtemplateInterpreter_sparc.cpp1818 __ stw(G3_scratch, popframe_condition_addr);
1864 __ stw(G0 /* popframe_inactive */, popframe_condition_addr);
1950 __ stw(G0 /* JvmtiThreadState::earlyret_inactive */, cond_addr);
H A DsharedRuntime_sparc.cpp602 __ stw(r, base, arg_slot(st_off)); // lo bits
604 __ stw(r, base, next_arg_slot(st_off)); // hi bits
608 __ stw(r, base, arg_slot(st_off)); // lo bits
610 __ stw(r, base, next_arg_slot(st_off)); // hi bits
612 __ stw(r->successor(), base, arg_slot(st_off) ); // lo bits
613 __ stw(r , base, next_arg_slot(st_off)); // hi bits
H A Dassembler_sparc.cpp484 stw( L5, O2, I7 );
485 stw( I7, I6, -1 );
4119 stw(t2, G2_thread, in_bytes(JavaThread::tlab_slow_allocations_offset()));
4128 stw(t2, G2_thread, in_bytes(JavaThread::tlab_number_of_refills_offset()));
4132 stw(t2, G2_thread, in_bytes(JavaThread::tlab_fast_refill_waste_offset()));
H A Dassembler_sparc.hpp1677 inline void stw( Register d, Register s1, Register s2 );
1678 inline void stw( Register d, Register s1, int simm13a);
1693 inline void stw( Register d, const Address& a, int offset = 0 );
1700 inline void stw( Register d, Register s1, RegisterOrConstant s2 );
H A DstubGenerator_sparc.cpp1797 __ stw(value, to, 0);
1862 __ stw(value, to, 0);
H A Dinterp_masm_sparc.cpp228 stw(G3_scratch, tos_addr);

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