Searched refs:sethi (Results 1 - 12 of 12) sorted by relevance
| /openjdk7/hotspot/src/cpu/sparc/vm/ |
| H A D | nativeInst_sparc.cpp | 175 // sethi %hi(K), %r; add %r, %lo(K), %r (NativeMovConstReg)
264 assert((int)jmpl_offset == (int)NativeMovConstReg::add_offset, "sethi size ok");
308 // verify the pattern "sethi %hi22(imm), reg ; add reg, %lo10(imm), reg"
391 a->sethi(al1, I3);
394 a->sethi(al2, O2);
416 // Make sure code pattern is sethi/nop/add.
420 assert((int)nop_offset == (int)NativeMovConstReg::add_offset, "sethi size ok");
422 // Verify the pattern "sethi %hi22(imm), reg; nop; add reg, %lo10(imm), reg"
423 // The casual reader should note that on Sparc a nop is a special case if sethi
428 is_op2(i1, Assembler::sethi_op2) && rd1 == G0 && // nop is a special case of sethi
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| H A D | dump_sparc.cpp | 86 __ sethi(offset, L0);
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| H A D | jniFastGetField_sparc.cpp | 65 __ sethi (cnt_addrlit, O3);
144 __ sethi (cnt_addrlit, G3);
216 __ sethi (cnt_addrlit, O3);
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| H A D | interpreterRT_sparc.cpp | 132 __ sethi(result_handler, Lscratch);
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| H A D | assembler_sparc.inline.hpp | 250 inline void Assembler::sethi( int imm22a, Register d, RelocationHolder const& rspec ) { emit_data( op(branch_op) | rd(d) | op2(sethi_op2) | hi22(imm22a), rspec); } function in class:Assembler
681 Assembler::sethi( thepc & ~0x3ff, reg, internal_word_Relocation::spec((address)thepc));
693 sethi(addrlit, d);
704 sethi(addrlit, d);
715 sethi(addrlit, d);
726 sethi(addrlit, temp);
737 sethi(addrlit, temp);
746 // Force fixed length sethi because NativeJump and NativeFarCall don't handle
761 //sethi(al); // sethi i
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| H A D | assembler_sparc.cpp | 450 sethi( 0xaaaaaaaa, I3, Relocation::spec_simple(relocInfo::none));
679 // Force fixed length sethi because NativeJump and NativeFarCall don't handle
1296 Assembler::sethi(lsb32, d, addrlit.rspec());
1299 Assembler::sethi(~lsb32, d, addrlit.rspec());
1303 Assembler::sethi(msb32, d, addrlit.rspec()); // msb 22-bits
1333 Assembler::sethi(addrlit.value(), d, addrlit.rspec());
1338 void MacroAssembler::sethi(const AddressLiteral& addrlit, Register d) { function in class:MacroAssembler
1390 sethi(addrlit, d);
1452 Assembler::sethi(lo, d); // hardware version zero-extends to upper 32
1457 Assembler::sethi(~l
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| H A D | cppInterpreter_sparc.cpp | 417 __ sethi(invocation_limit);
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| H A D | interp_masm_sparc.cpp | 1380 sethi(profile_limit, Rtmp);
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| H A D | assembler_sparc.hpp | 590 branch_op = 0, // also sethi (fmt2)
1097 // given a sethi instruction, extract the constant, left-justified
1629 inline void sethi( int imm22a, Register d, RelocationHolder const& rspec = RelocationHolder() );
2021 // sethi Macro handles optimizations and relocations
2025 void sethi(const AddressLiteral& addrlit, Register d);
2028 // compute the number of instructions for a sethi/set
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| H A D | c1_LIRAssembler_sparc.cpp | 491 __ JUMP(deopt_blob, G3_scratch, 0); // sethi;jmp
518 // It may not seem necessary to use a sethi/add pair to load a NULL into dest, but the
520 // therefore generate the sethi/add as a placeholders
592 __ delayed()->Assembler::sethi(0x80000000, (op->code() == lir_idiv ? Rresult : Rscratch));
1741 __ sethi(opr1->as_jint(), dest);
1764 // the sethi has been done above, so just put in the low 10 bits
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| H A D | templateTable_sparc.cpp | 271 __ sethi(a, G3_scratch);
286 __ sethi(a, G3_scratch);
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| H A D | sharedRuntime_sparc.cpp | 1994 __ sethi(markOopDesc::hash_mask, mask);
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