Searched refs:ldx (Results 1 - 15 of 15) sorted by relevance

/openjdk7/jdk/src/share/native/sun/java2d/loops/
H A DFillParallelogram.c101 jlong ldx = DblToLong(lslope); local
120 lx, ldx, rx, rdx,
154 lx, ldx, rx, ldx,
170 lx, rdx, rx, ldx,
H A DDrawParallelogram.c165 jlong ldx, rdx; local
172 ldx = DblToLong(lslope);
223 lslope, rslope, ldx, rdx);
242 lslope, rslope, ldx, rdx);
/openjdk7/hotspot/src/cpu/sparc/vm/
H A DsharedRuntime_sparc.cpp144 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0);
145 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1);
146 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8, O2);
147 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8, O3);
148 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8, O4);
149 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8, O5);
238 __ ldx(SP, ccr_offset+STACK_BIAS, G1);
245 __ ldx(SP, g1_offset+STACK_BIAS, G1);
246 __ ldx(SP, g3_offset+STACK_BIAS, G3);
247 __ ldx(S
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H A DstubGenerator_sparc.cpp1222 __ ldx(from, 0, O4);
1223 __ ldx(from, 8, G4);
1276 __ ldx(from, 0, O3);
1287 __ ldx(from, 0, O4);
1334 __ ldx(end_from, 0, O3);
1337 __ ldx(end_from, -8, O4);
1339 __ ldx(end_from, -16, G4);
1358 __ ldx(end_from, -8, O4);
1564 __ ldx(end_from, 8, O3);
1565 __ ldx(end_fro
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H A Dassembler_sparc.inline.hpp150 inline void Assembler::ldx( Register s1, Register s2, Register d) { v9_only(); emit_long( op(ldst_op) | rd(d) | op3(ldx_op3) | rs1(s1) | rs2(s2) ); } function in class:Assembler
151 inline void Assembler::ldx( Register s1, int simm13a, Register d) { v9_only(); emit_data( op(ldst_op) | rd(d) | op3(ldx_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); } function in class:Assembler
205 inline void Assembler::ldx( const Address& a, Register d, int offset) { function in class:Assembler
206 if (a.has_index()) { assert(offset == 0, ""); ldx( a.base(), a.index(), d); }
207 else { ldx( a.base(), a.disp() + offset, d); }
216 inline void Assembler::ldx( Register s1, RegisterOrConstant s2, Register d) { ldx( Address(s1, s2), d); } function in class:Assembler
360 Assembler::ldx(s1, s2, d);
368 Assembler::ldx(s1, simm13a, d);
383 Assembler::ldx(s
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H A DinterpreterRT_sparc.cpp56 __ ldx(Llocals, Interpreter::local_offset_in_bytes(offset() + 1), Rtmp);
H A Dassembler_sparc.cpp76 // op codes such as ld or ldx, only access disp() to get
336 ldx( G3, G4, G5 );
337 ldx( G6, -1, G7 );
1916 ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+0*8,O0);
1917 ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+1*8,O1);
1918 ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+2*8,O2);
1919 ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+3*8,O3);
1920 ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+4*8,O4);
1921 ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+5*8,O5);
1924 delayed()->ldx(S
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H A DjniFastGetField_sparc.cpp163 __ ldx (O5, 0, O3);
H A DnativeInst_sparc.cpp616 a->ldx( G5, al1.low10(), G4 ); idx++;
618 a->ldx( G5, I3, G4 ); idx++;
760 a->ldx( G5, al.low10(), G4); idx++;
762 a->ldx( G5, I3, G4 ); idx++;
H A Dinterp_masm_sparc.cpp358 ldx(r1, offset, rd);
2401 ldx(STATE(_native_lresult), O0);
2409 ldx(l_tmp, O0);
H A Dassembler_sparc.hpp1439 inline void ldx( Register s1, Register s2, Register d );
1440 inline void ldx( Register s1, int simm13a, Register d);
1457 inline void ldx( const Address& a, Register d, int offset = 0);
1467 inline void ldx( Register s1, RegisterOrConstant s2, Register d );
2174 // ld_ptr will perform ld for 32 bit VM's and ldx for 64 bit VM's
2191 // ld_long will perform ldd for 32 bit VM's and ldx for 64 bit VM's
H A Dc1_LIRAssembler_sparc.cpp927 __ ldx(base, offset, to_reg->as_register_lo());
1011 __ ldx(base, disp, to_reg->as_register_lo());
3216 __ ldx(base, disp, G5);
3218 __ ldx(base, idx, G5);
H A DtemplateInterpreter_sparc.cpp89 __ ldx(l_tmp, O0);
H A DcppInterpreter_sparc.cpp102 __ ldx(STATE(_native_lresult), O0);
H A DtemplateTable_sparc.cpp446 __ ldx(G3_scratch, base_offset, Otos_l);

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