/illumos-gate/usr/src/uts/common/sys/ |
H A D | pciev.h | 85 * This data strucutre is now statically allocated during bus_p 132 #define PCIE_ASSIGNED_TO_FMA_DOM(bus_p) \ 133 (!PCIE_IS_BDG(bus_p) && PCIE_BUS2DOM(bus_p)->fmadom_count > 0) 134 #define PCIE_ASSIGNED_TO_NFMA_DOM(bus_p) \ 135 (!PCIE_IS_BDG(bus_p) && PCIE_BUS2DOM(bus_p)->nfmadom_count > 0) 136 #define PCIE_ASSIGNED_TO_ROOT_DOM(bus_p) \ 137 (PCIE_IS_BDG(bus_p) || PCIE_BUS2DOM(bus_p) [all...] |
H A D | pcie_impl.h | 59 #define PCIE_BUS2DIP(bus_p) bus_p->bus_dip 60 #define PCIE_BUS2PFD(bus_p) PCIE_DIP2PFD(PCIE_BUS2DIP(bus_p)) 61 #define PCIE_BUS2DOM(bus_p) bus_p->bus_dom 65 * These macros depend on initialization of type related data in bus_p. 67 #define PCIE_IS_PCIE(bus_p) (bus_p->bus_pcie_off) 68 #define PCIE_IS_PCIX(bus_p) (bus_ [all...] |
/illumos-gate/usr/src/uts/common/io/pciex/ |
H A D | pcie.c | 58 static void pcie_print_bus(pcie_bus_t *bus_p); 286 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 289 if (PCIE_IS_PCIE_HOTPLUG_ENABLED(bus_p)) { 291 } else if (PCIE_IS_PCI_HOTPLUG_ENABLED(bus_p)) { 306 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 309 if (PCIE_IS_PCIE_HOTPLUG_ENABLED(bus_p)) { 311 } else if (PCIE_IS_PCI_HOTPLUG_ENABLED(bus_p)) { 328 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 339 if ((bus_p->bus_soft_state == PCI_SOFT_STATE_OPEN_EXCL) || 341 (bus_p 357 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 443 pcie_bus_t *bus_p; local 464 pcie_bus_t *bus_p = PCIE_DIP2BUS(cdip); local 483 pcie_bus_t *bus_p; local 632 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 716 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 864 pcie_bus_t *bus_p; local 885 pcie_bus_t *bus_p = PCIE_DIP2DOWNBUS(dip); local 964 pcie_bus_t *bus_p; local 1200 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); local 1232 pcie_bus_t *bus_p = PCIE_DIP2BUS(cdip); local 1358 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 1480 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 1532 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 1720 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 1738 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 1765 pcie_bus_t *bus_p; local 2105 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); local 2115 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); local 2125 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 2168 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 2189 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 2210 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 2328 pcie_print_bus(pcie_bus_t *bus_p) argument [all...] |
H A D | pciev.c | 49 static void pcie_cache_domain_info(pcie_bus_t *bus_p); 50 static void pcie_uncache_domain_info(pcie_bus_t *bus_p); 60 pcie_bus_t *bus_p; local 65 bus_p = PCIE_DIP2BUS(dip); 66 if (bus_p && (bus_p->bus_bdf == bdf)) 68 if (bus_p) { 70 if ((bus_num >= bus_p->bus_bus_range.lo && 71 bus_num <= bus_p->bus_bus_range.hi) || 72 bus_p 125 pcie_cache_domain_info(pcie_bus_t *bus_p) argument 164 pcie_uncache_domain_info(pcie_bus_t *bus_p) argument 217 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 256 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 404 pcie_bus_t *bus_p = PCIE_PFD2BUS(pfd_p); local 483 pcie_in_domain(pcie_bus_t *bus_p, uint_t domain_id) argument [all...] |
H A D | pcie_fault.c | 107 pcie_bus_t *bus_p, boolean_t bdg); 108 static void pf_pcix_regs_gather(pf_data_t *pfd_p, pcie_bus_t *bus_p); 109 static void pf_pcie_regs_gather(pf_data_t *pfd_p, pcie_bus_t *bus_p); 110 static void pf_pci_regs_gather(pf_data_t *pfd_p, pcie_bus_t *bus_p); 167 pf_eh_enter(pcie_bus_t *bus_p) { argument 172 pf_eh_exit(pcie_bus_t *bus_p) argument 174 pcie_bus_t *rbus_p = PCIE_DIP2BUS(bus_p->bus_rp_dip); 322 pcie_bus_t *bus_p; local 327 if (!(bus_p = pf_is_ready(dip))) 342 (bus_p 402 pf_in_bus_range(pcie_bus_t *bus_p, pcie_req_id_t bdf) argument 420 pf_in_assigned_addr(pcie_bus_t *bus_p, uint64_t addr) argument 440 pf_in_addr_range(pcie_bus_t *bus_p, uint64_t addr) argument 482 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 492 pf_pcix_ecc_regs_gather(pf_pcix_ecc_regs_t *pcix_ecc_regs, pcie_bus_t *bus_p, boolean_t bdg) argument 518 pf_pcix_regs_gather(pf_data_t *pfd_p, pcie_bus_t *bus_p) argument 560 pf_pcix_ecc_regs_gather(PCIX_ECC_REG(pfd_p), bus_p, local 566 pf_pcie_regs_gather(pf_data_t *pfd_p, pcie_bus_t *bus_p) argument 660 pf_pci_regs_gather(pf_data_t *pfd_p, pcie_bus_t *bus_p) argument 695 pf_pcix_regs_clear(pf_data_t *pfd_p, pcie_bus_t *bus_p) argument 742 pf_pcie_regs_clear(pf_data_t *pfd_p, pcie_bus_t *bus_p) argument 784 pf_pci_regs_clear(pf_data_t *pfd_p, pcie_bus_t *bus_p) argument 804 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 815 pf_pci_find_rp_fault(pf_data_t *pfd_p, pcie_bus_t *bus_p) argument 909 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 996 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 1059 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 1604 pcie_bus_t *bus_p = PCIE_PFD2BUS(pfd_p); local 2128 pcie_bus_t *bus_p = PCIE_PFD2BUS(pfd_p); local 2331 pcie_bus_t *bus_p; local 2540 pf_tlp_decode(pcie_bus_t *bus_p, pf_pcie_adv_err_regs_t *adv_reg_p) argument 2680 pcie_bus_t *bus_p; local 3050 pcie_bus_t *bus_p = PCIE_PFD2BUS(pfd_p); local [all...] |
H A D | pcieb.c | 368 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(devi); local 369 ddi_acc_handle_t config_handle = bus_p->bus_cfg_hdl; 383 if (!(PCIE_IS_BDG(bus_p))) { 394 if (PCIE_CAP_GET(16, bus_p, PCIE_LINKCTL) & PCIE_LINKCTL_LINK_DISABLE) 456 if (PCIE_IS_PCI_BDG(bus_p)) 468 PCIEB_IS_41210_BRIDGE(bus_p->bus_dev_ven_id)) 486 if (PCIE_IS_RP(bus_p)) 924 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 926 if (PCIE_IS_SW(bus_p) || PCIE_IS_RP(bus_p) || PCIE_IS_PCI2PCI 1006 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); local 1735 pcie_bus_t *bus_p = PCIE_DIP2BUS(pcieb->pcieb_dip); local [all...] |
H A D | pcie_pwr.c | 841 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 842 ASSERT(bus_p); 843 return (bus_p->bus_pcie_off != 0);
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/illumos-gate/usr/src/uts/sparc/io/pciex/ |
H A D | pcie_sparc.c | 35 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 37 if (PCIE_IS_PCIE_BDG(bus_p)) { 38 bus_p->bus_pcie2pci_secbus = bus_p->bus_bdg_secbus; 47 bus_p->bus_pcie2pci_secbus = 60 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 62 if (PCIE_IS_PCIE_BDG(bus_p)) 63 bus_p->bus_pcie2pci_secbus = 0;
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H A D | pcieb_sparc.c | 201 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 202 ddi_acc_handle_t config_handle = bus_p->bus_cfg_hdl; 204 uint8_t dev_type = bus_p->bus_dev_type; 205 uint16_t vendor_id = bus_p->bus_dev_ven_id & 0xFFFF; 206 uint16_t device_id = bus_p->bus_dev_ven_id >> 16; 213 (bus_p->bus_rev_id <= PXB_DEVICE_PLX_AA_REV)) 215 bus_p->bus_hp_sup_modes = PCIE_NONE_HP_MODE; 336 pcie_bus_t *bus_p = PCIE_DIP2BUS(pcieb->pcieb_dip); local 338 uint16_t device_id = bus_p->bus_dev_ven_id >> 16; 355 val = PCIE_CAP_GET(32, bus_p, PCIE_LINKCA [all...] |
/illumos-gate/usr/src/uts/i86pc/io/pciex/ |
H A D | pcie_x86.c | 44 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 45 bus_p->bus_plat_private = 52 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 54 kmem_free(bus_p->bus_plat_private, sizeof (pcie_x86_priv_t));
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H A D | npe.c | 847 pcie_bus_t *bus_p; local 945 bus_p = PCIE_DIP2BUS(child); 946 if (bus_p) { 947 uint16_t device_id = (uint16_t)(bus_p->bus_dev_ven_id >> 16); 948 uint16_t vendor_id = (uint16_t)(bus_p->bus_dev_ven_id & 0xFFFF); 949 uint16_t rev_id = bus_p->bus_rev_id; 955 bus_p->bus_aer_off = 0;
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/illumos-gate/usr/src/uts/sun4v/io/pciex/ |
H A D | pci_cfgacc_4v.c | 68 pcie_bus_t *bus_p; local 73 bus_p = PCIE_DIP2DOWNBUS(dip); 74 ASSERT(bus_p != NULL); 76 devhdl = bus_p->bus_cfgacc_base; 89 pcie_bus_t *bus_p; local 94 bus_p = PCIE_DIP2DOWNBUS(dip); 95 ASSERT(bus_p != NULL); 97 devhdl = bus_p->bus_cfgacc_base;
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/illumos-gate/usr/src/uts/sun4u/io/pciex/ |
H A D | pci_cfgacc_4u.c | 63 pcie_bus_t *bus_p; local 67 bus_p = PCIE_DIP2DOWNBUS(dip); 68 ASSERT(bus_p != NULL); 70 base_addr = bus_p->bus_cfgacc_base; 97 pcie_bus_t *bus_p; local 100 bus_p = PCIE_DIP2DOWNBUS(dip); 101 ASSERT(bus_p != NULL); 103 base_addr = bus_p->bus_cfgacc_base;
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/illumos-gate/usr/src/uts/intel/io/pciex/ |
H A D | pcieb_x86.c | 153 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); local 155 vendor_id = bus_p->bus_dev_ven_id & 0xFFFF; 156 device_id = bus_p->bus_dev_ven_id >> 16; 205 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(devi); local 222 if (!pcie_is_osc(devi) && PCIE_IS_RP(bus_p) && PCIE_HAS_AER(bus_p)) 465 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); local 466 ddi_acc_handle_t cfg_hdl = bus_p->bus_cfg_hdl; 467 uint16_t bdf = bus_p->bus_bdf; 472 vid = bus_p 552 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); local 584 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); local 611 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); local [all...] |
H A D | pcie_nvidia.c | 180 pcie_bus_t *bus_p; local 203 bus_p = PCIE_DIP2BUS(dip); 204 bus_p->bus_cfgacc_base = mcfg_mem_base;
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H A D | pcie_acpi.c | 58 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 59 pcie_x86_priv_t *osc_p = (pcie_x86_priv_t *)bus_p->bus_plat_private; 222 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 223 pcie_x86_priv_t *osc_p = (pcie_x86_priv_t *)bus_p->bus_plat_private;
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/illumos-gate/usr/src/uts/common/io/pciex/hotplug/ |
H A D | pciehpc.c | 268 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 284 if (bus_p->bus_hp_curr_mode != PCIE_NATIVE_HP_MODE) { 293 bus_p->bus_pcie_off + PCIE_SLOTSTS); 304 bus_p->bus_pcie_off + PCIE_SLOTSTS, status); 333 bus_p->bus_pcie_off + PCIE_SLOTCTL); 339 pciehpc_reg_put16(ctrl_p, bus_p->bus_pcie_off + 390 bus_p->bus_pcie_off + PCIE_SLOTCTL); 393 pciehpc_reg_put16(ctrl_p, bus_p->bus_pcie_off + 505 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 511 bus_p 561 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 638 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 651 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 664 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 677 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 690 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 703 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 725 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 768 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 875 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 910 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 938 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 969 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 1046 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 1202 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 1891 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 2108 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 2148 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 2273 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local [all...] |
H A D | pcie_hp.c | 214 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 218 if (PCIE_IS_PCIE_HOTPLUG_CAPABLE(bus_p)) { 221 } else if (PCIE_IS_PCI_HOTPLUG_CAPABLE(bus_p)) { 261 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 289 if (PCIE_IS_PCIE_HOTPLUG_ENABLED(bus_p)) 291 else if (PCIE_IS_PCI_HOTPLUG_ENABLED(bus_p)) 303 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 306 if (PCIE_IS_PCIE_HOTPLUG_ENABLED(bus_p)) 308 else if (PCIE_IS_PCI_HOTPLUG_ENABLED(bus_p)) 470 pcie_bus_t *bus_p local 669 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 695 pcie_bus_t *bus_p = PCIE_DIP2BUS(pdip); local 905 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local [all...] |
H A D | pcishpc.c | 136 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 173 pci_config_get32(bus_p->bus_cfg_hdl, i)); 837 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 853 bus_p->bus_hp_curr_mode = PCIE_PCI_HP_MODE; 935 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 949 bus_p->bus_hp_curr_mode = PCIE_NONE_HP_MODE; 1883 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 1914 slot_p->hs_phy_slot_num = pci_config_get8(bus_p->bus_cfg_hdl, 2359 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 2362 pci_config_put8(bus_p 2387 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local [all...] |
/illumos-gate/usr/src/uts/common/sys/hotplug/pci/ |
H A D | pcie_hp.h | 91 #define PCIE_IS_PCIE_HOTPLUG_CAPABLE(bus_p) \ 92 ((bus_p->bus_hp_sup_modes & PCIE_ACPI_HP_MODE) || \ 93 (bus_p->bus_hp_sup_modes & PCIE_NATIVE_HP_MODE)) 95 #define PCIE_IS_PCI_HOTPLUG_CAPABLE(bus_p) \ 96 (bus_p->bus_hp_sup_modes & PCIE_PCI_HP_MODE) 98 #define PCIE_IS_PCIE_HOTPLUG_ENABLED(bus_p) \ 99 ((bus_p->bus_hp_curr_mode == PCIE_ACPI_HP_MODE) || \ 100 (bus_p->bus_hp_curr_mode == PCIE_NATIVE_HP_MODE)) 102 #define PCIE_IS_PCI_HOTPLUG_ENABLED(bus_p) \ 103 (bus_p [all...] |
/illumos-gate/usr/src/uts/intel/io/pciex/hotplug/ |
H A D | pciehpc_acpi.c | 95 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 99 bus_p->bus_hp_sup_modes |= PCIE_ACPI_HP_MODE; 100 bus_p->bus_hp_curr_mode = PCIE_ACPI_HP_MODE; 230 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 247 bus_p->bus_pcie_off + PCIE_SLOTCAP); 312 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 332 bus_p->bus_pcie_off + PCIE_SLOTSTS); 351 bus_p->bus_pcie_off + PCIE_SLOTCTL); 384 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); local 405 bus_p [all...] |
/illumos-gate/usr/src/uts/sun4/io/px/ |
H A D | px_fm.c | 72 pcie_bus_t *bus_p; local 99 bus_p = PCIE_DIP2BUS(dip); 100 bus_p->bus_rp_bdf = px_p->px_bdf; 101 bus_p->bus_rp_dip = dip; 810 pcie_bus_t *bus_p; local 815 bus_p = PCIE_DIP2BUS(dip); 824 (bus_p->bus_bdf == bdf))) ? DDI_FM_NONFATAL : DDI_FM_FATAL; 977 pcie_bus_t *bus_p, *root_bus_p; local 989 bus_p = PCIE_PFD2BUS(pfd_p); 992 if (!PCIE_BUS2DOM(bus_p) [all...] |
H A D | px.c | 231 pcie_bus_t *bus_p; local 319 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 321 bus_p->bus_hp_sup_modes |= PCIE_NATIVE_HP_MODE; 365 bus_p = PCIE_DIP2BUS(dip); 366 bus_p->bus_cfgacc_base = px_lib_get_cfgacc_base(dip); 457 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); local 481 if (PCIE_IS_PCIE_HOTPLUG_ENABLED(bus_p)) 1436 pcie_bus_t *bus_p; local 1440 bus_p = PCIE_DIP2BUS(dip); 1442 bus_p [all...] |
/illumos-gate/usr/src/uts/sun4u/io/px/ |
H A D | px_lib4u.c | 2618 pcie_bus_t *bus_p = PCIE_DIP2BUS(px_p->px_dip); local 2620 if (px_p && PCIE_IS_PCIE_HOTPLUG_ENABLED(bus_p)) {
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