/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2010 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_PCIEV_H
#define _SYS_PCIEV_H
#ifdef __cplusplus
extern "C" {
#endif
typedef struct pcie_eh_data {
typedef struct pcie_domains {
typedef struct pcie_req_id_list {
typedef struct pcie_child_domains {
/*
* IOV data structure:
* This data strucutre is now statically allocated during bus_p
* initializing time. Do we need to have this data structure for
* non-root domains? If not, is there a way to differentiate root
* domain and non-root domain so that we do the initialization for
* root domain only?
*/
typedef struct pcie_domain {
/*
* Bridges:
*
* Leaves:
* Bridges will contain 0 <= N <= NumChild
*
* Note:
* there is no lock to protect the access to
* pcie_domains_t data struture. Currently we don't see
* the need for lock. But we need to pay attention if there
* might be issues when hotplug is enabled.
*/
union {
} domain;
/*
* Reference count of the domain type for this device and it's children.
* For leaf devices, fmadom + nfma + root = 1
* For bridges, the sum of the counts = number of LEAF children.
*
* All devices start with a count of 1 for either nfmadom or rootdom.
*/
/* flag if the affected dev will cause guest domains to panic */
extern void pcie_save_domain_id(pcie_domains_t *);
extern void pcie_init_dom(dev_info_t *);
extern void pcie_fini_dom(dev_info_t *);
(PCIE_IS_BDG(bus_p) && \
(!PCIE_BDG_HAS_CHILDREN_NFMA_DOM(bus_p)) && \
/* Following macros are only valid for leaf devices */
if (!PCIE_IS_BDG(bus_p)) \
if (!PCIE_IS_BDG(bus_p)) \
if (!PCIE_IS_BDG(bus_p)) \
/* Following macros are only valid for bridges */
if (PCIE_IS_BDG(bus_p)) \
if (PCIE_IS_BDG(bus_p)) \
if (PCIE_IS_BDG(bus_p)) \
if (PCIE_IS_BDG(bus_p)) \
#ifdef __cplusplus
}
#endif
#endif /* _SYS_PCIEV_H */