Searched refs:MII_BMSR (Results 1 - 10 of 10) sorted by relevance

/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Dmii.h16 #define MII_BMSR 0x01 /* Basic mode status register */ macro
H A Dtg3.c474 err = tg3_readphy(tp, MII_BMSR, &phy_status);
475 err |= tg3_readphy(tp, MII_BMSR, &phy_status);
693 tg3_readphy(tp, MII_BMSR, &bmsr);
694 tg3_readphy(tp, MII_BMSR, &bmsr);
700 tg3_readphy(tp, MII_BMSR, &bmsr);
701 tg3_readphy(tp, MII_BMSR, &bmsr);
711 tg3_readphy(tp, MII_BMSR, &bmsr);
714 tg3_readphy(tp, MII_BMSR, &bmsr);
754 tg3_readphy(tp, MII_BMSR, &bmsr);
755 tg3_readphy(tp, MII_BMSR,
[all...]
H A Drtl8139.c105 MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68, enumerator in enum:RTL8139_registers
H A Dforcedeth.c370 #define MII_BMSR 0x01 /* Basic mode status register */ macro
785 (mii_rw(nic, np->phyaddr, MII_BMSR, MII_READ) &
H A Dpcnet32.c914 int mii_status = mdio_read(nic, phy, MII_BMSR);
H A Dsundance.c634 int mii_status = mdio_read(nic, phy, MII_BMSR);
H A Dtg3.h81 #define MII_BMSR 0x01 /* Basic mode status register */ macro
/illumos-gate/usr/src/uts/common/io/chxge/com/
H A Dch_compat.h48 #define MII_BMSR 0x01 /* Basic mode status register */ macro
/illumos-gate/usr/src/uts/common/io/cxgbe/t4nex/
H A Dosdep.h48 #define MII_BMSR 0x01 macro
/illumos-gate/usr/src/uts/intel/io/amd8111s/
H A Damd8111s_hw.h124 #define MII_BMSR 0x01 /* Basic mode status register */ macro

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