Searched refs:LOCK_LEVEL (Results 1 - 25 of 54) sorted by relevance

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/illumos-gate/usr/src/uts/sparc/sys/
H A Dmachlock.h63 #define SPIN_LOCK(pl) ((pl) > ipltospl(LOCK_LEVEL))
85 * LOCK_LEVEL => The highest level at which one may block (and thus the
94 * - CLOCK_LEVEL must be less than or equal to LOCK_LEVEL
95 * - LOCK_LEVEL must be less than DISP_LEVEL
96 * - DISP_LEVEL should be as close to LOCK_LEVEL as possible
98 * Note that LOCK_LEVEL and CLOCK_LEVEL have historically always been equal;
103 #define LOCK_LEVEL 10 macro
104 #define DISP_LEVEL (LOCK_LEVEL + 1)
106 #define HIGH_LEVELS (PIL_MAX - LOCK_LEVEL)
/illumos-gate/usr/src/uts/intel/sys/
H A Dmachlock.h66 #define SPIN_LOCK(pl) ((pl) > ipltospl(LOCK_LEVEL))
90 * LOCK_LEVEL => The highest level at which one may block (and thus the
99 * - CLOCK_LEVEL must be less than or equal to LOCK_LEVEL
100 * - LOCK_LEVEL must be less than DISP_LEVEL
101 * - DISP_LEVEL should be as close to LOCK_LEVEL as possible
103 * Note that LOCK_LEVEL and CLOCK_LEVEL have historically always been equal;
111 #define LOCK_LEVEL 10 macro
112 #define DISP_LEVEL (LOCK_LEVEL + 1)
114 #define HIGH_LEVELS (PIL_MAX - LOCK_LEVEL)
119 * ((((1 << PIL_MAX + 1) - 1) >> LOCK_LEVEL
[all...]
H A Dacpica.h69 #define SCI_IPL (LOCK_LEVEL-1)
/illumos-gate/usr/src/uts/i86pc/sys/
H A Dclock.h78 #define CBE_LOCK_PIL LOCK_LEVEL
H A Dmachcpuvar.h152 #define NINTR_THREADS (LOCK_LEVEL-1) /* number of interrupt threads */
H A Dapix.h146 ((ipl) <= LOCK_LEVEL ? \
148 ((apixp)->x_intr_pending >> (LOCK_LEVEL + 1)))
/illumos-gate/usr/src/uts/sun4/os/
H A Dcpu_states.c132 abort_seq_inum = add_softintr(LOCK_LEVEL,
149 on_intr = CPU_ON_INTR(CPU) || (spltoipl(s) > LOCK_LEVEL);
157 * PIL > LOCK_LEVEL, then we post a softint and invoke
234 if (getpil() > LOCK_LEVEL) {
H A Dmachdep.c535 ASSERT(t->t_pil > 0 && t->t_pil <= LOCK_LEVEL);
576 ASSERT(t->t_pil > 0 && t->t_pil <= LOCK_LEVEL);
887 lbolt_softint_inum = add_softintr(LOCK_LEVEL,
/illumos-gate/usr/src/uts/common/io/
H A Davintr.c86 struct av_head softvect[LOCK_LEVEL + 1];
257 if (((hi_pri > LOCK_LEVEL) && (lvl < LOCK_LEVEL)) ||
258 ((hi_pri < LOCK_LEVEL) && (lvl > LOCK_LEVEL))) {
326 if (lvl <= 0 || lvl > LOCK_LEVEL) {
438 if (lvl <= 0 && lvl >= LOCK_LEVEL) {
718 if (av->av_ticksp && av->av_prilevel <= LOCK_LEVEL)
/illumos-gate/usr/src/uts/sun4/sys/
H A Dclock.h75 #define CBE_LOCK_PIL LOCK_LEVEL
/illumos-gate/usr/src/uts/i86pc/io/apix/
H A Dapix_intr.c209 if (av->av_ticksp && av->av_prilevel <= LOCK_LEVEL)
442 mcpu->pil_high_start[nestpil - (LOCK_LEVEL + 1)];
462 mcpu->pil_high_start[pil - (LOCK_LEVEL + 1)] = now;
512 ASSERT(mcpu->pil_high_start[pil - (LOCK_LEVEL + 1)] != 0);
514 intrtime = now - mcpu->pil_high_start[pil - (LOCK_LEVEL + 1)];
532 mcpu->pil_high_start[nestpil - (LOCK_LEVEL + 1)] = now;
559 * Dispatch a hilevel interrupt (one above LOCK_LEVEL)
578 ASSERT(newipl > LOCK_LEVEL && newipl > cpu->cpu_base_spl);
778 ASSERT(newipl <= LOCK_LEVEL);
936 if (newipl > LOCK_LEVEL) {
[all...]
/illumos-gate/usr/src/uts/sun4u/sys/
H A Dmachcpuvar.h148 #define NINTR_THREADS (LOCK_LEVEL) /* number of interrupt threads */
/illumos-gate/usr/src/uts/sun4/ml/
H A Dgenconst.c123 printf("#define\tCPU_INTRSTAT_LOW_PIL_OFFSET %d\n", (LOCK_LEVEL + 1) *
H A Dinterrupt.s149 cmp %g4, LOCK_LEVEL
150 bg,a,pt %xcc, 3f ! branch if pil > LOCK_LEVEL
940 sub %o2, LOCK_LEVEL + 1, %o5
952 sub %o2, LOCK_LEVEL + 1, %o5
984 srl %o5, LOCK_LEVEL + 1, %o5 ! only look at high-level bits
1001 ! mask already shifted right by (LOCK_LEVEL + 1), we start by looking
1002 ! at bit (current_pil - (LOCK_LEVEL + 2)).
1003 sub %o2, LOCK_LEVEL + 2, %o4
1042 add %o1, LOCK_LEVEL + 1, %o1
1060 ! with %o4, which has (PIL - (LOCK_LEVEL
[all...]
/illumos-gate/usr/src/uts/i86pc/os/
H A Dintr.c114 * LOCK_LEVEL (0xa on i86pc). If a thread is above LOCK_LEVEL it _must_ not
122 * Generally most interrupts fire below LOCK_LEVEL.
534 ASSERT(pil > LOCK_LEVEL);
563 mcpu->pil_high_start[nestpil - (LOCK_LEVEL + 1)];
591 mcpu->pil_high_start[pil - (LOCK_LEVEL + 1)] = now;
653 ASSERT(mcpu->pil_high_start[pil - (LOCK_LEVEL + 1)] != 0);
655 intrtime = now - mcpu->pil_high_start[pil - (LOCK_LEVEL + 1)];
673 mcpu->pil_high_start[nestpil - (LOCK_LEVEL + 1)] = now;
1211 ASSERT(t->t_pil > 0 && t->t_pil <= LOCK_LEVEL);
[all...]
H A Dmp_startup.c349 * cpu_base_spl MUST remain at LOCK_LEVEL until the cpu is CPU_READY.
354 cp->cpu_base_spl = ipltospl(LOCK_LEVEL);
1694 * Enable interrupts with spl set to LOCK_LEVEL. LOCK_LEVEL is the
1697 * the cpu is blocked on a mutex and halts). Setting LOCK_LEVEL blocks
1701 splx(ipltospl(LOCK_LEVEL));
1795 ASSERT(cp->cpu_base_spl == ipltospl(LOCK_LEVEL));
2030 ASSERT(curthread->t_preempt || getpil() >= LOCK_LEVEL);
2039 ASSERT(curthread->t_preempt || getpil() >= LOCK_LEVEL);
2052 ASSERT(curthread->t_preempt || getpil() >= LOCK_LEVEL);
[all...]
/illumos-gate/usr/src/uts/common/ipp/
H A Dipp_impl.h117 (void *)ipltospl(LOCK_LEVEL)); \
H A Dippconf.c278 (void *)ipltospl(LOCK_LEVEL));
1700 (void *)ipltospl(LOCK_LEVEL));
3277 (void *)ipltospl(LOCK_LEVEL));
3292 (void *)ipltospl(LOCK_LEVEL));
3308 (void *)ipltospl(LOCK_LEVEL));
3325 (void *)ipltospl(LOCK_LEVEL));
3384 (void *)ipltospl(LOCK_LEVEL));
3468 (void *)ipltospl(LOCK_LEVEL));
/illumos-gate/usr/src/uts/sun4v/sys/
H A Dmachcpuvar.h191 #define NINTR_THREADS (LOCK_LEVEL) /* number of interrupt threads */
/illumos-gate/usr/src/uts/sun4/io/px/
H A Dpx_debug.c242 if (getpil() > LOCK_LEVEL)
/illumos-gate/usr/src/uts/i86pc/ml/
H A Dgenassym.c73 printf("#define\tLOCK_LEVEL 0x%x\n", LOCK_LEVEL);
/illumos-gate/usr/src/cmd/mdb/i86pc/modules/common/
H A Dintr_common.c32 static struct av_head softvec_tbl[LOCK_LEVEL + 1];
109 for (i = 0; i < LOCK_LEVEL + 1; i++) {
/illumos-gate/usr/src/uts/common/os/
H A Dmutex.c36 * PIL > LOCK_LEVEL implies a spin lock; everything else is adaptive.
368 * Adaptive mutexes must not be acquired from above LOCK_LEVEL.
572 if ((intptr_t)ibc > ipltospl(LOCK_LEVEL) && ibc < (void *)KERNELBASE) {
694 ASSERT(new_pil > LOCK_LEVEL);
H A Dpanic.c252 cp->cpu_intr_actv &= ((1 << (LOCK_LEVEL + 1)) - 1);
/illumos-gate/usr/src/uts/common/tnf/
H A Dtnf_buf.c347 spinlock_spl = __ipltospl(LOCK_LEVEL + 1);

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