/openjdk7/hotspot/src/share/vm/opto/ |
H A D | vectornode.hpp | 59 static int opcode(int opc, BasicType bt);
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H A D | graphKit.cpp | 2809 Node* GraphKit::insert_mem_bar(int opcode, Node* precedent) { argument 2810 MemBarNode* mb = MemBarNode::make(C, opcode, Compile::AliasIdxBot, precedent); 2824 Node* GraphKit::insert_mem_bar_volatile(int opcode, int alias_idx, Node* precedent) { argument 2827 // The first membar is on the same memory slice as the field store opcode. 2834 MemBarNode* mb = MemBarNode::make(C, opcode, alias_idx, precedent); 2839 assert(!(opcode == Op_Initialize && alias_idx != Compile::AliasIdxRaw), "fix caller");
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H A D | library_call.cpp | 191 Node* make_string_method_node(int opcode, Node* str1_start, Node* cnt1, Node* str2_start, Node* cnt2); 192 Node* make_string_method_node(int opcode, Node* str1, Node* str2); 980 Node* LibraryCallKit::make_string_method_node(int opcode, Node* str1, Node* str2) { argument 998 switch (opcode) { 1032 Node* LibraryCallKit::make_string_method_node(int opcode, Node* str1_start, Node* cnt1, Node* str2_start, Node* cnt2) { argument 1034 switch (opcode) {
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H A D | cfgnode.cpp | 168 int opcode = n->Opcode(); local 169 switch( opcode ) {
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H A D | memnode.hpp | 105 // Map a load or store opcode to its corresponding store opcode. 191 // Map a load opcode to its corresponding store opcode. 483 // Map a store opcode to its corresponding own opcode, trivially. 913 static MemBarNode* make(Compile* C, int opcode,
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H A D | memnode.cpp | 2834 MemBarNode* MemBarNode::make(Compile* C, int opcode, int atp, Node* pn) { argument 2835 switch (opcode) {
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/openjdk7/jdk/src/share/native/sun/java2d/opengl/ |
H A D | OGLFuncs.h | 90 typedef void (GLAPIENTRY *glLogicOpType)(GLenum opcode);
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/openjdk7/hotspot/src/cpu/x86/vm/ |
H A D | assembler_x86.hpp | 675 void emit_simd_arith(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre); 676 void emit_simd_arith(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre); 677 void emit_simd_arith_nonds(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre); 678 void emit_simd_arith_nonds(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre); 679 void emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, 681 void emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, 1185 // takes a branch opcode (cc) and a label (L) and generates
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H A D | assembler_x86.cpp | 224 assert(isByte(op1) && isByte(op2), "wrong opcode"); 234 assert(isByte(op1) && isByte(op2), "wrong opcode"); 250 assert(isByte(op1) && isByte(op2), "wrong opcode"); 275 assert(isByte(op1) && isByte(op2), "wrong opcode"); 286 assert(isByte(op1) && isByte(op2), "wrong opcode"); 560 ip++; // skip opcode 690 ip++; // opcode 701 ip++; // skip opcode 893 assert(isByte(b1) && isByte(b2), "wrong opcode"); 4166 // SSE opcode secon 4267 emit_simd_arith(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre) argument 4274 emit_simd_arith(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre) argument 4281 emit_simd_arith_nonds(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre) argument 4288 emit_simd_arith_nonds(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre) argument 4295 emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, Address src, VexSimdPrefix pre, bool vector256) argument 4303 emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, XMMRegister src, VexSimdPrefix pre, bool vector256) argument [all...] |
/openjdk7/jdk/src/share/classes/com/sun/media/sound/ |
H A D | DLSSoundbank.java | 306 int opcode = riff.readUnsignedShort(); 307 switch (opcode) {
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/openjdk7/hotspot/src/share/vm/adlc/ |
H A D | adlparse.cpp | 223 else if (!strcmp(ident, "opcode")) instr->_opcode = opcode_parse(instr); 460 else if (!strcmp(ident, "opcode")) { 461 parse_err(SYNERR, "Operands do not specify an opcode\n"); 3173 parse_err(SYNERR, "size of opcode expected at %c\n", _curchar); 3190 fprintf(stderr,"size of opcode: %s\n", sizeOfInstr); 3205 Opcode *opcode = NULL; local 3207 // Get value of the instruction's opcode 3217 if ( ((primary = get_ident_or_literal_constant("primary opcode")) == NULL) ) { 3218 parse_err(SYNERR, "primary hex opcode expected at %c\n", _curchar); 3225 // Parse secondary opcode [all...] |
H A D | output_c.cpp | 1989 // Instruction provided an opcode: "primary", "secondary", "tertiary" 2398 // Missing opcode 2400 "Missing $%s opcode definition in %s, used by encoding %s\n", 2454 // Missing opcode 2456 "Missing $%s opcode definition in %s\n", 2995 fprintf(fp,"uint %sOper::opcode() const { return %s; }\n", 3014 fprintf(fp,"uint %sOper::opcode() const { return %s; }\n", 3357 void map(OperandForm &oper) { // Generate the entry for this opcode 3411 // Generate the entry for this opcode 3683 // Generate the case statement for this opcode 3789 const char *opcode = machOperEnum(comp->_type); local 3975 int opcode = opIndex++; local [all...] |
/openjdk7/langtools/src/share/classes/com/sun/tools/javac/comp/ |
H A D | Check.java | 2601 * Return the opcode of the operator but emit an error if it is an 2614 if (operator.opcode == ByteCodes.error) { 2620 return operator.opcode; 2635 int opc = ((OperatorSymbol)operator).opcode;
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H A D | Attr.java | 2038 int opc = ((OperatorSymbol)operator).opcode;
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/openjdk7/jdk/src/share/native/sun/java2d/opengl/J2D_GL/ |
H A D | gl.h | 794 GLAPI void GLAPIENTRY glLogicOp( GLenum opcode );
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